diff options
author | Harvey Harrison <harvey.harrison@gmail.com> | 2008-10-29 17:21:32 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2008-10-30 10:44:34 -0400 |
commit | 255a12fbf994664125983e389c975b4403aea167 (patch) | |
tree | 4b3b6797498dc39f6c7fb445f39d4d8501e91185 /arch/mips | |
parent | 558ce12494e9e0321b77b9f1ef62c16d0b893cf5 (diff) |
MIPS: Use the new byteorder headers
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/include/asm/byteorder.h | 40 |
1 files changed, 16 insertions, 24 deletions
diff --git a/arch/mips/include/asm/byteorder.h b/arch/mips/include/asm/byteorder.h index fe7dc2d59b69..2988d29a0867 100644 --- a/arch/mips/include/asm/byteorder.h +++ b/arch/mips/include/asm/byteorder.h | |||
@@ -11,11 +11,19 @@ | |||
11 | #include <linux/compiler.h> | 11 | #include <linux/compiler.h> |
12 | #include <asm/types.h> | 12 | #include <asm/types.h> |
13 | 13 | ||
14 | #ifdef __GNUC__ | 14 | #if defined(__MIPSEB__) |
15 | # define __BIG_ENDIAN | ||
16 | #elif defined(__MIPSEL__) | ||
17 | # define __LITTLE_ENDIAN | ||
18 | #else | ||
19 | # error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???" | ||
20 | #endif | ||
21 | |||
22 | #define __SWAB_64_THRU_32__ | ||
15 | 23 | ||
16 | #ifdef CONFIG_CPU_MIPSR2 | 24 | #ifdef CONFIG_CPU_MIPSR2 |
17 | 25 | ||
18 | static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) | 26 | static inline __attribute_const__ __u16 __arch_swab16(__u16 x) |
19 | { | 27 | { |
20 | __asm__( | 28 | __asm__( |
21 | " wsbh %0, %1 \n" | 29 | " wsbh %0, %1 \n" |
@@ -24,9 +32,9 @@ static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) | |||
24 | 32 | ||
25 | return x; | 33 | return x; |
26 | } | 34 | } |
27 | #define __arch__swab16(x) ___arch__swab16(x) | 35 | #define __arch_swab16 __arch_swab16 |
28 | 36 | ||
29 | static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) | 37 | static inline __attribute_const__ __u32 __arch_swab32(__u32 x) |
30 | { | 38 | { |
31 | __asm__( | 39 | __asm__( |
32 | " wsbh %0, %1 \n" | 40 | " wsbh %0, %1 \n" |
@@ -36,11 +44,10 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) | |||
36 | 44 | ||
37 | return x; | 45 | return x; |
38 | } | 46 | } |
39 | #define __arch__swab32(x) ___arch__swab32(x) | 47 | #define __arch_swab32 __arch_swab32 |
40 | 48 | ||
41 | #ifdef CONFIG_CPU_MIPS64_R2 | 49 | #ifdef CONFIG_CPU_MIPS64_R2 |
42 | 50 | static inline __attribute_const__ __u64 __arch_swab64(__u64 x) | |
43 | static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) | ||
44 | { | 51 | { |
45 | __asm__( | 52 | __asm__( |
46 | " dsbh %0, %1 \n" | 53 | " dsbh %0, %1 \n" |
@@ -51,26 +58,11 @@ static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) | |||
51 | 58 | ||
52 | return x; | 59 | return x; |
53 | } | 60 | } |
54 | 61 | #define __arch_swab64 __arch_swab64 | |
55 | #define __arch__swab64(x) ___arch__swab64(x) | ||
56 | |||
57 | #endif /* CONFIG_CPU_MIPS64_R2 */ | 62 | #endif /* CONFIG_CPU_MIPS64_R2 */ |
58 | 63 | ||
59 | #endif /* CONFIG_CPU_MIPSR2 */ | 64 | #endif /* CONFIG_CPU_MIPSR2 */ |
60 | 65 | ||
61 | #if !defined(__STRICT_ANSI__) || defined(__KERNEL__) | 66 | #include <linux/byteorder.h> |
62 | # define __BYTEORDER_HAS_U64__ | ||
63 | # define __SWAB_64_THRU_32__ | ||
64 | #endif | ||
65 | |||
66 | #endif /* __GNUC__ */ | ||
67 | |||
68 | #if defined(__MIPSEB__) | ||
69 | # include <linux/byteorder/big_endian.h> | ||
70 | #elif defined(__MIPSEL__) | ||
71 | # include <linux/byteorder/little_endian.h> | ||
72 | #else | ||
73 | # error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???" | ||
74 | #endif | ||
75 | 67 | ||
76 | #endif /* _ASM_BYTEORDER_H */ | 68 | #endif /* _ASM_BYTEORDER_H */ |