aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips
diff options
context:
space:
mode:
authorRalf Baechle <ralf@linux-mips.org>2006-07-06 08:04:01 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-07-13 16:26:04 -0400
commitfc5d2d279ff820172a698706d33e733d4578bd6c (patch)
tree1b376605e1870af29a49272d85cb589d319e058b /arch/mips
parent879ba8c88a32f2bd3d3369837afdc148bd66bb04 (diff)
[MIPS] Use the proper technical term for naming some of the cache macros.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/mm/c-r4k.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 857b726f4d41..ed35ee57b388 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -578,7 +578,7 @@ static inline void local_r4k_flush_icache_page(void *args)
578 * secondary cache will result in any entries in the primary caches 578 * secondary cache will result in any entries in the primary caches
579 * also getting invalidated which hopefully is a bit more economical. 579 * also getting invalidated which hopefully is a bit more economical.
580 */ 580 */
581 if (cpu_has_subset_pcaches) { 581 if (cpu_has_inclusive_pcaches) {
582 unsigned long addr = (unsigned long) page_address(page); 582 unsigned long addr = (unsigned long) page_address(page);
583 583
584 r4k_blast_scache_page(addr); 584 r4k_blast_scache_page(addr);
@@ -634,7 +634,7 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
634 /* Catch bad driver code */ 634 /* Catch bad driver code */
635 BUG_ON(size == 0); 635 BUG_ON(size == 0);
636 636
637 if (cpu_has_subset_pcaches) { 637 if (cpu_has_inclusive_pcaches) {
638 if (size >= scache_size) 638 if (size >= scache_size)
639 r4k_blast_scache(); 639 r4k_blast_scache();
640 else 640 else
@@ -662,7 +662,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
662 /* Catch bad driver code */ 662 /* Catch bad driver code */
663 BUG_ON(size == 0); 663 BUG_ON(size == 0);
664 664
665 if (cpu_has_subset_pcaches) { 665 if (cpu_has_inclusive_pcaches) {
666 if (size >= scache_size) 666 if (size >= scache_size)
667 r4k_blast_scache(); 667 r4k_blast_scache();
668 else 668 else
@@ -1192,7 +1192,7 @@ static void __init setup_scache(void)
1192 printk("Unified secondary cache %ldkB %s, linesize %d bytes.\n", 1192 printk("Unified secondary cache %ldkB %s, linesize %d bytes.\n",
1193 scache_size >> 10, way_string[c->scache.ways], c->scache.linesz); 1193 scache_size >> 10, way_string[c->scache.ways], c->scache.linesz);
1194 1194
1195 c->options |= MIPS_CPU_SUBSET_CACHES; 1195 c->options |= MIPS_CPU_INCLUSIVE_CACHES;
1196} 1196}
1197 1197
1198void au1x00_fixup_config_od(void) 1198void au1x00_fixup_config_od(void)