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authorJayachandran C <jchandra@broadcom.com>2014-04-29 10:37:49 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-05-30 10:49:02 -0400
commit5874743ea8479b780799927f25580ef134547f0f (patch)
treee3e0e661306fc728d06b7a5e8bb8265a91e4d9d3 /arch/mips
parent0d57eba02d6f0685e61763502962fcf00fd4e4cc (diff)
MIPS: Netlogic: Use PRID_IMP_MASK macro
Use PRID_IMP_MASK macro instead of 0xff00 to extract the processor type. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6868/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/include/asm/netlogic/mips-extns.h4
-rw-r--r--arch/mips/include/asm/netlogic/xlp-hal/xlp.h4
-rw-r--r--arch/mips/netlogic/common/reset.S5
-rw-r--r--arch/mips/netlogic/xlp/dt.c2
-rw-r--r--arch/mips/netlogic/xlp/setup.c2
-rw-r--r--arch/mips/netlogic/xlp/wakeup.c2
6 files changed, 10 insertions, 9 deletions
diff --git a/arch/mips/include/asm/netlogic/mips-extns.h b/arch/mips/include/asm/netlogic/mips-extns.h
index de9aada6f4c1..38af905bf07e 100644
--- a/arch/mips/include/asm/netlogic/mips-extns.h
+++ b/arch/mips/include/asm/netlogic/mips-extns.h
@@ -146,9 +146,9 @@ static inline int hard_smp_processor_id(void)
146 146
147static inline int nlm_nodeid(void) 147static inline int nlm_nodeid(void)
148{ 148{
149 uint32_t prid = read_c0_prid(); 149 uint32_t prid = read_c0_prid() & PRID_IMP_MASK;
150 150
151 if ((prid & 0xff00) == PRID_IMP_NETLOGIC_XLP9XX) 151 if (prid == PRID_IMP_NETLOGIC_XLP9XX)
152 return (__read_32bit_c0_register($15, 1) >> 7) & 0x7; 152 return (__read_32bit_c0_register($15, 1) >> 7) & 0x7;
153 else 153 else
154 return (__read_32bit_c0_register($15, 1) >> 5) & 0x3; 154 return (__read_32bit_c0_register($15, 1) >> 5) & 0x3;
diff --git a/arch/mips/include/asm/netlogic/xlp-hal/xlp.h b/arch/mips/include/asm/netlogic/xlp-hal/xlp.h
index bd7dda096506..a11b289956e6 100644
--- a/arch/mips/include/asm/netlogic/xlp-hal/xlp.h
+++ b/arch/mips/include/asm/netlogic/xlp-hal/xlp.h
@@ -99,7 +99,7 @@ void *xlp_dt_init(void *fdtp);
99 99
100static inline int cpu_is_xlpii(void) 100static inline int cpu_is_xlpii(void)
101{ 101{
102 int chip = read_c0_prid() & 0xff00; 102 int chip = read_c0_prid() & PRID_IMP_MASK;
103 103
104 return chip == PRID_IMP_NETLOGIC_XLP2XX || 104 return chip == PRID_IMP_NETLOGIC_XLP2XX ||
105 chip == PRID_IMP_NETLOGIC_XLP9XX; 105 chip == PRID_IMP_NETLOGIC_XLP9XX;
@@ -107,7 +107,7 @@ static inline int cpu_is_xlpii(void)
107 107
108static inline int cpu_is_xlp9xx(void) 108static inline int cpu_is_xlp9xx(void)
109{ 109{
110 int chip = read_c0_prid() & 0xff00; 110 int chip = read_c0_prid() & PRID_IMP_MASK;
111 111
112 return chip == PRID_IMP_NETLOGIC_XLP9XX; 112 return chip == PRID_IMP_NETLOGIC_XLP9XX;
113} 113}
diff --git a/arch/mips/netlogic/common/reset.S b/arch/mips/netlogic/common/reset.S
index 13c1bc5b5988..5b60b469da15 100644
--- a/arch/mips/netlogic/common/reset.S
+++ b/arch/mips/netlogic/common/reset.S
@@ -35,6 +35,7 @@
35 35
36#include <asm/asm.h> 36#include <asm/asm.h>
37#include <asm/asm-offsets.h> 37#include <asm/asm-offsets.h>
38#include <asm/cpu.h>
38#include <asm/cacheops.h> 39#include <asm/cacheops.h>
39#include <asm/regdef.h> 40#include <asm/regdef.h>
40#include <asm/mipsregs.h> 41#include <asm/mipsregs.h>
@@ -92,7 +93,7 @@
92 */ 93 */
93.macro xlp_flush_l1_dcache 94.macro xlp_flush_l1_dcache
94 mfc0 t0, CP0_EBASE, 0 95 mfc0 t0, CP0_EBASE, 0
95 andi t0, t0, 0xff00 96 andi t0, t0, PRID_IMP_MASK
96 slt t1, t0, 0x1200 97 slt t1, t0, 0x1200
97 beqz t1, 15f 98 beqz t1, 15f
98 nop 99 nop
@@ -171,7 +172,7 @@ FEXPORT(nlm_reset_entry)
171 172
1721: /* Entry point on core wakeup */ 1731: /* Entry point on core wakeup */
173 mfc0 t0, CP0_EBASE, 0 /* processor ID */ 174 mfc0 t0, CP0_EBASE, 0 /* processor ID */
174 andi t0, 0xff00 175 andi t0, PRID_IMP_MASK
175 li t1, 0x1500 /* XLP 9xx */ 176 li t1, 0x1500 /* XLP 9xx */
176 beq t0, t1, 2f /* does not need to set coherent */ 177 beq t0, t1, 2f /* does not need to set coherent */
177 nop 178 nop
diff --git a/arch/mips/netlogic/xlp/dt.c b/arch/mips/netlogic/xlp/dt.c
index 5754097b9cde..0b36ac80a232 100644
--- a/arch/mips/netlogic/xlp/dt.c
+++ b/arch/mips/netlogic/xlp/dt.c
@@ -48,7 +48,7 @@ static void *xlp_fdt_blob;
48void __init *xlp_dt_init(void *fdtp) 48void __init *xlp_dt_init(void *fdtp)
49{ 49{
50 if (!fdtp) { 50 if (!fdtp) {
51 switch (current_cpu_data.processor_id & 0xff00) { 51 switch (current_cpu_data.processor_id & PRID_IMP_MASK) {
52#ifdef CONFIG_DT_XLP_GVP 52#ifdef CONFIG_DT_XLP_GVP
53 case PRID_IMP_NETLOGIC_XLP9XX: 53 case PRID_IMP_NETLOGIC_XLP9XX:
54 fdtp = __dtb_xlp_gvp_begin; 54 fdtp = __dtb_xlp_gvp_begin;
diff --git a/arch/mips/netlogic/xlp/setup.c b/arch/mips/netlogic/xlp/setup.c
index 8c60a2dd9ef6..1ddb62bd354b 100644
--- a/arch/mips/netlogic/xlp/setup.c
+++ b/arch/mips/netlogic/xlp/setup.c
@@ -121,7 +121,7 @@ void __init plat_mem_setup(void)
121 121
122const char *get_system_type(void) 122const char *get_system_type(void)
123{ 123{
124 switch (read_c0_prid() & 0xff00) { 124 switch (read_c0_prid() & PRID_IMP_MASK) {
125 case PRID_IMP_NETLOGIC_XLP9XX: 125 case PRID_IMP_NETLOGIC_XLP9XX:
126 case PRID_IMP_NETLOGIC_XLP2XX: 126 case PRID_IMP_NETLOGIC_XLP2XX:
127 return "Broadcom XLPII Series"; 127 return "Broadcom XLPII Series";
diff --git a/arch/mips/netlogic/xlp/wakeup.c b/arch/mips/netlogic/xlp/wakeup.c
index 758923865886..f4823ad6145f 100644
--- a/arch/mips/netlogic/xlp/wakeup.c
+++ b/arch/mips/netlogic/xlp/wakeup.c
@@ -139,7 +139,7 @@ static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask)
139 } else { 139 } else {
140 fusemask = nlm_read_sys_reg(nodep->sysbase, 140 fusemask = nlm_read_sys_reg(nodep->sysbase,
141 SYS_EFUSE_DEVICE_CFG_STATUS0); 141 SYS_EFUSE_DEVICE_CFG_STATUS0);
142 switch (read_c0_prid() & 0xff00) { 142 switch (read_c0_prid() & PRID_IMP_MASK) {
143 case PRID_IMP_NETLOGIC_XLP3XX: 143 case PRID_IMP_NETLOGIC_XLP3XX:
144 mask = 0xf; 144 mask = 0xf;
145 break; 145 break;