diff options
author | Sergei Shtylyov <sshtylyov@ru.mvista.com> | 2008-04-30 15:29:04 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2008-05-12 11:46:55 -0400 |
commit | c3d1d5c8c10c937c65186f6dac75e2fb4675ef07 (patch) | |
tree | 7068d6740a59499be13961643c971a52fe198c7f /arch/mips | |
parent | 6afabe6c9335c0534224b53c3db4b091621af2dd (diff) |
[MIPS] Pb1200/DBAu1200 code style cleanup
Fix several errors and warnings given by checkpatch.pl:
- use of C99 // comments;
- initialization of a 'static' variable to 0;
- space after opening and before closing parentheses;
- missing space between 'for' and opening parenthesis;
- macros with complex values not enclosed in parentheses;
- printk() without KERN_* facility level;
- unnecessary braces for single-statement block;
- using simple_strtol() where strict_strtol() could be used;
- line over 80 characters.
In addition to these changes, also do the following:
- mention DBAu1200 board in the Makefile;
- replace the group of #include/#ifdef directives by a single
#include <au1xxx.h> since this header contains the needed stuff;
- properly indent the blocks;
- insert spaces between operator and its operands, remove excess spaces
there;
- remove needless parentheses and add some for clarity;
- replace numeric literals/expressions with the matching macros;
- remove space after the type cast's closing parenthesis;
- reduce pb1200_setup_cascade() to the single 'return' statement;
- reduce the number of printed empty lines in the so-called CPLD
workaround;
- remove #undef AU1X00_EXTERNAL_INT since that macro is not defined
anywhere;
- replace spaces after the macro name with tabs in the #define directives;
- remove excess tabs after the macro name in the #define directives;
- fix typo in the BCSR_RESETS_PWMR1mUX macro's name;
- group all Pb1200 PCMCIA definitions together;
- put the function's result type and name/parameters on the same line;
- insert missing and remove excess new lines;
- make the multi-line comment style consistent with the kernel style
elsewhere by adding empty first line and/or adding space/asterisk on
their left side;
- fix typos/errors, capitalize acronyms, etc. in the comments;
- combine some comments;
- update MontaVista copyright;
- remove Pete Popov's old email address...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/au1000/pb1200/Makefile | 2 | ||||
-rw-r--r-- | arch/mips/au1000/pb1200/board_setup.c | 139 | ||||
-rw-r--r-- | arch/mips/au1000/pb1200/init.c | 18 | ||||
-rw-r--r-- | arch/mips/au1000/pb1200/irqmap.c | 66 |
4 files changed, 105 insertions, 120 deletions
diff --git a/arch/mips/au1000/pb1200/Makefile b/arch/mips/au1000/pb1200/Makefile index 4fe02ea65a60..d678adf7ce85 100644 --- a/arch/mips/au1000/pb1200/Makefile +++ b/arch/mips/au1000/pb1200/Makefile | |||
@@ -1,5 +1,5 @@ | |||
1 | # | 1 | # |
2 | # Makefile for the Alchemy Semiconductor PB1200 board. | 2 | # Makefile for the Alchemy Semiconductor Pb1200/DBAu1200 boards. |
3 | # | 3 | # |
4 | 4 | ||
5 | lib-y := init.o board_setup.o irqmap.o | 5 | lib-y := init.o board_setup.o irqmap.o |
diff --git a/arch/mips/au1000/pb1200/board_setup.c b/arch/mips/au1000/pb1200/board_setup.c index 4493a792cc4c..6cb2115059ad 100644 --- a/arch/mips/au1000/pb1200/board_setup.c +++ b/arch/mips/au1000/pb1200/board_setup.c | |||
@@ -27,16 +27,8 @@ | |||
27 | #include <linux/init.h> | 27 | #include <linux/init.h> |
28 | #include <linux/sched.h> | 28 | #include <linux/sched.h> |
29 | 29 | ||
30 | #include <au1000.h> | ||
31 | #include <prom.h> | 30 | #include <prom.h> |
32 | 31 | #include <au1xxx.h> | |
33 | #ifdef CONFIG_MIPS_PB1200 | ||
34 | #include <asm/mach-pb1x00/pb1200.h> | ||
35 | #endif | ||
36 | |||
37 | #ifdef CONFIG_MIPS_DB1200 | ||
38 | #include <asm/mach-db1x00/db1200.h> | ||
39 | #endif | ||
40 | 32 | ||
41 | extern void _board_init_irq(void); | 33 | extern void _board_init_irq(void); |
42 | extern void (*board_init_irq)(void); | 34 | extern void (*board_init_irq)(void); |
@@ -53,56 +45,57 @@ void __init board_setup(void) | |||
53 | 45 | ||
54 | #if 0 | 46 | #if 0 |
55 | { | 47 | { |
56 | u32 pin_func; | 48 | u32 pin_func; |
57 | 49 | ||
58 | /* Enable PSC1 SYNC for AC97. Normaly done in audio driver, | 50 | /* |
59 | * but it is board specific code, so put it here. | 51 | * Enable PSC1 SYNC for AC97. Normaly done in audio driver, |
60 | */ | 52 | * but it is board specific code, so put it here. |
61 | pin_func = au_readl(SYS_PINFUNC); | 53 | */ |
62 | au_sync(); | 54 | pin_func = au_readl(SYS_PINFUNC); |
63 | pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1; | 55 | au_sync(); |
64 | au_writel(pin_func, SYS_PINFUNC); | 56 | pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1; |
65 | 57 | au_writel(pin_func, SYS_PINFUNC); | |
66 | au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */ | 58 | |
67 | au_sync(); | 59 | au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */ |
60 | au_sync(); | ||
68 | } | 61 | } |
69 | #endif | 62 | #endif |
70 | 63 | ||
71 | #if defined(CONFIG_I2C_AU1550) | 64 | #if defined(CONFIG_I2C_AU1550) |
72 | { | 65 | { |
73 | u32 freq0, clksrc; | 66 | u32 freq0, clksrc; |
74 | u32 pin_func; | 67 | u32 pin_func; |
75 | 68 | ||
76 | /* Select SMBUS in CPLD */ | 69 | /* Select SMBus in CPLD */ |
77 | bcsr->resets &= ~(BCSR_RESETS_PCS0MUX); | 70 | bcsr->resets &= ~BCSR_RESETS_PCS0MUX; |
78 | 71 | ||
79 | pin_func = au_readl(SYS_PINFUNC); | 72 | pin_func = au_readl(SYS_PINFUNC); |
80 | au_sync(); | 73 | au_sync(); |
81 | pin_func &= ~(3<<17 | 1<<4); | 74 | pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B); |
82 | /* Set GPIOs correctly */ | 75 | /* Set GPIOs correctly */ |
83 | pin_func |= 2<<17; | 76 | pin_func |= 2 << 17; |
84 | au_writel(pin_func, SYS_PINFUNC); | 77 | au_writel(pin_func, SYS_PINFUNC); |
85 | au_sync(); | 78 | au_sync(); |
86 | 79 | ||
87 | /* The i2c driver depends on 50Mhz clock */ | 80 | /* The I2C driver depends on 50 MHz clock */ |
88 | freq0 = au_readl(SYS_FREQCTRL0); | 81 | freq0 = au_readl(SYS_FREQCTRL0); |
89 | au_sync(); | 82 | au_sync(); |
90 | freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1); | 83 | freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1); |
91 | freq0 |= (3<<SYS_FC_FRDIV1_BIT); | 84 | freq0 |= 3 << SYS_FC_FRDIV1_BIT; |
92 | /* 396Mhz / (3+1)*2 == 49.5Mhz */ | 85 | /* 396 MHz / (3 + 1) * 2 == 49.5 MHz */ |
93 | au_writel(freq0, SYS_FREQCTRL0); | 86 | au_writel(freq0, SYS_FREQCTRL0); |
94 | au_sync(); | 87 | au_sync(); |
95 | freq0 |= SYS_FC_FE1; | 88 | freq0 |= SYS_FC_FE1; |
96 | au_writel(freq0, SYS_FREQCTRL0); | 89 | au_writel(freq0, SYS_FREQCTRL0); |
97 | au_sync(); | 90 | au_sync(); |
98 | 91 | ||
99 | clksrc = au_readl(SYS_CLKSRC); | 92 | clksrc = au_readl(SYS_CLKSRC); |
100 | au_sync(); | 93 | au_sync(); |
101 | clksrc &= ~0x01f00000; | 94 | clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK); |
102 | /* bit 22 is EXTCLK0 for PSC0 */ | 95 | /* Bit 22 is EXTCLK0 for PSC0 */ |
103 | clksrc |= (0x3 << 22); | 96 | clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT; |
104 | au_writel(clksrc, SYS_CLKSRC); | 97 | au_writel(clksrc, SYS_CLKSRC); |
105 | au_sync(); | 98 | au_sync(); |
106 | } | 99 | } |
107 | #endif | 100 | #endif |
108 | 101 | ||
@@ -116,27 +109,27 @@ void __init board_setup(void) | |||
116 | #endif | 109 | #endif |
117 | #endif | 110 | #endif |
118 | 111 | ||
119 | /* The Pb1200 development board uses external MUX for PSC0 to | 112 | /* |
120 | support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI | 113 | * The Pb1200 development board uses external MUX for PSC0 to |
121 | */ | 114 | * support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI |
115 | */ | ||
122 | #ifdef CONFIG_I2C_AU1550 | 116 | #ifdef CONFIG_I2C_AU1550 |
123 | bcsr->resets &= (~BCSR_RESETS_PCS0MUX); | 117 | bcsr->resets &= ~BCSR_RESETS_PCS0MUX; |
124 | #endif | 118 | #endif |
125 | au_sync(); | 119 | au_sync(); |
126 | 120 | ||
127 | #ifdef CONFIG_MIPS_PB1200 | 121 | #ifdef CONFIG_MIPS_PB1200 |
128 | printk("AMD Alchemy Pb1200 Board\n"); | 122 | printk(KERN_INFO "AMD Alchemy Pb1200 Board\n"); |
129 | #endif | 123 | #endif |
130 | #ifdef CONFIG_MIPS_DB1200 | 124 | #ifdef CONFIG_MIPS_DB1200 |
131 | printk("AMD Alchemy Db1200 Board\n"); | 125 | printk(KERN_INFO "AMD Alchemy Db1200 Board\n"); |
132 | #endif | 126 | #endif |
133 | 127 | ||
134 | /* Setup Pb1200 External Interrupt Controller */ | 128 | /* Setup Pb1200 External Interrupt Controller */ |
135 | board_init_irq = _board_init_irq; | 129 | board_init_irq = _board_init_irq; |
136 | } | 130 | } |
137 | 131 | ||
138 | int | 132 | int board_au1200fb_panel(void) |
139 | board_au1200fb_panel(void) | ||
140 | { | 133 | { |
141 | BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; | 134 | BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; |
142 | int p; | 135 | int p; |
@@ -147,23 +140,23 @@ board_au1200fb_panel(void) | |||
147 | return p; | 140 | return p; |
148 | } | 141 | } |
149 | 142 | ||
150 | int | 143 | int board_au1200fb_panel_init(void) |
151 | board_au1200fb_panel_init(void) | ||
152 | { | 144 | { |
153 | /* Apply power */ | 145 | /* Apply power */ |
154 | BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; | 146 | BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; |
155 | bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL); | 147 | |
156 | /*printk("board_au1200fb_panel_init()\n"); */ | 148 | bcsr->board |= BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL; |
149 | /* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */ | ||
157 | return 0; | 150 | return 0; |
158 | } | 151 | } |
159 | 152 | ||
160 | int | 153 | int board_au1200fb_panel_shutdown(void) |
161 | board_au1200fb_panel_shutdown(void) | ||
162 | { | 154 | { |
163 | /* Remove power */ | 155 | /* Remove power */ |
164 | BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; | 156 | BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; |
165 | bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL); | 157 | |
166 | /*printk("board_au1200fb_panel_shutdown()\n"); */ | 158 | bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | |
159 | BCSR_BOARD_LCDBL); | ||
160 | /* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */ | ||
167 | return 0; | 161 | return 0; |
168 | } | 162 | } |
169 | |||
diff --git a/arch/mips/au1000/pb1200/init.c b/arch/mips/au1000/pb1200/init.c index 72af5500660b..09fd63b86062 100644 --- a/arch/mips/au1000/pb1200/init.c +++ b/arch/mips/au1000/pb1200/init.c | |||
@@ -3,9 +3,8 @@ | |||
3 | * BRIEF MODULE DESCRIPTION | 3 | * BRIEF MODULE DESCRIPTION |
4 | * PB1200 board setup | 4 | * PB1200 board setup |
5 | * | 5 | * |
6 | * Copyright 2001 MontaVista Software Inc. | 6 | * Copyright 2001, 2008 MontaVista Software Inc. |
7 | * Author: MontaVista Software, Inc. | 7 | * Author: MontaVista Software, Inc. <source@mvista.com> |
8 | * ppopov@mvista.com or source@mvista.com | ||
9 | * | 8 | * |
10 | * This program is free software; you can redistribute it and/or modify it | 9 | * This program is free software; you can redistribute it and/or modify it |
11 | * under the terms of the GNU General Public License as published by the | 10 | * under the terms of the GNU General Public License as published by the |
@@ -45,16 +44,15 @@ void __init prom_init(void) | |||
45 | unsigned char *memsize_str; | 44 | unsigned char *memsize_str; |
46 | unsigned long memsize; | 45 | unsigned long memsize; |
47 | 46 | ||
48 | prom_argc = (int) fw_arg0; | 47 | prom_argc = (int)fw_arg0; |
49 | prom_argv = (char **) fw_arg1; | 48 | prom_argv = (char **)fw_arg1; |
50 | prom_envp = (char **) fw_arg2; | 49 | prom_envp = (char **)fw_arg2; |
51 | 50 | ||
52 | prom_init_cmdline(); | 51 | prom_init_cmdline(); |
53 | memsize_str = prom_getenv("memsize"); | 52 | memsize_str = prom_getenv("memsize"); |
54 | if (!memsize_str) { | 53 | if (!memsize_str) |
55 | memsize = 0x08000000; | 54 | memsize = 0x08000000; |
56 | } else { | 55 | else |
57 | memsize = simple_strtol(memsize_str, NULL, 0); | 56 | memsize = strict_strtol(memsize_str, 0, NULL); |
58 | } | ||
59 | add_memory_region(0, memsize, BOOT_MEM_RAM); | 57 | add_memory_region(0, memsize, BOOT_MEM_RAM); |
60 | } | 58 | } |
diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c index e61eb8e0b76b..2a505ad8715b 100644 --- a/arch/mips/au1000/pb1200/irqmap.c +++ b/arch/mips/au1000/pb1200/irqmap.c | |||
@@ -39,25 +39,25 @@ | |||
39 | #endif | 39 | #endif |
40 | 40 | ||
41 | struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { | 41 | struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { |
42 | { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade | 42 | /* This is external interrupt cascade */ |
43 | { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, | ||
43 | }; | 44 | }; |
44 | 45 | ||
45 | int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map); | 46 | int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map); |
46 | 47 | ||
47 | /* | 48 | /* |
48 | * Support for External interrupts on the PbAu1200 Development platform. | 49 | * Support for External interrupts on the Pb1200 Development platform. |
49 | */ | 50 | */ |
50 | static volatile int pb1200_cascade_en=0; | 51 | static volatile int pb1200_cascade_en; |
51 | 52 | ||
52 | irqreturn_t pb1200_cascade_handler( int irq, void *dev_id) | 53 | irqreturn_t pb1200_cascade_handler(int irq, void *dev_id) |
53 | { | 54 | { |
54 | unsigned short bisr = bcsr->int_status; | 55 | unsigned short bisr = bcsr->int_status; |
55 | int extirq_nr = 0; | 56 | int extirq_nr = 0; |
56 | 57 | ||
57 | /* Clear all the edge interrupts. This has no effect on level */ | 58 | /* Clear all the edge interrupts. This has no effect on level. */ |
58 | bcsr->int_status = bisr; | 59 | bcsr->int_status = bisr; |
59 | for( ; bisr; bisr &= (bisr-1) ) | 60 | for ( ; bisr; bisr &= bisr - 1) { |
60 | { | ||
61 | extirq_nr = PB1200_INT_BEGIN + __ffs(bisr); | 61 | extirq_nr = PB1200_INT_BEGIN + __ffs(bisr); |
62 | /* Ack and dispatch IRQ */ | 62 | /* Ack and dispatch IRQ */ |
63 | do_IRQ(extirq_nr); | 63 | do_IRQ(extirq_nr); |
@@ -68,26 +68,20 @@ irqreturn_t pb1200_cascade_handler( int irq, void *dev_id) | |||
68 | 68 | ||
69 | inline void pb1200_enable_irq(unsigned int irq_nr) | 69 | inline void pb1200_enable_irq(unsigned int irq_nr) |
70 | { | 70 | { |
71 | bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN); | 71 | bcsr->intset_mask = 1 << (irq_nr - PB1200_INT_BEGIN); |
72 | bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN); | 72 | bcsr->intset = 1 << (irq_nr - PB1200_INT_BEGIN); |
73 | } | 73 | } |
74 | 74 | ||
75 | inline void pb1200_disable_irq(unsigned int irq_nr) | 75 | inline void pb1200_disable_irq(unsigned int irq_nr) |
76 | { | 76 | { |
77 | bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN); | 77 | bcsr->intclr_mask = 1 << (irq_nr - PB1200_INT_BEGIN); |
78 | bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN); | 78 | bcsr->intclr = 1 << (irq_nr - PB1200_INT_BEGIN); |
79 | } | 79 | } |
80 | 80 | ||
81 | static unsigned int pb1200_setup_cascade(void) | 81 | static unsigned int pb1200_setup_cascade(void) |
82 | { | 82 | { |
83 | int err; | 83 | return request_irq(AU1000_GPIO_7, &pb1200_cascade_handler, |
84 | 84 | 0, "Pb1200 Cascade", &pb1200_cascade_handler); | |
85 | err = request_irq(AU1000_GPIO_7, &pb1200_cascade_handler, | ||
86 | 0, "Pb1200 Cascade", &pb1200_cascade_handler); | ||
87 | if (err) | ||
88 | return err; | ||
89 | |||
90 | return 0; | ||
91 | } | 85 | } |
92 | 86 | ||
93 | static unsigned int pb1200_startup_irq(unsigned int irq) | 87 | static unsigned int pb1200_startup_irq(unsigned int irq) |
@@ -132,23 +126,23 @@ void _board_init_irq(void) | |||
132 | unsigned int irq; | 126 | unsigned int irq; |
133 | 127 | ||
134 | #ifdef CONFIG_MIPS_PB1200 | 128 | #ifdef CONFIG_MIPS_PB1200 |
135 | /* We have a problem with CPLD rev3. Enable a workaround */ | 129 | /* We have a problem with CPLD rev 3. */ |
136 | if (((bcsr->whoami & BCSR_WHOAMI_CPLD) >> 4) <= 3) { | 130 | if (((bcsr->whoami & BCSR_WHOAMI_CPLD) >> 4) <= 3) { |
137 | printk("\nWARNING!!!\n"); | 131 | printk(KERN_ERR "WARNING!!!\n"); |
138 | printk("\nWARNING!!!\n"); | 132 | printk(KERN_ERR "WARNING!!!\n"); |
139 | printk("\nWARNING!!!\n"); | 133 | printk(KERN_ERR "WARNING!!!\n"); |
140 | printk("\nWARNING!!!\n"); | 134 | printk(KERN_ERR "WARNING!!!\n"); |
141 | printk("\nWARNING!!!\n"); | 135 | printk(KERN_ERR "WARNING!!!\n"); |
142 | printk("\nWARNING!!!\n"); | 136 | printk(KERN_ERR "WARNING!!!\n"); |
143 | printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n"); | 137 | printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n"); |
144 | printk("updated to latest revision. This software will not\n"); | 138 | printk(KERN_ERR "updated to latest revision. This software will\n"); |
145 | printk("work on anything less than CPLD rev4\n"); | 139 | printk(KERN_ERR "not work on anything less than CPLD rev 4.\n"); |
146 | printk("\nWARNING!!!\n"); | 140 | printk(KERN_ERR "WARNING!!!\n"); |
147 | printk("\nWARNING!!!\n"); | 141 | printk(KERN_ERR "WARNING!!!\n"); |
148 | printk("\nWARNING!!!\n"); | 142 | printk(KERN_ERR "WARNING!!!\n"); |
149 | printk("\nWARNING!!!\n"); | 143 | printk(KERN_ERR "WARNING!!!\n"); |
150 | printk("\nWARNING!!!\n"); | 144 | printk(KERN_ERR "WARNING!!!\n"); |
151 | printk("\nWARNING!!!\n"); | 145 | printk(KERN_ERR "WARNING!!!\n"); |
152 | panic("Game over. Your score is 0."); | 146 | panic("Game over. Your score is 0."); |
153 | } | 147 | } |
154 | #endif | 148 | #endif |
@@ -161,6 +155,6 @@ void _board_init_irq(void) | |||
161 | 155 | ||
162 | /* | 156 | /* |
163 | * GPIO_7 can not be hooked here, so it is hooked upon first | 157 | * GPIO_7 can not be hooked here, so it is hooked upon first |
164 | * request of any source attached to the cascade | 158 | * request of any source attached to the cascade. |
165 | */ | 159 | */ |
166 | } | 160 | } |