aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips
diff options
context:
space:
mode:
authorWu Zhangjin <wuzhangjin@gmail.com>2010-05-06 13:29:47 -0400
committerRalf Baechle <ralf@linux-mips.org>2010-05-21 16:31:19 -0400
commit852151bdb992874b3d625444a8c7c551f3a738b5 (patch)
tree8ad2e932119a9d20d9cc86242290d2ddfa0e555e /arch/mips
parent6d8c2873e06626c371bdedd5e00b00a60d3fde41 (diff)
MIPS: Oprofile: Loongson: Cleanup of the macros
The _EXL, _KERNEL etc. bits are in the performance control register so use _PERFCTRL prefix instead of _PERFCNT. While at it make the macro more readable, use _ENABLE instead of _INT_EN suffix to describe the interrupt enable bit. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1203/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/oprofile/op_model_loongson2.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c
index deefcee69a69..515f7790c048 100644
--- a/arch/mips/oprofile/op_model_loongson2.c
+++ b/arch/mips/oprofile/op_model_loongson2.c
@@ -24,16 +24,16 @@
24 */ 24 */
25#define LOONGSON2_CPU_TYPE "mips/loongson2" 25#define LOONGSON2_CPU_TYPE "mips/loongson2"
26 26
27#define LOONGSON2_PERFCNT_OVERFLOW (1ULL << 31)
28
29#define LOONGSON2_PERFCTRL_EXL (1UL << 0)
30#define LOONGSON2_PERFCTRL_KERNEL (1UL << 1)
31#define LOONGSON2_PERFCTRL_SUPERVISOR (1UL << 2)
32#define LOONGSON2_PERFCTRL_USER (1UL << 3)
33#define LOONGSON2_PERFCTRL_ENABLE (1UL << 4)
27#define LOONGSON2_PERFCTRL_EVENT(idx, event) \ 34#define LOONGSON2_PERFCTRL_EVENT(idx, event) \
28 (((event) & 0x0f) << ((idx) ? 9 : 5)) 35 (((event) & 0x0f) << ((idx) ? 9 : 5))
29 36
30#define LOONGSON2_PERFCNT_EXL (1UL << 0)
31#define LOONGSON2_PERFCNT_KERNEL (1UL << 1)
32#define LOONGSON2_PERFCNT_SUPERVISOR (1UL << 2)
33#define LOONGSON2_PERFCNT_USER (1UL << 3)
34#define LOONGSON2_PERFCNT_INT_EN (1UL << 4)
35#define LOONGSON2_PERFCNT_OVERFLOW (1ULL << 31)
36
37/* Loongson2 performance counter register */ 37/* Loongson2 performance counter register */
38#define read_c0_perfctrl() __read_64bit_c0_register($24, 0) 38#define read_c0_perfctrl() __read_64bit_c0_register($24, 0)
39#define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val) 39#define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val)
@@ -70,11 +70,11 @@ static void loongson2_reg_setup(struct op_counter_config *cfg)
70 } 70 }
71 71
72 if (cfg[0].enabled || cfg[1].enabled) { 72 if (cfg[0].enabled || cfg[1].enabled) {
73 ctrl |= LOONGSON2_PERFCNT_EXL | LOONGSON2_PERFCNT_INT_EN; 73 ctrl |= LOONGSON2_PERFCTRL_EXL | LOONGSON2_PERFCTRL_ENABLE;
74 if (cfg[0].kernel || cfg[1].kernel) 74 if (cfg[0].kernel || cfg[1].kernel)
75 ctrl |= LOONGSON2_PERFCNT_KERNEL; 75 ctrl |= LOONGSON2_PERFCTRL_KERNEL;
76 if (cfg[0].user || cfg[1].user) 76 if (cfg[0].user || cfg[1].user)
77 ctrl |= LOONGSON2_PERFCNT_USER; 77 ctrl |= LOONGSON2_PERFCTRL_USER;
78 } 78 }
79 79
80 reg.ctrl = ctrl; 80 reg.ctrl = ctrl;
@@ -119,7 +119,7 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
119 */ 119 */
120 120
121 /* Check whether the irq belongs to me */ 121 /* Check whether the irq belongs to me */
122 enabled = read_c0_perfctrl() & LOONGSON2_PERFCNT_INT_EN; 122 enabled = read_c0_perfctrl() & LOONGSON2_PERFCTRL_ENABLE;
123 if (!enabled) 123 if (!enabled)
124 return IRQ_NONE; 124 return IRQ_NONE;
125 enabled = reg.cnt1_enabled | reg.cnt2_enabled; 125 enabled = reg.cnt1_enabled | reg.cnt2_enabled;