diff options
| author | Chris Dearman <chris@mips.com> | 2007-05-24 17:30:18 -0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-06-11 13:20:53 -0400 |
| commit | acaec427bc81199da41fb000ab1979041ebc3289 (patch) | |
| tree | 15d767c4ebe7c312c9b968a19634b2a929c6308e /arch/mips | |
| parent | da9bc7263dc7e32d52dd922fe3f46eb7107c0143 (diff) | |
[MIPS] Always install the DSP exception handler.
Some non-DSP enabled cores 24K / 34K can generate a DSP exception where they
are actually expected to produce a reserved instruction exception.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/kernel/traps.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 3f58b6ac1358..48c8b2597142 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
| @@ -1531,8 +1531,7 @@ void __init trap_init(void) | |||
| 1531 | if (cpu_has_mipsmt) | 1531 | if (cpu_has_mipsmt) |
| 1532 | set_except_vector(25, handle_mt); | 1532 | set_except_vector(25, handle_mt); |
| 1533 | 1533 | ||
| 1534 | if (cpu_has_dsp) | 1534 | set_except_vector(26, handle_dsp); |
| 1535 | set_except_vector(26, handle_dsp); | ||
| 1536 | 1535 | ||
| 1537 | if (cpu_has_vce) | 1536 | if (cpu_has_vce) |
| 1538 | /* Special exception: R4[04]00 uses also the divec space. */ | 1537 | /* Special exception: R4[04]00 uses also the divec space. */ |