diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2005-10-23 08:58:21 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 14:32:52 -0400 |
commit | 3fccc0150e720ff344b5f9c5f8dd23778139018e (patch) | |
tree | f26a8dc6b6dbf7ce8eeb409915bc934e415a5d16 /arch/mips | |
parent | 3c5c8f6748ce5a4a63ac7d025ddca4a01574a1a7 (diff) |
Fix all the get_user / put_user related sparse warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/math-emu/cp1emu.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index 99ffaa3d52b6..c4a7853c5714 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c | |||
@@ -209,7 +209,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx) | |||
209 | void * emulpc, *contpc; | 209 | void * emulpc, *contpc; |
210 | unsigned int cond; | 210 | unsigned int cond; |
211 | 211 | ||
212 | if (get_user(ir, (mips_instruction *) xcp->cp0_epc)) { | 212 | if (get_user(ir, (mips_instruction __user *) xcp->cp0_epc)) { |
213 | fpuemustats.errors++; | 213 | fpuemustats.errors++; |
214 | return SIGBUS; | 214 | return SIGBUS; |
215 | } | 215 | } |
@@ -240,7 +240,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx) | |||
240 | #endif | 240 | #endif |
241 | return SIGILL; | 241 | return SIGILL; |
242 | } | 242 | } |
243 | if (get_user(ir, (mips_instruction *) emulpc)) { | 243 | if (get_user(ir, (mips_instruction __user *) emulpc)) { |
244 | fpuemustats.errors++; | 244 | fpuemustats.errors++; |
245 | return SIGBUS; | 245 | return SIGBUS; |
246 | } | 246 | } |
@@ -258,7 +258,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx) | |||
258 | switch (MIPSInst_OPCODE(ir)) { | 258 | switch (MIPSInst_OPCODE(ir)) { |
259 | #ifndef SINGLE_ONLY_FPU | 259 | #ifndef SINGLE_ONLY_FPU |
260 | case ldc1_op:{ | 260 | case ldc1_op:{ |
261 | u64 *va = (void *) (xcp->regs[MIPSInst_RS(ir)] + | 261 | u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] + |
262 | MIPSInst_SIMM(ir)); | 262 | MIPSInst_SIMM(ir)); |
263 | u64 val; | 263 | u64 val; |
264 | 264 | ||
@@ -272,7 +272,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx) | |||
272 | } | 272 | } |
273 | 273 | ||
274 | case sdc1_op:{ | 274 | case sdc1_op:{ |
275 | u64 *va = (void *) (xcp->regs[MIPSInst_RS(ir)] + | 275 | u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] + |
276 | MIPSInst_SIMM(ir)); | 276 | MIPSInst_SIMM(ir)); |
277 | u64 val; | 277 | u64 val; |
278 | 278 | ||
@@ -287,7 +287,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx) | |||
287 | #endif | 287 | #endif |
288 | 288 | ||
289 | case lwc1_op:{ | 289 | case lwc1_op:{ |
290 | u32 *va = (void *) (xcp->regs[MIPSInst_RS(ir)] + | 290 | u32 __user *va = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] + |
291 | MIPSInst_SIMM(ir)); | 291 | MIPSInst_SIMM(ir)); |
292 | u32 val; | 292 | u32 val; |
293 | 293 | ||
@@ -307,7 +307,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx) | |||
307 | } | 307 | } |
308 | 308 | ||
309 | case swc1_op:{ | 309 | case swc1_op:{ |
310 | u32 *va = (void *) (xcp->regs[MIPSInst_RS(ir)] + | 310 | u32 __user *va = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] + |
311 | MIPSInst_SIMM(ir)); | 311 | MIPSInst_SIMM(ir)); |
312 | u32 val; | 312 | u32 val; |
313 | 313 | ||
@@ -458,8 +458,8 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx) | |||
458 | (xcp->cp0_epc + | 458 | (xcp->cp0_epc + |
459 | (MIPSInst_SIMM(ir) << 2)); | 459 | (MIPSInst_SIMM(ir) << 2)); |
460 | 460 | ||
461 | if (get_user(ir, (mips_instruction *) | 461 | if (get_user(ir, |
462 | (void *) xcp->cp0_epc)) { | 462 | (mips_instruction __user *) xcp->cp0_epc)) { |
463 | fpuemustats.errors++; | 463 | fpuemustats.errors++; |
464 | return SIGBUS; | 464 | return SIGBUS; |
465 | } | 465 | } |
@@ -633,12 +633,12 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx, | |||
633 | 633 | ||
634 | ieee754sp(*handler) (ieee754sp, ieee754sp, ieee754sp); | 634 | ieee754sp(*handler) (ieee754sp, ieee754sp, ieee754sp); |
635 | ieee754sp fd, fr, fs, ft; | 635 | ieee754sp fd, fr, fs, ft; |
636 | u32 *va; | 636 | u32 __user *va; |
637 | u32 val; | 637 | u32 val; |
638 | 638 | ||
639 | switch (MIPSInst_FUNC(ir)) { | 639 | switch (MIPSInst_FUNC(ir)) { |
640 | case lwxc1_op: | 640 | case lwxc1_op: |
641 | va = (void *) (xcp->regs[MIPSInst_FR(ir)] + | 641 | va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + |
642 | xcp->regs[MIPSInst_FT(ir)]); | 642 | xcp->regs[MIPSInst_FT(ir)]); |
643 | 643 | ||
644 | fpuemustats.loads++; | 644 | fpuemustats.loads++; |
@@ -658,7 +658,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx, | |||
658 | break; | 658 | break; |
659 | 659 | ||
660 | case swxc1_op: | 660 | case swxc1_op: |
661 | va = (void *) (xcp->regs[MIPSInst_FR(ir)] + | 661 | va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + |
662 | xcp->regs[MIPSInst_FT(ir)]); | 662 | xcp->regs[MIPSInst_FT(ir)]); |
663 | 663 | ||
664 | fpuemustats.stores++; | 664 | fpuemustats.stores++; |
@@ -727,12 +727,12 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx, | |||
727 | case d_fmt:{ /* 1 */ | 727 | case d_fmt:{ /* 1 */ |
728 | ieee754dp(*handler) (ieee754dp, ieee754dp, ieee754dp); | 728 | ieee754dp(*handler) (ieee754dp, ieee754dp, ieee754dp); |
729 | ieee754dp fd, fr, fs, ft; | 729 | ieee754dp fd, fr, fs, ft; |
730 | u64 *va; | 730 | u64 __user *va; |
731 | u64 val; | 731 | u64 val; |
732 | 732 | ||
733 | switch (MIPSInst_FUNC(ir)) { | 733 | switch (MIPSInst_FUNC(ir)) { |
734 | case ldxc1_op: | 734 | case ldxc1_op: |
735 | va = (void *) (xcp->regs[MIPSInst_FR(ir)] + | 735 | va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + |
736 | xcp->regs[MIPSInst_FT(ir)]); | 736 | xcp->regs[MIPSInst_FT(ir)]); |
737 | 737 | ||
738 | fpuemustats.loads++; | 738 | fpuemustats.loads++; |
@@ -744,7 +744,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx, | |||
744 | break; | 744 | break; |
745 | 745 | ||
746 | case sdxc1_op: | 746 | case sdxc1_op: |
747 | va = (void *) (xcp->regs[MIPSInst_FR(ir)] + | 747 | va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + |
748 | xcp->regs[MIPSInst_FT(ir)]); | 748 | xcp->regs[MIPSInst_FT(ir)]); |
749 | 749 | ||
750 | fpuemustats.stores++; | 750 | fpuemustats.stores++; |
@@ -1298,7 +1298,7 @@ int fpu_emulator_cop1Handler(struct pt_regs *xcp, | |||
1298 | do { | 1298 | do { |
1299 | prevepc = xcp->cp0_epc; | 1299 | prevepc = xcp->cp0_epc; |
1300 | 1300 | ||
1301 | if (get_user(insn, (mips_instruction *) xcp->cp0_epc)) { | 1301 | if (get_user(insn, (mips_instruction __user *) xcp->cp0_epc)) { |
1302 | fpuemustats.errors++; | 1302 | fpuemustats.errors++; |
1303 | return SIGBUS; | 1303 | return SIGBUS; |
1304 | } | 1304 | } |