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authorRalf Baechle <ralf@linux-mips.org>2006-06-25 11:42:21 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-07-13 16:25:56 -0400
commit8717433ccae06788e58d55699027b47d042be1f4 (patch)
tree38d21d3326cc49f14de3432bb652a90cdf3ebb9b /arch/mips
parent25969354a385f347b55aafb1040dfc21263fa7c3 (diff)
[MIPS] IP27: Don't destroy interrupt routing information on shutdown irq.
This fixes the "not syncing: Could not identify cpu/level ..." panic when a PCI irq is requested the second time. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/sgi-ip27/ip27-irq.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index 597ec73359b7..52dad1be6265 100644
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -296,7 +296,6 @@ static void shutdown_bridge_irq(unsigned int irq)
296 struct bridge_controller *bc = IRQ_TO_BRIDGE(irq); 296 struct bridge_controller *bc = IRQ_TO_BRIDGE(irq);
297 struct hub_data *hub = hub_data(cpu_to_node(bc->irq_cpu)); 297 struct hub_data *hub = hub_data(cpu_to_node(bc->irq_cpu));
298 bridge_t *bridge = bc->base; 298 bridge_t *bridge = bc->base;
299 struct slice_data *si = cpu_data[bc->irq_cpu].data;
300 int pin, swlevel; 299 int pin, swlevel;
301 cpuid_t cpu; 300 cpuid_t cpu;
302 301
@@ -311,7 +310,6 @@ static void shutdown_bridge_irq(unsigned int irq)
311 intr_disconnect_level(cpu, swlevel); 310 intr_disconnect_level(cpu, swlevel);
312 311
313 __clear_bit(swlevel, hub->irq_alloc_mask); 312 __clear_bit(swlevel, hub->irq_alloc_mask);
314 si->level_to_irq[swlevel] = -1;
315 313
316 bridge->b_int_enable &= ~(1 << pin); 314 bridge->b_int_enable &= ~(1 << pin);
317 bridge->b_wid_tflush; 315 bridge->b_wid_tflush;