diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2005-09-03 18:56:16 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@evo.osdl.org> | 2005-09-05 03:06:06 -0400 |
commit | 875d43e72b5bf22161a81de7554f88eccf8a51ae (patch) | |
tree | a676fe7298b478b7ee9fe7be9cb07c9a0b928370 /arch/mips | |
parent | 63fb6fd1c86181d9dd9ba0e6e6082799e149b56b (diff) |
[PATCH] mips: clean up 32/64-bit configuration
Start cleaning 32-bit vs. 64-bit configuration.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/mips')
72 files changed, 224 insertions, 213 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 77ba9ffdf463..d892a23fa978 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -4,26 +4,37 @@ config MIPS | |||
4 | # Horrible source of confusion. Die, die, die ... | 4 | # Horrible source of confusion. Die, die, die ... |
5 | select EMBEDDED | 5 | select EMBEDDED |
6 | 6 | ||
7 | config MIPS64 | 7 | mainmenu "Linux/MIPS Kernel Configuration" |
8 | bool "64-bit kernel" | 8 | |
9 | source "init/Kconfig" | ||
10 | |||
11 | menu "Kernel type" | ||
12 | |||
13 | choice | ||
14 | |||
15 | prompt "Kernel code model" | ||
9 | help | 16 | help |
10 | Select this option if you want to build a 64-bit kernel. You should | 17 | You should only select this option if you have a workload that |
11 | only select this option if you have hardware that actually has a | 18 | actually benefits from 64-bit processing or if your machine has |
12 | 64-bit processor and if your application will actually benefit from | 19 | large memory. You will only be presented a single option in this |
13 | 64-bit processing, otherwise say N. You must say Y for kernels for | 20 | menu if your system does not support both 32-bit and 64-bit kernels. |
14 | SGI IP27 (Origin 200 and 2000) and SGI IP32 (O2). If in doubt say N. | ||
15 | 21 | ||
16 | config 64BIT | 22 | config 32BIT |
17 | def_bool MIPS64 | 23 | bool "32-bit kernel" |
24 | depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL | ||
25 | select TRAD_SIGNALS | ||
26 | help | ||
27 | Select this option if you want to build a 32-bit kernel. | ||
18 | 28 | ||
19 | config MIPS32 | 29 | config 64BIT |
20 | bool | 30 | bool "64-bit kernel" |
21 | depends on MIPS64 = 'n' | 31 | depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL |
22 | default y | 32 | help |
33 | Select this option if you want to build a 64-bit kernel. | ||
23 | 34 | ||
24 | mainmenu "Linux/MIPS Kernel Configuration" | 35 | endchoice |
25 | 36 | ||
26 | source "init/Kconfig" | 37 | endmenu |
27 | 38 | ||
28 | menu "Machine selection" | 39 | menu "Machine selection" |
29 | 40 | ||
@@ -155,7 +166,7 @@ config VRC4173 | |||
155 | 166 | ||
156 | config TOSHIBA_JMR3927 | 167 | config TOSHIBA_JMR3927 |
157 | bool "Support for Toshiba JMR-TX3927 board" | 168 | bool "Support for Toshiba JMR-TX3927 board" |
158 | depends on MIPS32 | 169 | depends on 32BIT |
159 | select DMA_NONCOHERENT | 170 | select DMA_NONCOHERENT |
160 | select HW_HAS_PCI | 171 | select HW_HAS_PCI |
161 | select SWAP_IO_SPACE | 172 | select SWAP_IO_SPACE |
@@ -173,7 +184,7 @@ config MACH_DECSTATION | |||
173 | select BOOT_ELF32 | 184 | select BOOT_ELF32 |
174 | select DMA_NONCOHERENT | 185 | select DMA_NONCOHERENT |
175 | select IRQ_CPU | 186 | select IRQ_CPU |
176 | depends on MIPS32 || EXPERIMENTAL | 187 | depends on 32BIT || EXPERIMENTAL |
177 | ---help--- | 188 | ---help--- |
178 | This enables support for DEC's MIPS based workstations. For details | 189 | This enables support for DEC's MIPS based workstations. For details |
179 | see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the | 190 | see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the |
@@ -480,7 +491,7 @@ config SGI_IP22 | |||
480 | 491 | ||
481 | config SGI_IP27 | 492 | config SGI_IP27 |
482 | bool "Support for SGI IP27 (Origin200/2000)" | 493 | bool "Support for SGI IP27 (Origin200/2000)" |
483 | depends on MIPS64 | 494 | depends on 64BIT |
484 | select ARC | 495 | select ARC |
485 | select ARC64 | 496 | select ARC64 |
486 | select DMA_IP27 | 497 | select DMA_IP27 |
@@ -548,7 +559,7 @@ config REPLICATE_EXHANDLERS | |||
548 | 559 | ||
549 | config SGI_IP32 | 560 | config SGI_IP32 |
550 | bool "Support for SGI IP32 (O2) (EXPERIMENTAL)" | 561 | bool "Support for SGI IP32 (O2) (EXPERIMENTAL)" |
551 | depends on MIPS64 && EXPERIMENTAL | 562 | depends on 64BIT && EXPERIMENTAL |
552 | select ARC | 563 | select ARC |
553 | select ARC32 | 564 | select ARC32 |
554 | select BOOT_ELF32 | 565 | select BOOT_ELF32 |
@@ -562,7 +573,7 @@ config SGI_IP32 | |||
562 | If you want this kernel to run on SGI O2 workstation, say Y here. | 573 | If you want this kernel to run on SGI O2 workstation, say Y here. |
563 | 574 | ||
564 | config SOC_AU1X00 | 575 | config SOC_AU1X00 |
565 | depends on MIPS32 | 576 | depends on 32BIT |
566 | bool "Support for AMD/Alchemy Au1X00 SOCs" | 577 | bool "Support for AMD/Alchemy Au1X00 SOCs" |
567 | 578 | ||
568 | choice | 579 | choice |
@@ -902,7 +913,7 @@ config SNI_RM200_PCI | |||
902 | 913 | ||
903 | config TOSHIBA_RBTX4927 | 914 | config TOSHIBA_RBTX4927 |
904 | bool "Support for Toshiba TBTX49[23]7 board" | 915 | bool "Support for Toshiba TBTX49[23]7 board" |
905 | depends on MIPS32 | 916 | depends on 32BIT |
906 | select DMA_NONCOHERENT | 917 | select DMA_NONCOHERENT |
907 | select HAS_TXX9_SERIAL | 918 | select HAS_TXX9_SERIAL |
908 | select HW_HAS_PCI | 919 | select HW_HAS_PCI |
@@ -1171,7 +1182,7 @@ config CPU_R3000 | |||
1171 | 1182 | ||
1172 | config CPU_TX39XX | 1183 | config CPU_TX39XX |
1173 | bool "R39XX" | 1184 | bool "R39XX" |
1174 | depends on MIPS32 | 1185 | depends on 32BIT |
1175 | 1186 | ||
1176 | config CPU_VR41XX | 1187 | config CPU_VR41XX |
1177 | bool "R41xx" | 1188 | bool "R41xx" |
@@ -1205,7 +1216,7 @@ config CPU_R5432 | |||
1205 | 1216 | ||
1206 | config CPU_R6000 | 1217 | config CPU_R6000 |
1207 | bool "R6000" | 1218 | bool "R6000" |
1208 | depends on MIPS32 && EXPERIMENTAL | 1219 | depends on 32BIT && EXPERIMENTAL |
1209 | help | 1220 | help |
1210 | MIPS Technologies R6000 and R6000A series processors. Note these | 1221 | MIPS Technologies R6000 and R6000A series processors. Note these |
1211 | processors are extremly rare and the support for them is incomplete. | 1222 | processors are extremly rare and the support for them is incomplete. |
@@ -1217,7 +1228,7 @@ config CPU_NEVADA | |||
1217 | 1228 | ||
1218 | config CPU_R8000 | 1229 | config CPU_R8000 |
1219 | bool "R8000" | 1230 | bool "R8000" |
1220 | depends on MIPS64 && EXPERIMENTAL | 1231 | depends on 64BIT && EXPERIMENTAL |
1221 | help | 1232 | help |
1222 | MIPS Technologies R8000 processors. Note these processors are | 1233 | MIPS Technologies R8000 processors. Note these processors are |
1223 | uncommon and the support for them is incomplete. | 1234 | uncommon and the support for them is incomplete. |
@@ -1330,11 +1341,11 @@ config SB1_PASS_2_1_WORKAROUNDS | |||
1330 | 1341 | ||
1331 | config 64BIT_PHYS_ADDR | 1342 | config 64BIT_PHYS_ADDR |
1332 | bool "Support for 64-bit physical address space" | 1343 | bool "Support for 64-bit physical address space" |
1333 | depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && MIPS32 | 1344 | depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && 32BIT |
1334 | 1345 | ||
1335 | config CPU_ADVANCED | 1346 | config CPU_ADVANCED |
1336 | bool "Override CPU Options" | 1347 | bool "Override CPU Options" |
1337 | depends on MIPS32 | 1348 | depends on 32BIT |
1338 | help | 1349 | help |
1339 | Saying yes here allows you to select support for various features | 1350 | Saying yes here allows you to select support for various features |
1340 | your CPU may or may not have. Most people should say N here. | 1351 | your CPU may or may not have. Most people should say N here. |
@@ -1388,7 +1399,7 @@ config CPU_HAS_SYNC | |||
1388 | # | 1399 | # |
1389 | config HIGHMEM | 1400 | config HIGHMEM |
1390 | bool "High Memory Support" | 1401 | bool "High Memory Support" |
1391 | depends on MIPS32 && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_RM9000 || CPU_R10000) && !(MACH_DECSTATION || MOMENCO_JAGUAR_ATX) | 1402 | depends on 32BIT && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_RM9000 || CPU_R10000) && !(MACH_DECSTATION || MOMENCO_JAGUAR_ATX) |
1392 | 1403 | ||
1393 | config ARCH_FLATMEM_ENABLE | 1404 | config ARCH_FLATMEM_ENABLE |
1394 | def_bool y | 1405 | def_bool y |
@@ -1448,7 +1459,7 @@ config RTC_DS1742 | |||
1448 | 1459 | ||
1449 | config MIPS_INSANE_LARGE | 1460 | config MIPS_INSANE_LARGE |
1450 | bool "Support for large 64-bit configurations" | 1461 | bool "Support for large 64-bit configurations" |
1451 | depends on CPU_R10000 && MIPS64 | 1462 | depends on CPU_R10000 && 64BIT |
1452 | help | 1463 | help |
1453 | MIPS R10000 does support a 44 bit / 16TB address space as opposed to | 1464 | MIPS R10000 does support a 44 bit / 16TB address space as opposed to |
1454 | previous 64-bit processors which only supported 40 bit / 1TB. If you | 1465 | previous 64-bit processors which only supported 40 bit / 1TB. If you |
@@ -1549,11 +1560,11 @@ source "fs/Kconfig.binfmt" | |||
1549 | 1560 | ||
1550 | config TRAD_SIGNALS | 1561 | config TRAD_SIGNALS |
1551 | bool | 1562 | bool |
1552 | default y if MIPS32 | 1563 | default y if 32BIT |
1553 | 1564 | ||
1554 | config BUILD_ELF64 | 1565 | config BUILD_ELF64 |
1555 | bool "Use 64-bit ELF format for building" | 1566 | bool "Use 64-bit ELF format for building" |
1556 | depends on MIPS64 | 1567 | depends on 64BIT |
1557 | help | 1568 | help |
1558 | A 64-bit kernel is usually built using the 64-bit ELF binary object | 1569 | A 64-bit kernel is usually built using the 64-bit ELF binary object |
1559 | format as it's one that allows arbitrary 64-bit constructs. For | 1570 | format as it's one that allows arbitrary 64-bit constructs. For |
@@ -1568,11 +1579,11 @@ config BUILD_ELF64 | |||
1568 | 1579 | ||
1569 | config BINFMT_IRIX | 1580 | config BINFMT_IRIX |
1570 | bool "Include IRIX binary compatibility" | 1581 | bool "Include IRIX binary compatibility" |
1571 | depends on !CPU_LITTLE_ENDIAN && MIPS32 && BROKEN | 1582 | depends on !CPU_LITTLE_ENDIAN && 32BIT && BROKEN |
1572 | 1583 | ||
1573 | config MIPS32_COMPAT | 1584 | config MIPS32_COMPAT |
1574 | bool "Kernel support for Linux/MIPS 32-bit binary compatibility" | 1585 | bool "Kernel support for Linux/MIPS 32-bit binary compatibility" |
1575 | depends on MIPS64 | 1586 | depends on 64BIT |
1576 | help | 1587 | help |
1577 | Select this option if you want Linux/MIPS 32-bit binary | 1588 | Select this option if you want Linux/MIPS 32-bit binary |
1578 | compatibility. Since all software available for Linux/MIPS is | 1589 | compatibility. Since all software available for Linux/MIPS is |
diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 7d1d7c91b857..a33328ef86f7 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile | |||
@@ -37,12 +37,12 @@ else | |||
37 | 64bit-emul = elf64btsmip | 37 | 64bit-emul = elf64btsmip |
38 | endif | 38 | endif |
39 | 39 | ||
40 | ifdef CONFIG_MIPS32 | 40 | ifdef CONFIG_32BIT |
41 | gcc-abi = 32 | 41 | gcc-abi = 32 |
42 | tool-prefix = $(32bit-tool-prefix) | 42 | tool-prefix = $(32bit-tool-prefix) |
43 | UTS_MACHINE := mips | 43 | UTS_MACHINE := mips |
44 | endif | 44 | endif |
45 | ifdef CONFIG_MIPS64 | 45 | ifdef CONFIG_64BIT |
46 | gcc-abi = 64 | 46 | gcc-abi = 64 |
47 | tool-prefix = $(64bit-tool-prefix) | 47 | tool-prefix = $(64bit-tool-prefix) |
48 | UTS_MACHINE := mips64 | 48 | UTS_MACHINE := mips64 |
@@ -63,7 +63,7 @@ ld-emul = $(32bit-emul) | |||
63 | vmlinux-32 = vmlinux | 63 | vmlinux-32 = vmlinux |
64 | vmlinux-64 = vmlinux.64 | 64 | vmlinux-64 = vmlinux.64 |
65 | 65 | ||
66 | cflags-$(CONFIG_MIPS64) += $(call cc-option,-mno-explicit-relocs) | 66 | cflags-$(CONFIG_64BIT) += $(call cc-option,-mno-explicit-relocs) |
67 | endif | 67 | endif |
68 | 68 | ||
69 | # | 69 | # |
@@ -524,10 +524,10 @@ load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000 | |||
524 | # | 524 | # |
525 | core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/ | 525 | core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/ |
526 | cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22 | 526 | cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22 |
527 | ifdef CONFIG_MIPS32 | 527 | ifdef CONFIG_32BIT |
528 | load-$(CONFIG_SGI_IP22) += 0xffffffff88002000 | 528 | load-$(CONFIG_SGI_IP22) += 0xffffffff88002000 |
529 | endif | 529 | endif |
530 | ifdef CONFIG_MIPS64 | 530 | ifdef CONFIG_64BIT |
531 | load-$(CONFIG_SGI_IP22) += 0xffffffff88004000 | 531 | load-$(CONFIG_SGI_IP22) += 0xffffffff88004000 |
532 | endif | 532 | endif |
533 | 533 | ||
@@ -632,7 +632,7 @@ load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000 | |||
632 | cflags-y += -Iinclude/asm-mips/mach-generic | 632 | cflags-y += -Iinclude/asm-mips/mach-generic |
633 | drivers-$(CONFIG_PCI) += arch/mips/pci/ | 633 | drivers-$(CONFIG_PCI) += arch/mips/pci/ |
634 | 634 | ||
635 | ifdef CONFIG_MIPS32 | 635 | ifdef CONFIG_32BIT |
636 | ifdef CONFIG_CPU_LITTLE_ENDIAN | 636 | ifdef CONFIG_CPU_LITTLE_ENDIAN |
637 | JIFFIES = jiffies_64 | 637 | JIFFIES = jiffies_64 |
638 | else | 638 | else |
@@ -664,8 +664,8 @@ CPPFLAGS_vmlinux.lds := \ | |||
664 | head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o | 664 | head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o |
665 | 665 | ||
666 | libs-y += arch/mips/lib/ | 666 | libs-y += arch/mips/lib/ |
667 | libs-$(CONFIG_MIPS32) += arch/mips/lib-32/ | 667 | libs-$(CONFIG_32BIT) += arch/mips/lib-32/ |
668 | libs-$(CONFIG_MIPS64) += arch/mips/lib-64/ | 668 | libs-$(CONFIG_64BIT) += arch/mips/lib-64/ |
669 | 669 | ||
670 | core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/ | 670 | core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/ |
671 | 671 | ||
diff --git a/arch/mips/configs/atlas_defconfig b/arch/mips/configs/atlas_defconfig index caad7ca27abd..4084ca3a7581 100644 --- a/arch/mips/configs/atlas_defconfig +++ b/arch/mips/configs/atlas_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:00 2005 | 4 | # Wed Jan 26 02:49:00 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig index 1b7f8a702d06..9abdcbc20a9e 100644 --- a/arch/mips/configs/capcella_defconfig +++ b/arch/mips/configs/capcella_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:00 2005 | 4 | # Wed Jan 26 02:49:00 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig index 8861854561e5..ddcfcfbe098a 100644 --- a/arch/mips/configs/cobalt_defconfig +++ b/arch/mips/configs/cobalt_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:00 2005 | 4 | # Wed Jan 26 02:49:00 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig index 19cac1bf4f01..05905dfec1e6 100644 --- a/arch/mips/configs/db1000_defconfig +++ b/arch/mips/configs/db1000_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:01 2005 | 4 | # Wed Jan 26 02:49:01 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig index 035ac95d197e..610ff73a6706 100644 --- a/arch/mips/configs/db1100_defconfig +++ b/arch/mips/configs/db1100_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:01 2005 | 4 | # Wed Jan 26 02:49:01 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig index c38c4ed18fe7..fed6f2fab48b 100644 --- a/arch/mips/configs/db1500_defconfig +++ b/arch/mips/configs/db1500_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:01 2005 | 4 | # Wed Jan 26 02:49:01 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig index ee81309ae3a5..178c0ad1af75 100644 --- a/arch/mips/configs/db1550_defconfig +++ b/arch/mips/configs/db1550_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:02 2005 | 4 | # Wed Jan 26 02:49:02 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/ddb5476_defconfig b/arch/mips/configs/ddb5476_defconfig index d43ed57c4b4e..345cc8b078fc 100644 --- a/arch/mips/configs/ddb5476_defconfig +++ b/arch/mips/configs/ddb5476_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:02 2005 | 4 | # Wed Jan 26 02:49:02 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/ddb5477_defconfig b/arch/mips/configs/ddb5477_defconfig index 5a032cdefd63..4acb9e48d24e 100644 --- a/arch/mips/configs/ddb5477_defconfig +++ b/arch/mips/configs/ddb5477_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:02 2005 | 4 | # Wed Jan 26 02:49:02 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig index 32ada79da9d8..27b21fb4f13a 100644 --- a/arch/mips/configs/decstation_defconfig +++ b/arch/mips/configs/decstation_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:03 2005 | 4 | # Wed Jan 26 02:49:03 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig index 52074a2085fb..3812e5f10c9b 100644 --- a/arch/mips/configs/e55_defconfig +++ b/arch/mips/configs/e55_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:03 2005 | 4 | # Wed Jan 26 02:49:03 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/ev64120_defconfig b/arch/mips/configs/ev64120_defconfig index 360e842fd4be..705cdbd682d6 100644 --- a/arch/mips/configs/ev64120_defconfig +++ b/arch/mips/configs/ev64120_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:03 2005 | 4 | # Wed Jan 26 02:49:03 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/ev96100_defconfig b/arch/mips/configs/ev96100_defconfig index 657a9508d31a..4c89dfef8e78 100644 --- a/arch/mips/configs/ev96100_defconfig +++ b/arch/mips/configs/ev96100_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:03 2005 | 4 | # Wed Jan 26 02:49:03 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig index 3fb102e6a7f7..2990802899da 100644 --- a/arch/mips/configs/ip22_defconfig +++ b/arch/mips/configs/ip22_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:04 2005 | 4 | # Wed Jan 26 02:49:04 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig index b5bab3a42fc4..b2a67da1e031 100644 --- a/arch/mips/configs/ip27_defconfig +++ b/arch/mips/configs/ip27_defconfig | |||
@@ -4,7 +4,7 @@ | |||
4 | # Wed Jan 26 02:49:04 2005 | 4 | # Wed Jan 26 02:49:04 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | CONFIG_MIPS64=y | 7 | CONFIG_64BIT=y |
8 | CONFIG_64BIT=y | 8 | CONFIG_64BIT=y |
9 | 9 | ||
10 | # | 10 | # |
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig index bdf1415475ff..2759162f173b 100644 --- a/arch/mips/configs/ip32_defconfig +++ b/arch/mips/configs/ip32_defconfig | |||
@@ -4,7 +4,7 @@ | |||
4 | # Wed Jan 26 02:49:04 2005 | 4 | # Wed Jan 26 02:49:04 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | CONFIG_MIPS64=y | 7 | CONFIG_64BIT=y |
8 | CONFIG_64BIT=y | 8 | CONFIG_64BIT=y |
9 | 9 | ||
10 | # | 10 | # |
diff --git a/arch/mips/configs/it8172_defconfig b/arch/mips/configs/it8172_defconfig index 1ca7746388f0..09c83a01dd92 100644 --- a/arch/mips/configs/it8172_defconfig +++ b/arch/mips/configs/it8172_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:05 2005 | 4 | # Wed Jan 26 02:49:05 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/ivr_defconfig b/arch/mips/configs/ivr_defconfig index c6eef708be1e..121d0c029c5d 100644 --- a/arch/mips/configs/ivr_defconfig +++ b/arch/mips/configs/ivr_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:05 2005 | 4 | # Wed Jan 26 02:49:05 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/jaguar-atx_defconfig b/arch/mips/configs/jaguar-atx_defconfig index 757c4e88cc00..d4e19da57d70 100644 --- a/arch/mips/configs/jaguar-atx_defconfig +++ b/arch/mips/configs/jaguar-atx_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:05 2005 | 4 | # Wed Jan 26 02:49:05 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig index e5a613906554..c95e52a9d8bb 100644 --- a/arch/mips/configs/jmr3927_defconfig +++ b/arch/mips/configs/jmr3927_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:06 2005 | 4 | # Wed Jan 26 02:49:06 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/lasat200_defconfig b/arch/mips/configs/lasat200_defconfig index 1e7697834e90..3b4d7e6afac4 100644 --- a/arch/mips/configs/lasat200_defconfig +++ b/arch/mips/configs/lasat200_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:06 2005 | 4 | # Wed Jan 26 02:49:06 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig index 61fb9fb97e6e..33e6bb62f2ea 100644 --- a/arch/mips/configs/malta_defconfig +++ b/arch/mips/configs/malta_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:53:14 2005 | 4 | # Wed Jan 26 02:53:14 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig index 31b8f2ad7338..ed44a1a660f7 100644 --- a/arch/mips/configs/mpc30x_defconfig +++ b/arch/mips/configs/mpc30x_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:07 2005 | 4 | # Wed Jan 26 02:49:07 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/ocelot_3_defconfig b/arch/mips/configs/ocelot_3_defconfig index 2cce682fffcf..daa5b8828f57 100644 --- a/arch/mips/configs/ocelot_3_defconfig +++ b/arch/mips/configs/ocelot_3_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:07 2005 | 4 | # Wed Jan 26 02:49:07 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/ocelot_c_defconfig b/arch/mips/configs/ocelot_c_defconfig index 0cbf48a62e02..bdefd4f1310a 100644 --- a/arch/mips/configs/ocelot_c_defconfig +++ b/arch/mips/configs/ocelot_c_defconfig | |||
@@ -4,7 +4,7 @@ | |||
4 | # Wed Jan 26 02:49:07 2005 | 4 | # Wed Jan 26 02:49:07 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | CONFIG_MIPS64=y | 7 | CONFIG_64BIT=y |
8 | CONFIG_64BIT=y | 8 | CONFIG_64BIT=y |
9 | 9 | ||
10 | # | 10 | # |
diff --git a/arch/mips/configs/ocelot_defconfig b/arch/mips/configs/ocelot_defconfig index 4043950d360a..7526b4748dfe 100644 --- a/arch/mips/configs/ocelot_defconfig +++ b/arch/mips/configs/ocelot_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:08 2005 | 4 | # Wed Jan 26 02:49:08 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/ocelot_g_defconfig b/arch/mips/configs/ocelot_g_defconfig index 3870af4537ad..f372508bc25b 100644 --- a/arch/mips/configs/ocelot_g_defconfig +++ b/arch/mips/configs/ocelot_g_defconfig | |||
@@ -4,7 +4,7 @@ | |||
4 | # Wed Jan 26 02:49:08 2005 | 4 | # Wed Jan 26 02:49:08 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | CONFIG_MIPS64=y | 7 | CONFIG_64BIT=y |
8 | CONFIG_64BIT=y | 8 | CONFIG_64BIT=y |
9 | 9 | ||
10 | # | 10 | # |
diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig index 6cdabd550300..b7b95789fefb 100644 --- a/arch/mips/configs/pb1100_defconfig +++ b/arch/mips/configs/pb1100_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:08 2005 | 4 | # Wed Jan 26 02:49:08 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig index 2aebbd2e82b3..49e528340a39 100644 --- a/arch/mips/configs/pb1500_defconfig +++ b/arch/mips/configs/pb1500_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:09 2005 | 4 | # Wed Jan 26 02:49:09 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig index 9e21edc28280..8e426776c098 100644 --- a/arch/mips/configs/pb1550_defconfig +++ b/arch/mips/configs/pb1550_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:09 2005 | 4 | # Wed Jan 26 02:49:09 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig index d0c85a4009d6..021cfe38371a 100644 --- a/arch/mips/configs/rm200_defconfig +++ b/arch/mips/configs/rm200_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:09 2005 | 4 | # Wed Jan 26 02:49:09 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig index 84978b70714b..1dc935f37582 100644 --- a/arch/mips/configs/sb1250-swarm_defconfig +++ b/arch/mips/configs/sb1250-swarm_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:10 2005 | 4 | # Wed Jan 26 02:49:10 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/sead_defconfig b/arch/mips/configs/sead_defconfig index 7c718a429b04..4d2fde827f01 100644 --- a/arch/mips/configs/sead_defconfig +++ b/arch/mips/configs/sead_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:10 2005 | 4 | # Wed Jan 26 02:49:10 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig index e01727cd0fe9..53e3d4adf1dd 100644 --- a/arch/mips/configs/tb0226_defconfig +++ b/arch/mips/configs/tb0226_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:12 2005 | 4 | # Wed Jan 26 02:49:12 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/tb0229_defconfig b/arch/mips/configs/tb0229_defconfig index c6ba3de27614..0fe7f505226e 100644 --- a/arch/mips/configs/tb0229_defconfig +++ b/arch/mips/configs/tb0229_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:12 2005 | 4 | # Wed Jan 26 02:49:12 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig index 915c43b6e2d9..d793616effbb 100644 --- a/arch/mips/configs/workpad_defconfig +++ b/arch/mips/configs/workpad_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:12 2005 | 4 | # Wed Jan 26 02:49:12 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig index 562f2b8043ac..6d2290777ad7 100644 --- a/arch/mips/configs/yosemite_defconfig +++ b/arch/mips/configs/yosemite_defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:49:13 2005 | 4 | # Wed Jan 26 02:49:13 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S index 3b3790993219..c89768d5c4e5 100644 --- a/arch/mips/dec/int-handler.S +++ b/arch/mips/dec/int-handler.S | |||
@@ -133,7 +133,7 @@ | |||
133 | */ | 133 | */ |
134 | mfc0 t0,CP0_CAUSE # get pending interrupts | 134 | mfc0 t0,CP0_CAUSE # get pending interrupts |
135 | mfc0 t1,CP0_STATUS | 135 | mfc0 t1,CP0_STATUS |
136 | #ifdef CONFIG_MIPS32 | 136 | #ifdef CONFIG_32BIT |
137 | lw t2,cpu_fpu_mask | 137 | lw t2,cpu_fpu_mask |
138 | #endif | 138 | #endif |
139 | andi t0,ST0_IM # CAUSE.CE may be non-zero! | 139 | andi t0,ST0_IM # CAUSE.CE may be non-zero! |
@@ -141,7 +141,7 @@ | |||
141 | 141 | ||
142 | beqz t0,spurious | 142 | beqz t0,spurious |
143 | 143 | ||
144 | #ifdef CONFIG_MIPS32 | 144 | #ifdef CONFIG_32BIT |
145 | and t2,t0 | 145 | and t2,t0 |
146 | bnez t2,fpu # handle FPU immediately | 146 | bnez t2,fpu # handle FPU immediately |
147 | #endif | 147 | #endif |
@@ -271,7 +271,7 @@ handle_it: | |||
271 | j ret_from_irq | 271 | j ret_from_irq |
272 | nop | 272 | nop |
273 | 273 | ||
274 | #ifdef CONFIG_MIPS32 | 274 | #ifdef CONFIG_32BIT |
275 | fpu: | 275 | fpu: |
276 | j handle_fpe_int | 276 | j handle_fpe_int |
277 | nop | 277 | nop |
diff --git a/arch/mips/dec/prom/Makefile b/arch/mips/dec/prom/Makefile index 373822ec2d8c..bcd0247b3a66 100644 --- a/arch/mips/dec/prom/Makefile +++ b/arch/mips/dec/prom/Makefile | |||
@@ -5,7 +5,7 @@ | |||
5 | 5 | ||
6 | lib-y += init.o memory.o cmdline.o identify.o console.o | 6 | lib-y += init.o memory.o cmdline.o identify.o console.o |
7 | 7 | ||
8 | lib-$(CONFIG_MIPS32) += locore.o | 8 | lib-$(CONFIG_32BIT) += locore.o |
9 | lib-$(CONFIG_MIPS64) += call_o32.o | 9 | lib-$(CONFIG_64BIT) += call_o32.o |
10 | 10 | ||
11 | EXTRA_AFLAGS := $(CFLAGS) | 11 | EXTRA_AFLAGS := $(CFLAGS) |
diff --git a/arch/mips/defconfig b/arch/mips/defconfig index d55fe665926f..2081583daabc 100644 --- a/arch/mips/defconfig +++ b/arch/mips/defconfig | |||
@@ -4,9 +4,9 @@ | |||
4 | # Wed Jan 26 02:48:59 2005 | 4 | # Wed Jan 26 02:48:59 2005 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | # CONFIG_MIPS64 is not set | ||
8 | # CONFIG_64BIT is not set | 7 | # CONFIG_64BIT is not set |
9 | CONFIG_MIPS32=y | 8 | # CONFIG_64BIT is not set |
9 | CONFIG_32BIT=y | ||
10 | 10 | ||
11 | # | 11 | # |
12 | # Code maturity level options | 12 | # Code maturity level options |
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index a0230ee0f7f4..d3303584fbd1 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile | |||
@@ -13,8 +13,8 @@ binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \ | |||
13 | 13 | ||
14 | ifdef CONFIG_MODULES | 14 | ifdef CONFIG_MODULES |
15 | obj-y += mips_ksyms.o module.o | 15 | obj-y += mips_ksyms.o module.o |
16 | obj-$(CONFIG_MIPS32) += module-elf32.o | 16 | obj-$(CONFIG_32BIT) += module-elf32.o |
17 | obj-$(CONFIG_MIPS64) += module-elf64.o | 17 | obj-$(CONFIG_64BIT) += module-elf64.o |
18 | endif | 18 | endif |
19 | 19 | ||
20 | obj-$(CONFIG_CPU_R3000) += r2300_fpu.o r2300_switch.o | 20 | obj-$(CONFIG_CPU_R3000) += r2300_fpu.o r2300_switch.o |
@@ -45,8 +45,8 @@ obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o | |||
45 | obj-$(CONFIG_IRQ_CPU_RM9K) += irq-rm9000.o | 45 | obj-$(CONFIG_IRQ_CPU_RM9K) += irq-rm9000.o |
46 | obj-$(CONFIG_IRQ_MV64340) += irq-mv6434x.o | 46 | obj-$(CONFIG_IRQ_MV64340) += irq-mv6434x.o |
47 | 47 | ||
48 | obj-$(CONFIG_MIPS32) += scall32-o32.o | 48 | obj-$(CONFIG_32BIT) += scall32-o32.o |
49 | obj-$(CONFIG_MIPS64) += scall64-64.o | 49 | obj-$(CONFIG_64BIT) += scall64-64.o |
50 | obj-$(CONFIG_BINFMT_IRIX) += binfmt_irix.o | 50 | obj-$(CONFIG_BINFMT_IRIX) += binfmt_irix.o |
51 | obj-$(CONFIG_MIPS32_COMPAT) += ioctl32.o linux32.o signal32.o | 51 | obj-$(CONFIG_MIPS32_COMPAT) += ioctl32.o linux32.o signal32.o |
52 | obj-$(CONFIG_MIPS32_N32) += binfmt_elfn32.o scall64-n32.o signal_n32.o | 52 | obj-$(CONFIG_MIPS32_N32) += binfmt_elfn32.o scall64-n32.o signal_n32.o |
@@ -55,7 +55,7 @@ obj-$(CONFIG_MIPS32_O32) += binfmt_elfo32.o scall64-o32.o ptrace32.o | |||
55 | obj-$(CONFIG_KGDB) += gdb-low.o gdb-stub.o | 55 | obj-$(CONFIG_KGDB) += gdb-low.o gdb-stub.o |
56 | obj-$(CONFIG_PROC_FS) += proc.o | 56 | obj-$(CONFIG_PROC_FS) += proc.o |
57 | 57 | ||
58 | obj-$(CONFIG_MIPS64) += cpu-bugs64.o | 58 | obj-$(CONFIG_64BIT) += cpu-bugs64.o |
59 | 59 | ||
60 | obj-$(CONFIG_GEN_RTC) += genrtc.o | 60 | obj-$(CONFIG_GEN_RTC) += genrtc.o |
61 | 61 | ||
diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S index ece6ddaf7011..512bedbfa7b9 100644 --- a/arch/mips/kernel/gdb-low.S +++ b/arch/mips/kernel/gdb-low.S | |||
@@ -13,13 +13,13 @@ | |||
13 | #include <asm/stackframe.h> | 13 | #include <asm/stackframe.h> |
14 | #include <asm/gdb-stub.h> | 14 | #include <asm/gdb-stub.h> |
15 | 15 | ||
16 | #ifdef CONFIG_MIPS32 | 16 | #ifdef CONFIG_32BIT |
17 | #define DMFC0 mfc0 | 17 | #define DMFC0 mfc0 |
18 | #define DMTC0 mtc0 | 18 | #define DMTC0 mtc0 |
19 | #define LDC1 lwc1 | 19 | #define LDC1 lwc1 |
20 | #define SDC1 lwc1 | 20 | #define SDC1 lwc1 |
21 | #endif | 21 | #endif |
22 | #ifdef CONFIG_MIPS64 | 22 | #ifdef CONFIG_64BIT |
23 | #define DMFC0 dmfc0 | 23 | #define DMFC0 dmfc0 |
24 | #define DMTC0 dmtc0 | 24 | #define DMTC0 dmtc0 |
25 | #define LDC1 ldc1 | 25 | #define LDC1 ldc1 |
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index a5b0a389b063..3a1a3e7586f6 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S | |||
@@ -54,7 +54,7 @@ NESTED(except_vec3_generic, 0, sp) | |||
54 | #endif | 54 | #endif |
55 | mfc0 k1, CP0_CAUSE | 55 | mfc0 k1, CP0_CAUSE |
56 | andi k1, k1, 0x7c | 56 | andi k1, k1, 0x7c |
57 | #ifdef CONFIG_MIPS64 | 57 | #ifdef CONFIG_64BIT |
58 | dsll k1, k1, 1 | 58 | dsll k1, k1, 1 |
59 | #endif | 59 | #endif |
60 | PTR_L k0, exception_handlers(k1) | 60 | PTR_L k0, exception_handlers(k1) |
@@ -81,7 +81,7 @@ NESTED(except_vec3_r4000, 0, sp) | |||
81 | beq k1, k0, handle_vced | 81 | beq k1, k0, handle_vced |
82 | li k0, 14<<2 | 82 | li k0, 14<<2 |
83 | beq k1, k0, handle_vcei | 83 | beq k1, k0, handle_vcei |
84 | #ifdef CONFIG_MIPS64 | 84 | #ifdef CONFIG_64BIT |
85 | dsll k1, k1, 1 | 85 | dsll k1, k1, 1 |
86 | #endif | 86 | #endif |
87 | .set pop | 87 | .set pop |
@@ -244,10 +244,10 @@ NESTED(nmi_handler, PT_SIZE, sp) | |||
244 | start with an n and gas will believe \n is ok ... */ | 244 | start with an n and gas will believe \n is ok ... */ |
245 | .macro __BUILD_verbose nexception | 245 | .macro __BUILD_verbose nexception |
246 | LONG_L a1, PT_EPC(sp) | 246 | LONG_L a1, PT_EPC(sp) |
247 | #if CONFIG_MIPS32 | 247 | #if CONFIG_32BIT |
248 | PRINT("Got \nexception at %08lx\012") | 248 | PRINT("Got \nexception at %08lx\012") |
249 | #endif | 249 | #endif |
250 | #if CONFIG_MIPS64 | 250 | #if CONFIG_64BIT |
251 | PRINT("Got \nexception at %016lx\012") | 251 | PRINT("Got \nexception at %016lx\012") |
252 | #endif | 252 | #endif |
253 | .endm | 253 | .endm |
@@ -293,7 +293,7 @@ NESTED(nmi_handler, PT_SIZE, sp) | |||
293 | BUILD_HANDLER mcheck mcheck cli verbose /* #24 */ | 293 | BUILD_HANDLER mcheck mcheck cli verbose /* #24 */ |
294 | BUILD_HANDLER reserved reserved sti verbose /* others */ | 294 | BUILD_HANDLER reserved reserved sti verbose /* others */ |
295 | 295 | ||
296 | #ifdef CONFIG_MIPS64 | 296 | #ifdef CONFIG_64BIT |
297 | /* A temporary overflow handler used by check_daddi(). */ | 297 | /* A temporary overflow handler used by check_daddi(). */ |
298 | 298 | ||
299 | __INIT | 299 | __INIT |
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S index a64e87d22014..2a1b45d66f04 100644 --- a/arch/mips/kernel/head.S +++ b/arch/mips/kernel/head.S | |||
@@ -107,7 +107,7 @@ | |||
107 | .endm | 107 | .endm |
108 | 108 | ||
109 | .macro setup_c0_status_pri | 109 | .macro setup_c0_status_pri |
110 | #ifdef CONFIG_MIPS64 | 110 | #ifdef CONFIG_64BIT |
111 | setup_c0_status ST0_KX 0 | 111 | setup_c0_status ST0_KX 0 |
112 | #else | 112 | #else |
113 | setup_c0_status 0 0 | 113 | setup_c0_status 0 0 |
@@ -115,7 +115,7 @@ | |||
115 | .endm | 115 | .endm |
116 | 116 | ||
117 | .macro setup_c0_status_sec | 117 | .macro setup_c0_status_sec |
118 | #ifdef CONFIG_MIPS64 | 118 | #ifdef CONFIG_64BIT |
119 | setup_c0_status ST0_KX ST0_BEV | 119 | setup_c0_status ST0_KX ST0_BEV |
120 | #else | 120 | #else |
121 | setup_c0_status 0 ST0_BEV | 121 | setup_c0_status 0 ST0_BEV |
@@ -215,7 +215,7 @@ NESTED(smp_bootstrap, 16, sp) | |||
215 | * slightly different layout ... | 215 | * slightly different layout ... |
216 | */ | 216 | */ |
217 | page swapper_pg_dir, _PGD_ORDER | 217 | page swapper_pg_dir, _PGD_ORDER |
218 | #ifdef CONFIG_MIPS64 | 218 | #ifdef CONFIG_64BIT |
219 | page invalid_pmd_table, _PMD_ORDER | 219 | page invalid_pmd_table, _PMD_ORDER |
220 | #endif | 220 | #endif |
221 | page invalid_pte_table, _PTE_ORDER | 221 | page invalid_pte_table, _PTE_ORDER |
diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c index eed29fc9dc82..86e42c633f73 100644 --- a/arch/mips/kernel/mips_ksyms.c +++ b/arch/mips/kernel/mips_ksyms.c | |||
@@ -35,7 +35,7 @@ EXPORT_SYMBOL(memcpy); | |||
35 | EXPORT_SYMBOL(memmove); | 35 | EXPORT_SYMBOL(memmove); |
36 | EXPORT_SYMBOL(strcat); | 36 | EXPORT_SYMBOL(strcat); |
37 | EXPORT_SYMBOL(strchr); | 37 | EXPORT_SYMBOL(strchr); |
38 | #ifdef CONFIG_MIPS64 | 38 | #ifdef CONFIG_64BIT |
39 | EXPORT_SYMBOL(strncmp); | 39 | EXPORT_SYMBOL(strncmp); |
40 | #endif | 40 | #endif |
41 | EXPORT_SYMBOL(strlen); | 41 | EXPORT_SYMBOL(strlen); |
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index 6e70c42c2058..e4f2f8011387 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c | |||
@@ -70,7 +70,7 @@ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp) | |||
70 | 70 | ||
71 | /* New thread loses kernel privileges. */ | 71 | /* New thread loses kernel privileges. */ |
72 | status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|KU_MASK); | 72 | status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|KU_MASK); |
73 | #ifdef CONFIG_MIPS64 | 73 | #ifdef CONFIG_64BIT |
74 | status &= ~ST0_FR; | 74 | status &= ~ST0_FR; |
75 | status |= (current->thread.mflags & MF_32BIT_REGS) ? 0 : ST0_FR; | 75 | status |= (current->thread.mflags & MF_32BIT_REGS) ? 0 : ST0_FR; |
76 | #endif | 76 | #endif |
@@ -236,10 +236,10 @@ static int __init get_frame_info(struct mips_frame_info *info, void *func) | |||
236 | break; | 236 | break; |
237 | 237 | ||
238 | if ( | 238 | if ( |
239 | #ifdef CONFIG_MIPS32 | 239 | #ifdef CONFIG_32BIT |
240 | ip->i_format.opcode == sw_op && | 240 | ip->i_format.opcode == sw_op && |
241 | #endif | 241 | #endif |
242 | #ifdef CONFIG_MIPS64 | 242 | #ifdef CONFIG_64BIT |
243 | ip->i_format.opcode == sd_op && | 243 | ip->i_format.opcode == sd_op && |
244 | #endif | 244 | #endif |
245 | ip->i_format.rs == 29) | 245 | ip->i_format.rs == 29) |
@@ -353,7 +353,7 @@ schedule_timeout_caller: | |||
353 | 353 | ||
354 | out: | 354 | out: |
355 | 355 | ||
356 | #ifdef CONFIG_MIPS64 | 356 | #ifdef CONFIG_64BIT |
357 | if (current->thread.mflags & MF_32BIT_REGS) /* Kludge for 32-bit ps */ | 357 | if (current->thread.mflags & MF_32BIT_REGS) /* Kludge for 32-bit ps */ |
358 | pc &= 0xffffffffUL; | 358 | pc &= 0xffffffffUL; |
359 | #endif | 359 | #endif |
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 92e70ca3bff9..0b571a5b4b83 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c | |||
@@ -124,7 +124,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data) | |||
124 | if (tsk_used_math(child)) { | 124 | if (tsk_used_math(child)) { |
125 | fpureg_t *fregs = get_fpu_regs(child); | 125 | fpureg_t *fregs = get_fpu_regs(child); |
126 | 126 | ||
127 | #ifdef CONFIG_MIPS32 | 127 | #ifdef CONFIG_32BIT |
128 | /* | 128 | /* |
129 | * The odd registers are actually the high | 129 | * The odd registers are actually the high |
130 | * order bits of the values stored in the even | 130 | * order bits of the values stored in the even |
@@ -135,7 +135,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data) | |||
135 | else | 135 | else |
136 | tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff); | 136 | tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff); |
137 | #endif | 137 | #endif |
138 | #ifdef CONFIG_MIPS64 | 138 | #ifdef CONFIG_64BIT |
139 | tmp = fregs[addr - FPR_BASE]; | 139 | tmp = fregs[addr - FPR_BASE]; |
140 | #endif | 140 | #endif |
141 | } else { | 141 | } else { |
@@ -213,7 +213,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data) | |||
213 | sizeof(child->thread.fpu.hard)); | 213 | sizeof(child->thread.fpu.hard)); |
214 | child->thread.fpu.hard.fcr31 = 0; | 214 | child->thread.fpu.hard.fcr31 = 0; |
215 | } | 215 | } |
216 | #ifdef CONFIG_MIPS32 | 216 | #ifdef CONFIG_32BIT |
217 | /* | 217 | /* |
218 | * The odd registers are actually the high order bits | 218 | * The odd registers are actually the high order bits |
219 | * of the values stored in the even registers - unless | 219 | * of the values stored in the even registers - unless |
@@ -227,7 +227,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data) | |||
227 | fregs[addr - FPR_BASE] |= data; | 227 | fregs[addr - FPR_BASE] |= data; |
228 | } | 228 | } |
229 | #endif | 229 | #endif |
230 | #ifdef CONFIG_MIPS64 | 230 | #ifdef CONFIG_64BIT |
231 | fregs[addr - FPR_BASE] = data; | 231 | fregs[addr - FPR_BASE] = data; |
232 | #endif | 232 | #endif |
233 | break; | 233 | break; |
@@ -304,14 +304,14 @@ out: | |||
304 | static inline int audit_arch(void) | 304 | static inline int audit_arch(void) |
305 | { | 305 | { |
306 | #ifdef CONFIG_CPU_LITTLE_ENDIAN | 306 | #ifdef CONFIG_CPU_LITTLE_ENDIAN |
307 | #ifdef CONFIG_MIPS64 | 307 | #ifdef CONFIG_64BIT |
308 | if (!(current->thread.mflags & MF_32BIT_REGS)) | 308 | if (!(current->thread.mflags & MF_32BIT_REGS)) |
309 | return AUDIT_ARCH_MIPSEL64; | 309 | return AUDIT_ARCH_MIPSEL64; |
310 | #endif /* MIPS64 */ | 310 | #endif /* MIPS64 */ |
311 | return AUDIT_ARCH_MIPSEL; | 311 | return AUDIT_ARCH_MIPSEL; |
312 | 312 | ||
313 | #else /* big endian... */ | 313 | #else /* big endian... */ |
314 | #ifdef CONFIG_MIPS64 | 314 | #ifdef CONFIG_64BIT |
315 | if (!(current->thread.mflags & MF_32BIT_REGS)) | 315 | if (!(current->thread.mflags & MF_32BIT_REGS)) |
316 | return AUDIT_ARCH_MIPS64; | 316 | return AUDIT_ARCH_MIPS64; |
317 | #endif /* MIPS64 */ | 317 | #endif /* MIPS64 */ |
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S index ebb643d8d14c..aba665bcb386 100644 --- a/arch/mips/kernel/r4k_fpu.S +++ b/arch/mips/kernel/r4k_fpu.S | |||
@@ -36,7 +36,7 @@ | |||
36 | LEAF(_save_fp_context) | 36 | LEAF(_save_fp_context) |
37 | cfc1 t1, fcr31 | 37 | cfc1 t1, fcr31 |
38 | 38 | ||
39 | #ifdef CONFIG_MIPS64 | 39 | #ifdef CONFIG_64BIT |
40 | /* Store the 16 odd double precision registers */ | 40 | /* Store the 16 odd double precision registers */ |
41 | EX sdc1 $f1, SC_FPREGS+8(a0) | 41 | EX sdc1 $f1, SC_FPREGS+8(a0) |
42 | EX sdc1 $f3, SC_FPREGS+24(a0) | 42 | EX sdc1 $f3, SC_FPREGS+24(a0) |
@@ -118,7 +118,7 @@ LEAF(_save_fp_context32) | |||
118 | */ | 118 | */ |
119 | LEAF(_restore_fp_context) | 119 | LEAF(_restore_fp_context) |
120 | EX lw t0, SC_FPC_CSR(a0) | 120 | EX lw t0, SC_FPC_CSR(a0) |
121 | #ifdef CONFIG_MIPS64 | 121 | #ifdef CONFIG_64BIT |
122 | EX ldc1 $f1, SC_FPREGS+8(a0) | 122 | EX ldc1 $f1, SC_FPREGS+8(a0) |
123 | EX ldc1 $f3, SC_FPREGS+24(a0) | 123 | EX ldc1 $f3, SC_FPREGS+24(a0) |
124 | EX ldc1 $f5, SC_FPREGS+40(a0) | 124 | EX ldc1 $f5, SC_FPREGS+40(a0) |
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S index 1fc3b2eb12bd..175dd1fcbb33 100644 --- a/arch/mips/kernel/r4k_switch.S +++ b/arch/mips/kernel/r4k_switch.S | |||
@@ -105,7 +105,7 @@ | |||
105 | * Save a thread's fp context. | 105 | * Save a thread's fp context. |
106 | */ | 106 | */ |
107 | LEAF(_save_fp) | 107 | LEAF(_save_fp) |
108 | #ifdef CONFIG_MIPS64 | 108 | #ifdef CONFIG_64BIT |
109 | mfc0 t1, CP0_STATUS | 109 | mfc0 t1, CP0_STATUS |
110 | #endif | 110 | #endif |
111 | fpu_save_double a0 t1 t0 t2 # clobbers t1 | 111 | fpu_save_double a0 t1 t0 t2 # clobbers t1 |
@@ -142,7 +142,7 @@ LEAF(_init_fpu) | |||
142 | 142 | ||
143 | li t1, -1 # SNaN | 143 | li t1, -1 # SNaN |
144 | 144 | ||
145 | #ifdef CONFIG_MIPS64 | 145 | #ifdef CONFIG_64BIT |
146 | sll t0, t0, 5 | 146 | sll t0, t0, 5 |
147 | bgez t0, 1f # 16 / 32 register mode? | 147 | bgez t0, 1f # 16 / 32 register mode? |
148 | 148 | ||
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 3a240e3e004c..12b531c295c4 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c | |||
@@ -241,7 +241,7 @@ static inline int parse_rd_cmdline(unsigned long* rd_start, unsigned long* rd_en | |||
241 | if (*tmp) | 241 | if (*tmp) |
242 | strcat(command_line, tmp); | 242 | strcat(command_line, tmp); |
243 | 243 | ||
244 | #ifdef CONFIG_MIPS64 | 244 | #ifdef CONFIG_64BIT |
245 | /* HACK: Guess if the sign extension was forgotten */ | 245 | /* HACK: Guess if the sign extension was forgotten */ |
246 | if (start > 0x0000000080000000 && start < 0x00000000ffffffff) | 246 | if (start > 0x0000000080000000 && start < 0x00000000ffffffff) |
247 | start |= 0xffffffff00000000; | 247 | start |= 0xffffffff00000000; |
@@ -446,7 +446,7 @@ static inline void resource_init(void) | |||
446 | { | 446 | { |
447 | int i; | 447 | int i; |
448 | 448 | ||
449 | #if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64) | 449 | #if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) |
450 | /* | 450 | /* |
451 | * The 64bit code in 32bit object format trick can't represent | 451 | * The 64bit code in 32bit object format trick can't represent |
452 | * 64bit wide relocations for linker script symbols. | 452 | * 64bit wide relocations for linker script symbols. |
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 56c36e42e0a6..a53b1ed7b386 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
@@ -924,7 +924,7 @@ void __init per_cpu_trap_init(void) | |||
924 | * flag that some firmware may have left set and the TS bit (for | 924 | * flag that some firmware may have left set and the TS bit (for |
925 | * IP27). Set XX for ISA IV code to work. | 925 | * IP27). Set XX for ISA IV code to work. |
926 | */ | 926 | */ |
927 | #ifdef CONFIG_MIPS64 | 927 | #ifdef CONFIG_64BIT |
928 | status_set |= ST0_FR|ST0_KX|ST0_SX|ST0_UX; | 928 | status_set |= ST0_FR|ST0_KX|ST0_SX|ST0_UX; |
929 | #endif | 929 | #endif |
930 | if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV) | 930 | if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV) |
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c index 3f24a1d45865..36c5212e0928 100644 --- a/arch/mips/kernel/unaligned.c +++ b/arch/mips/kernel/unaligned.c | |||
@@ -240,7 +240,7 @@ static inline int emulate_load_store_insn(struct pt_regs *regs, | |||
240 | break; | 240 | break; |
241 | 241 | ||
242 | case lwu_op: | 242 | case lwu_op: |
243 | #ifdef CONFIG_MIPS64 | 243 | #ifdef CONFIG_64BIT |
244 | /* | 244 | /* |
245 | * A 32-bit kernel might be running on a 64-bit processor. But | 245 | * A 32-bit kernel might be running on a 64-bit processor. But |
246 | * if we're on a 32-bit processor and an i-cache incoherency | 246 | * if we're on a 32-bit processor and an i-cache incoherency |
@@ -278,13 +278,13 @@ static inline int emulate_load_store_insn(struct pt_regs *regs, | |||
278 | *newvalue = value; | 278 | *newvalue = value; |
279 | *regptr = ®s->regs[insn.i_format.rt]; | 279 | *regptr = ®s->regs[insn.i_format.rt]; |
280 | break; | 280 | break; |
281 | #endif /* CONFIG_MIPS64 */ | 281 | #endif /* CONFIG_64BIT */ |
282 | 282 | ||
283 | /* Cannot handle 64-bit instructions in 32-bit kernel */ | 283 | /* Cannot handle 64-bit instructions in 32-bit kernel */ |
284 | goto sigill; | 284 | goto sigill; |
285 | 285 | ||
286 | case ld_op: | 286 | case ld_op: |
287 | #ifdef CONFIG_MIPS64 | 287 | #ifdef CONFIG_64BIT |
288 | /* | 288 | /* |
289 | * A 32-bit kernel might be running on a 64-bit processor. But | 289 | * A 32-bit kernel might be running on a 64-bit processor. But |
290 | * if we're on a 32-bit processor and an i-cache incoherency | 290 | * if we're on a 32-bit processor and an i-cache incoherency |
@@ -320,7 +320,7 @@ static inline int emulate_load_store_insn(struct pt_regs *regs, | |||
320 | *newvalue = value; | 320 | *newvalue = value; |
321 | *regptr = ®s->regs[insn.i_format.rt]; | 321 | *regptr = ®s->regs[insn.i_format.rt]; |
322 | break; | 322 | break; |
323 | #endif /* CONFIG_MIPS64 */ | 323 | #endif /* CONFIG_64BIT */ |
324 | 324 | ||
325 | /* Cannot handle 64-bit instructions in 32-bit kernel */ | 325 | /* Cannot handle 64-bit instructions in 32-bit kernel */ |
326 | goto sigill; | 326 | goto sigill; |
@@ -392,7 +392,7 @@ static inline int emulate_load_store_insn(struct pt_regs *regs, | |||
392 | break; | 392 | break; |
393 | 393 | ||
394 | case sd_op: | 394 | case sd_op: |
395 | #ifdef CONFIG_MIPS64 | 395 | #ifdef CONFIG_64BIT |
396 | /* | 396 | /* |
397 | * A 32-bit kernel might be running on a 64-bit processor. But | 397 | * A 32-bit kernel might be running on a 64-bit processor. But |
398 | * if we're on a 32-bit processor and an i-cache incoherency | 398 | * if we're on a 32-bit processor and an i-cache incoherency |
@@ -428,7 +428,7 @@ static inline int emulate_load_store_insn(struct pt_regs *regs, | |||
428 | if (res) | 428 | if (res) |
429 | goto fault; | 429 | goto fault; |
430 | break; | 430 | break; |
431 | #endif /* CONFIG_MIPS64 */ | 431 | #endif /* CONFIG_64BIT */ |
432 | 432 | ||
433 | /* Cannot handle 64-bit instructions in 32-bit kernel */ | 433 | /* Cannot handle 64-bit instructions in 32-bit kernel */ |
434 | goto sigill; | 434 | goto sigill; |
diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S index afa8eae18ff6..00d73be7dc27 100644 --- a/arch/mips/lib/memcpy.S +++ b/arch/mips/lib/memcpy.S | |||
@@ -79,7 +79,7 @@ | |||
79 | /* | 79 | /* |
80 | * Only on the 64-bit kernel we can made use of 64-bit registers. | 80 | * Only on the 64-bit kernel we can made use of 64-bit registers. |
81 | */ | 81 | */ |
82 | #ifdef CONFIG_MIPS64 | 82 | #ifdef CONFIG_64BIT |
83 | #define USE_DOUBLE | 83 | #define USE_DOUBLE |
84 | #endif | 84 | #endif |
85 | 85 | ||
diff --git a/arch/mips/math-emu/kernel_linkage.c b/arch/mips/math-emu/kernel_linkage.c index 04397fec30fc..4002f0cf79f3 100644 --- a/arch/mips/math-emu/kernel_linkage.c +++ b/arch/mips/math-emu/kernel_linkage.c | |||
@@ -86,7 +86,7 @@ int fpu_emulator_restore_context(struct sigcontext *sc) | |||
86 | return err; | 86 | return err; |
87 | } | 87 | } |
88 | 88 | ||
89 | #ifdef CONFIG_MIPS64 | 89 | #ifdef CONFIG_64BIT |
90 | /* | 90 | /* |
91 | * This is the o32 version | 91 | * This is the o32 version |
92 | */ | 92 | */ |
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile index f61e038b4440..b56a0abdc3d4 100644 --- a/arch/mips/mm/Makefile +++ b/arch/mips/mm/Makefile | |||
@@ -5,8 +5,8 @@ | |||
5 | obj-y += cache.o extable.o fault.o init.o pgtable.o \ | 5 | obj-y += cache.o extable.o fault.o init.o pgtable.o \ |
6 | tlbex.o tlbex-fault.o | 6 | tlbex.o tlbex-fault.o |
7 | 7 | ||
8 | obj-$(CONFIG_MIPS32) += ioremap.o pgtable-32.o | 8 | obj-$(CONFIG_32BIT) += ioremap.o pgtable-32.o |
9 | obj-$(CONFIG_MIPS64) += pgtable-64.o | 9 | obj-$(CONFIG_64BIT) += pgtable-64.o |
10 | obj-$(CONFIG_HIGHMEM) += highmem.o | 10 | obj-$(CONFIG_HIGHMEM) += highmem.o |
11 | 11 | ||
12 | obj-$(CONFIG_CPU_MIPS32) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o | 12 | obj-$(CONFIG_CPU_MIPS32) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o |
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index a03ebb2cba67..20d40725e5bb 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c | |||
@@ -723,10 +723,10 @@ static void local_r4k_flush_cache_sigtramp(void * arg) | |||
723 | ".set push\n\t" | 723 | ".set push\n\t" |
724 | ".set noat\n\t" | 724 | ".set noat\n\t" |
725 | ".set mips3\n\t" | 725 | ".set mips3\n\t" |
726 | #ifdef CONFIG_MIPS32 | 726 | #ifdef CONFIG_32BIT |
727 | "la $at,1f\n\t" | 727 | "la $at,1f\n\t" |
728 | #endif | 728 | #endif |
729 | #ifdef CONFIG_MIPS64 | 729 | #ifdef CONFIG_64BIT |
730 | "dla $at,1f\n\t" | 730 | "dla $at,1f\n\t" |
731 | #endif | 731 | #endif |
732 | "cache %0,($at)\n\t" | 732 | "cache %0,($at)\n\t" |
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 9c9a271c8a3a..dc6830b10fab 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c | |||
@@ -96,7 +96,7 @@ static void __init kmap_init(void) | |||
96 | kmap_prot = PAGE_KERNEL; | 96 | kmap_prot = PAGE_KERNEL; |
97 | } | 97 | } |
98 | 98 | ||
99 | #ifdef CONFIG_MIPS64 | 99 | #ifdef CONFIG_64BIT |
100 | static void __init fixrange_init(unsigned long start, unsigned long end, | 100 | static void __init fixrange_init(unsigned long start, unsigned long end, |
101 | pgd_t *pgd_base) | 101 | pgd_t *pgd_base) |
102 | { | 102 | { |
@@ -125,7 +125,7 @@ static void __init fixrange_init(unsigned long start, unsigned long end, | |||
125 | j = 0; | 125 | j = 0; |
126 | } | 126 | } |
127 | } | 127 | } |
128 | #endif /* CONFIG_MIPS64 */ | 128 | #endif /* CONFIG_64BIT */ |
129 | #endif /* CONFIG_HIGHMEM */ | 129 | #endif /* CONFIG_HIGHMEM */ |
130 | 130 | ||
131 | #ifndef CONFIG_NEED_MULTIPLE_NODES | 131 | #ifndef CONFIG_NEED_MULTIPLE_NODES |
@@ -258,7 +258,7 @@ void __init mem_init(void) | |||
258 | #ifdef CONFIG_BLK_DEV_INITRD | 258 | #ifdef CONFIG_BLK_DEV_INITRD |
259 | void free_initrd_mem(unsigned long start, unsigned long end) | 259 | void free_initrd_mem(unsigned long start, unsigned long end) |
260 | { | 260 | { |
261 | #ifdef CONFIG_MIPS64 | 261 | #ifdef CONFIG_64BIT |
262 | /* Switch from KSEG0 to XKPHYS addresses */ | 262 | /* Switch from KSEG0 to XKPHYS addresses */ |
263 | start = (unsigned long)phys_to_virt(CPHYSADDR(start)); | 263 | start = (unsigned long)phys_to_virt(CPHYSADDR(start)); |
264 | end = (unsigned long)phys_to_virt(CPHYSADDR(end)); | 264 | end = (unsigned long)phys_to_virt(CPHYSADDR(end)); |
@@ -286,7 +286,7 @@ void free_initmem(void) | |||
286 | 286 | ||
287 | addr = (unsigned long) &__init_begin; | 287 | addr = (unsigned long) &__init_begin; |
288 | while (addr < (unsigned long) &__init_end) { | 288 | while (addr < (unsigned long) &__init_end) { |
289 | #ifdef CONFIG_MIPS64 | 289 | #ifdef CONFIG_64BIT |
290 | page = PAGE_OFFSET | CPHYSADDR(addr); | 290 | page = PAGE_OFFSET | CPHYSADDR(addr); |
291 | #else | 291 | #else |
292 | page = addr; | 292 | page = addr; |
diff --git a/arch/mips/mm/pg-sb1.c b/arch/mips/mm/pg-sb1.c index 59d131b5e536..b63e1ca350f5 100644 --- a/arch/mips/mm/pg-sb1.c +++ b/arch/mips/mm/pg-sb1.c | |||
@@ -114,7 +114,7 @@ static inline void copy_page_cpu(void *to, void *from) | |||
114 | " pref " SB1_PREF_STORE_STREAMED_HINT ", -64(%1)\n" | 114 | " pref " SB1_PREF_STORE_STREAMED_HINT ", -64(%1)\n" |
115 | " pref " SB1_PREF_LOAD_STREAMED_HINT ", -32(%0)\n" | 115 | " pref " SB1_PREF_LOAD_STREAMED_HINT ", -32(%0)\n" |
116 | "1: pref " SB1_PREF_STORE_STREAMED_HINT ", -32(%1)\n" | 116 | "1: pref " SB1_PREF_STORE_STREAMED_HINT ", -32(%1)\n" |
117 | # ifdef CONFIG_MIPS64 | 117 | # ifdef CONFIG_64BIT |
118 | " ld $8, -128(%0) \n" /* Block copy a cacheline */ | 118 | " ld $8, -128(%0) \n" /* Block copy a cacheline */ |
119 | " ld $9, -120(%0) \n" | 119 | " ld $9, -120(%0) \n" |
120 | " ld $10, -112(%0) \n" | 120 | " ld $10, -112(%0) \n" |
@@ -148,7 +148,7 @@ static inline void copy_page_cpu(void *to, void *from) | |||
148 | " daddiu %0, %0, -128 \n" | 148 | " daddiu %0, %0, -128 \n" |
149 | " daddiu %1, %1, -128 \n" | 149 | " daddiu %1, %1, -128 \n" |
150 | #endif | 150 | #endif |
151 | #ifdef CONFIG_MIPS64 | 151 | #ifdef CONFIG_64BIT |
152 | " ld $8, 0(%0) \n" /* Block copy a cacheline */ | 152 | " ld $8, 0(%0) \n" /* Block copy a cacheline */ |
153 | "1: ld $9, 8(%0) \n" | 153 | "1: ld $9, 8(%0) \n" |
154 | " ld $10, 16(%0) \n" | 154 | " ld $10, 16(%0) \n" |
@@ -178,7 +178,7 @@ static inline void copy_page_cpu(void *to, void *from) | |||
178 | " daddiu %0, %0, 32 \n" | 178 | " daddiu %0, %0, 32 \n" |
179 | " daddiu %1, %1, 32 \n" | 179 | " daddiu %1, %1, 32 \n" |
180 | " bnel %0, %2, 1b \n" | 180 | " bnel %0, %2, 1b \n" |
181 | #ifdef CONFIG_MIPS64 | 181 | #ifdef CONFIG_64BIT |
182 | " ld $8, 0(%0) \n" | 182 | " ld $8, 0(%0) \n" |
183 | #else | 183 | #else |
184 | " lw $2, 0(%0) \n" | 184 | " lw $2, 0(%0) \n" |
@@ -186,7 +186,7 @@ static inline void copy_page_cpu(void *to, void *from) | |||
186 | " .set pop \n" | 186 | " .set pop \n" |
187 | : "+r" (src), "+r" (dst) | 187 | : "+r" (src), "+r" (dst) |
188 | : "r" (end) | 188 | : "r" (end) |
189 | #ifdef CONFIG_MIPS64 | 189 | #ifdef CONFIG_64BIT |
190 | : "$8","$9","$10","$11","memory"); | 190 | : "$8","$9","$10","$11","memory"); |
191 | #else | 191 | #else |
192 | : "$2","$3","$6","$7","$8","$9","$10","$11","memory"); | 192 | : "$2","$3","$6","$7","$8","$9","$10","$11","memory"); |
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 87e229f4d3d5..592377fa694d 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c | |||
@@ -448,7 +448,7 @@ L_LA(_r3000_write_probe_fail) | |||
448 | L_LA(_r3000_write_probe_ok) | 448 | L_LA(_r3000_write_probe_ok) |
449 | 449 | ||
450 | /* convenience macros for instructions */ | 450 | /* convenience macros for instructions */ |
451 | #ifdef CONFIG_MIPS64 | 451 | #ifdef CONFIG_64BIT |
452 | # define i_LW(buf, rs, rt, off) i_ld(buf, rs, rt, off) | 452 | # define i_LW(buf, rs, rt, off) i_ld(buf, rs, rt, off) |
453 | # define i_SW(buf, rs, rt, off) i_sd(buf, rs, rt, off) | 453 | # define i_SW(buf, rs, rt, off) i_sd(buf, rs, rt, off) |
454 | # define i_SLL(buf, rs, rt, sh) i_dsll(buf, rs, rt, sh) | 454 | # define i_SLL(buf, rs, rt, sh) i_dsll(buf, rs, rt, sh) |
@@ -486,7 +486,7 @@ L_LA(_r3000_write_probe_ok) | |||
486 | #define i_ssnop(buf) i_sll(buf, 0, 0, 1) | 486 | #define i_ssnop(buf) i_sll(buf, 0, 0, 1) |
487 | #define i_ehb(buf) i_sll(buf, 0, 0, 3) | 487 | #define i_ehb(buf) i_sll(buf, 0, 0, 3) |
488 | 488 | ||
489 | #ifdef CONFIG_MIPS64 | 489 | #ifdef CONFIG_64BIT |
490 | static __init int __attribute__((unused)) in_compat_space_p(long addr) | 490 | static __init int __attribute__((unused)) in_compat_space_p(long addr) |
491 | { | 491 | { |
492 | /* Is this address in 32bit compat space? */ | 492 | /* Is this address in 32bit compat space? */ |
@@ -516,7 +516,7 @@ static __init int rel_lo(long val) | |||
516 | 516 | ||
517 | static __init void i_LA_mostly(u32 **buf, unsigned int rs, long addr) | 517 | static __init void i_LA_mostly(u32 **buf, unsigned int rs, long addr) |
518 | { | 518 | { |
519 | #if CONFIG_MIPS64 | 519 | #if CONFIG_64BIT |
520 | if (!in_compat_space_p(addr)) { | 520 | if (!in_compat_space_p(addr)) { |
521 | i_lui(buf, rs, rel_highest(addr)); | 521 | i_lui(buf, rs, rel_highest(addr)); |
522 | if (rel_higher(addr)) | 522 | if (rel_higher(addr)) |
@@ -682,7 +682,7 @@ static void il_bgezl(u32 **p, struct reloc **r, unsigned int reg, | |||
682 | #define C0_EPC 14 | 682 | #define C0_EPC 14 |
683 | #define C0_XCONTEXT 20 | 683 | #define C0_XCONTEXT 20 |
684 | 684 | ||
685 | #ifdef CONFIG_MIPS64 | 685 | #ifdef CONFIG_64BIT |
686 | # define GET_CONTEXT(buf, reg) i_MFC0(buf, reg, C0_XCONTEXT) | 686 | # define GET_CONTEXT(buf, reg) i_MFC0(buf, reg, C0_XCONTEXT) |
687 | #else | 687 | #else |
688 | # define GET_CONTEXT(buf, reg) i_MFC0(buf, reg, C0_CONTEXT) | 688 | # define GET_CONTEXT(buf, reg) i_MFC0(buf, reg, C0_CONTEXT) |
@@ -923,7 +923,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l, | |||
923 | } | 923 | } |
924 | } | 924 | } |
925 | 925 | ||
926 | #ifdef CONFIG_MIPS64 | 926 | #ifdef CONFIG_64BIT |
927 | /* | 927 | /* |
928 | * TMP and PTR are scratch. | 928 | * TMP and PTR are scratch. |
929 | * TMP will be clobbered, PTR will hold the pmd entry. | 929 | * TMP will be clobbered, PTR will hold the pmd entry. |
@@ -1010,7 +1010,7 @@ build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r, | |||
1010 | } | 1010 | } |
1011 | } | 1011 | } |
1012 | 1012 | ||
1013 | #else /* !CONFIG_MIPS64 */ | 1013 | #else /* !CONFIG_64BIT */ |
1014 | 1014 | ||
1015 | /* | 1015 | /* |
1016 | * TMP and PTR are scratch. | 1016 | * TMP and PTR are scratch. |
@@ -1038,7 +1038,7 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr) | |||
1038 | i_addu(p, ptr, ptr, tmp); /* add in pgd offset */ | 1038 | i_addu(p, ptr, ptr, tmp); /* add in pgd offset */ |
1039 | } | 1039 | } |
1040 | 1040 | ||
1041 | #endif /* !CONFIG_MIPS64 */ | 1041 | #endif /* !CONFIG_64BIT */ |
1042 | 1042 | ||
1043 | static __init void build_adjust_context(u32 **p, unsigned int ctx) | 1043 | static __init void build_adjust_context(u32 **p, unsigned int ctx) |
1044 | { | 1044 | { |
@@ -1159,7 +1159,7 @@ static void __init build_r4000_tlb_refill_handler(void) | |||
1159 | /* No need for i_nop */ | 1159 | /* No need for i_nop */ |
1160 | } | 1160 | } |
1161 | 1161 | ||
1162 | #ifdef CONFIG_MIPS64 | 1162 | #ifdef CONFIG_64BIT |
1163 | build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ | 1163 | build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ |
1164 | #else | 1164 | #else |
1165 | build_get_pgde32(&p, K0, K1); /* get pgd in K1 */ | 1165 | build_get_pgde32(&p, K0, K1); /* get pgd in K1 */ |
@@ -1171,7 +1171,7 @@ static void __init build_r4000_tlb_refill_handler(void) | |||
1171 | l_leave(&l, p); | 1171 | l_leave(&l, p); |
1172 | i_eret(&p); /* return from trap */ | 1172 | i_eret(&p); /* return from trap */ |
1173 | 1173 | ||
1174 | #ifdef CONFIG_MIPS64 | 1174 | #ifdef CONFIG_64BIT |
1175 | build_get_pgd_vmalloc64(&p, &l, &r, K0, K1); | 1175 | build_get_pgd_vmalloc64(&p, &l, &r, K0, K1); |
1176 | #endif | 1176 | #endif |
1177 | 1177 | ||
@@ -1182,7 +1182,7 @@ static void __init build_r4000_tlb_refill_handler(void) | |||
1182 | * need three, with the the second nop'ed and the third being | 1182 | * need three, with the the second nop'ed and the third being |
1183 | * unused. | 1183 | * unused. |
1184 | */ | 1184 | */ |
1185 | #ifdef CONFIG_MIPS32 | 1185 | #ifdef CONFIG_32BIT |
1186 | if ((p - tlb_handler) > 64) | 1186 | if ((p - tlb_handler) > 64) |
1187 | panic("TLB refill handler space exceeded"); | 1187 | panic("TLB refill handler space exceeded"); |
1188 | #else | 1188 | #else |
@@ -1195,12 +1195,12 @@ static void __init build_r4000_tlb_refill_handler(void) | |||
1195 | /* | 1195 | /* |
1196 | * Now fold the handler in the TLB refill handler space. | 1196 | * Now fold the handler in the TLB refill handler space. |
1197 | */ | 1197 | */ |
1198 | #ifdef CONFIG_MIPS32 | 1198 | #ifdef CONFIG_32BIT |
1199 | f = final_handler; | 1199 | f = final_handler; |
1200 | /* Simplest case, just copy the handler. */ | 1200 | /* Simplest case, just copy the handler. */ |
1201 | copy_handler(relocs, labels, tlb_handler, p, f); | 1201 | copy_handler(relocs, labels, tlb_handler, p, f); |
1202 | final_len = p - tlb_handler; | 1202 | final_len = p - tlb_handler; |
1203 | #else /* CONFIG_MIPS64 */ | 1203 | #else /* CONFIG_64BIT */ |
1204 | f = final_handler + 32; | 1204 | f = final_handler + 32; |
1205 | if ((p - tlb_handler) <= 32) { | 1205 | if ((p - tlb_handler) <= 32) { |
1206 | /* Just copy the handler. */ | 1206 | /* Just copy the handler. */ |
@@ -1235,7 +1235,7 @@ static void __init build_r4000_tlb_refill_handler(void) | |||
1235 | copy_handler(relocs, labels, split, p, final_handler); | 1235 | copy_handler(relocs, labels, split, p, final_handler); |
1236 | final_len = (f - (final_handler + 32)) + (p - split); | 1236 | final_len = (f - (final_handler + 32)) + (p - split); |
1237 | } | 1237 | } |
1238 | #endif /* CONFIG_MIPS64 */ | 1238 | #endif /* CONFIG_64BIT */ |
1239 | 1239 | ||
1240 | resolve_relocs(relocs, labels); | 1240 | resolve_relocs(relocs, labels); |
1241 | printk("Synthesized TLB refill handler (%u instructions).\n", | 1241 | printk("Synthesized TLB refill handler (%u instructions).\n", |
@@ -1605,7 +1605,7 @@ build_r4000_tlbchange_handler_head(u32 **p, struct label **l, | |||
1605 | struct reloc **r, unsigned int pte, | 1605 | struct reloc **r, unsigned int pte, |
1606 | unsigned int ptr) | 1606 | unsigned int ptr) |
1607 | { | 1607 | { |
1608 | #ifdef CONFIG_MIPS64 | 1608 | #ifdef CONFIG_64BIT |
1609 | build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */ | 1609 | build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */ |
1610 | #else | 1610 | #else |
1611 | build_get_pgde32(p, pte, ptr); /* get pgd in ptr */ | 1611 | build_get_pgde32(p, pte, ptr); /* get pgd in ptr */ |
@@ -1636,7 +1636,7 @@ build_r4000_tlbchange_handler_tail(u32 **p, struct label **l, | |||
1636 | l_leave(l, *p); | 1636 | l_leave(l, *p); |
1637 | i_eret(p); /* return from trap */ | 1637 | i_eret(p); /* return from trap */ |
1638 | 1638 | ||
1639 | #ifdef CONFIG_MIPS64 | 1639 | #ifdef CONFIG_64BIT |
1640 | build_get_pgd_vmalloc64(p, l, r, tmp, ptr); | 1640 | build_get_pgd_vmalloc64(p, l, r, tmp, ptr); |
1641 | #endif | 1641 | #endif |
1642 | } | 1642 | } |
diff --git a/arch/mips/momentum/jaguar_atx/prom.c b/arch/mips/momentum/jaguar_atx/prom.c index fa5982ac0ac6..827960802b8f 100644 --- a/arch/mips/momentum/jaguar_atx/prom.c +++ b/arch/mips/momentum/jaguar_atx/prom.c | |||
@@ -90,7 +90,7 @@ void get_mac(char dest[6]) | |||
90 | } | 90 | } |
91 | #endif | 91 | #endif |
92 | 92 | ||
93 | #ifdef CONFIG_MIPS64 | 93 | #ifdef CONFIG_64BIT |
94 | 94 | ||
95 | unsigned long signext(unsigned long addr) | 95 | unsigned long signext(unsigned long addr) |
96 | { | 96 | { |
@@ -143,7 +143,7 @@ char *arg64(unsigned long addrin, int arg_index) | |||
143 | 143 | ||
144 | return p; | 144 | return p; |
145 | } | 145 | } |
146 | #endif /* CONFIG_MIPS64 */ | 146 | #endif /* CONFIG_64BIT */ |
147 | 147 | ||
148 | /* PMON passes arguments in C main() style */ | 148 | /* PMON passes arguments in C main() style */ |
149 | void __init prom_init(void) | 149 | void __init prom_init(void) |
@@ -158,7 +158,7 @@ void __init prom_init(void) | |||
158 | // ja_setup_console(); /* The very first thing. */ | 158 | // ja_setup_console(); /* The very first thing. */ |
159 | #endif | 159 | #endif |
160 | 160 | ||
161 | #ifdef CONFIG_MIPS64 | 161 | #ifdef CONFIG_64BIT |
162 | char *ptr; | 162 | char *ptr; |
163 | 163 | ||
164 | printk("Mips64 Jaguar-ATX\n"); | 164 | printk("Mips64 Jaguar-ATX\n"); |
@@ -201,7 +201,7 @@ void __init prom_init(void) | |||
201 | } | 201 | } |
202 | printk("arcs_cmdline: %s\n", arcs_cmdline); | 202 | printk("arcs_cmdline: %s\n", arcs_cmdline); |
203 | 203 | ||
204 | #else /* CONFIG_MIPS64 */ | 204 | #else /* CONFIG_64BIT */ |
205 | /* save the PROM vectors for debugging use */ | 205 | /* save the PROM vectors for debugging use */ |
206 | debug_vectors = cv; | 206 | debug_vectors = cv; |
207 | 207 | ||
@@ -226,7 +226,7 @@ void __init prom_init(void) | |||
226 | } | 226 | } |
227 | env++; | 227 | env++; |
228 | } | 228 | } |
229 | #endif /* CONFIG_MIPS64 */ | 229 | #endif /* CONFIG_64BIT */ |
230 | mips_machgroup = MACH_GROUP_MOMENCO; | 230 | mips_machgroup = MACH_GROUP_MOMENCO; |
231 | mips_machtype = MACH_MOMENCO_JAGUAR_ATX; | 231 | mips_machtype = MACH_MOMENCO_JAGUAR_ATX; |
232 | 232 | ||
diff --git a/arch/mips/momentum/jaguar_atx/reset.c b/arch/mips/momentum/jaguar_atx/reset.c index 48039484cdf9..c4236b1e59fa 100644 --- a/arch/mips/momentum/jaguar_atx/reset.c +++ b/arch/mips/momentum/jaguar_atx/reset.c | |||
@@ -27,7 +27,7 @@ | |||
27 | void momenco_jaguar_restart(char *command) | 27 | void momenco_jaguar_restart(char *command) |
28 | { | 28 | { |
29 | /* base address of timekeeper portion of part */ | 29 | /* base address of timekeeper portion of part */ |
30 | #ifdef CONFIG_MIPS64 | 30 | #ifdef CONFIG_64BIT |
31 | void *nvram = (void*) 0xfffffffffc807000; | 31 | void *nvram = (void*) 0xfffffffffc807000; |
32 | #else | 32 | #else |
33 | void *nvram = (void*) 0xfc807000; | 33 | void *nvram = (void*) 0xfc807000; |
diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c index 30462e715066..3cf1e46aa4b8 100644 --- a/arch/mips/momentum/jaguar_atx/setup.c +++ b/arch/mips/momentum/jaguar_atx/setup.c | |||
@@ -105,7 +105,7 @@ void __init bus_error_init(void) { /* nothing */ } | |||
105 | 105 | ||
106 | static __init void wire_stupidity_into_tlb(void) | 106 | static __init void wire_stupidity_into_tlb(void) |
107 | { | 107 | { |
108 | #ifdef CONFIG_MIPS32 | 108 | #ifdef CONFIG_32BIT |
109 | write_c0_wired(0); | 109 | write_c0_wired(0); |
110 | local_flush_tlb_all(); | 110 | local_flush_tlb_all(); |
111 | 111 | ||
diff --git a/arch/mips/momentum/ocelot_3/prom.c b/arch/mips/momentum/ocelot_3/prom.c index 89c17a0c0bed..c4fa9c525faa 100644 --- a/arch/mips/momentum/ocelot_3/prom.c +++ b/arch/mips/momentum/ocelot_3/prom.c | |||
@@ -93,7 +93,7 @@ void get_mac(char dest[6]) | |||
93 | #endif | 93 | #endif |
94 | 94 | ||
95 | 95 | ||
96 | #ifdef CONFIG_MIPS64 | 96 | #ifdef CONFIG_64BIT |
97 | 97 | ||
98 | unsigned long signext(unsigned long addr) | 98 | unsigned long signext(unsigned long addr) |
99 | { | 99 | { |
@@ -145,7 +145,7 @@ char *arg64(unsigned long addrin, int arg_index) | |||
145 | 145 | ||
146 | return p; | 146 | return p; |
147 | } | 147 | } |
148 | #endif /* CONFIG_MIPS64 */ | 148 | #endif /* CONFIG_64BIT */ |
149 | 149 | ||
150 | void __init prom_init(void) | 150 | void __init prom_init(void) |
151 | { | 151 | { |
@@ -155,7 +155,7 @@ void __init prom_init(void) | |||
155 | struct callvectors *cv = (struct callvectors *) fw_arg3; | 155 | struct callvectors *cv = (struct callvectors *) fw_arg3; |
156 | int i; | 156 | int i; |
157 | 157 | ||
158 | #ifdef CONFIG_MIPS64 | 158 | #ifdef CONFIG_64BIT |
159 | char *ptr; | 159 | char *ptr; |
160 | printk("prom_init - MIPS64\n"); | 160 | printk("prom_init - MIPS64\n"); |
161 | 161 | ||
@@ -198,7 +198,7 @@ void __init prom_init(void) | |||
198 | } | 198 | } |
199 | printk("arcs_cmdline: %s\n", arcs_cmdline); | 199 | printk("arcs_cmdline: %s\n", arcs_cmdline); |
200 | 200 | ||
201 | #else /* CONFIG_MIPS64 */ | 201 | #else /* CONFIG_64BIT */ |
202 | 202 | ||
203 | /* save the PROM vectors for debugging use */ | 203 | /* save the PROM vectors for debugging use */ |
204 | debug_vectors = cv; | 204 | debug_vectors = cv; |
@@ -224,7 +224,7 @@ void __init prom_init(void) | |||
224 | } | 224 | } |
225 | env++; | 225 | env++; |
226 | } | 226 | } |
227 | #endif /* CONFIG_MIPS64 */ | 227 | #endif /* CONFIG_64BIT */ |
228 | 228 | ||
229 | mips_machgroup = MACH_GROUP_MOMENCO; | 229 | mips_machgroup = MACH_GROUP_MOMENCO; |
230 | mips_machtype = MACH_MOMENCO_OCELOT_3; | 230 | mips_machtype = MACH_MOMENCO_OCELOT_3; |
@@ -234,7 +234,7 @@ void __init prom_init(void) | |||
234 | get_mac(prom_mac_addr_base); | 234 | get_mac(prom_mac_addr_base); |
235 | #endif | 235 | #endif |
236 | 236 | ||
237 | #ifndef CONFIG_MIPS64 | 237 | #ifndef CONFIG_64BIT |
238 | debug_vectors->printf("Booting Linux kernel...\n"); | 238 | debug_vectors->printf("Booting Linux kernel...\n"); |
239 | #endif | 239 | #endif |
240 | } | 240 | } |
diff --git a/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h b/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h index a6cf7a7959b3..97fb77dad723 100644 --- a/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h +++ b/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h | |||
@@ -32,7 +32,7 @@ | |||
32 | 32 | ||
33 | #include <linux/config.h> | 33 | #include <linux/config.h> |
34 | 34 | ||
35 | #ifdef CONFIG_MIPS64 | 35 | #ifdef CONFIG_64BIT |
36 | #define OCELOT_C_CS0_ADDR (0xfffffffffc000000) | 36 | #define OCELOT_C_CS0_ADDR (0xfffffffffc000000) |
37 | #else | 37 | #else |
38 | #define OCELOT_C_CS0_ADDR (0xfc000000) | 38 | #define OCELOT_C_CS0_ADDR (0xfc000000) |
diff --git a/arch/mips/momentum/ocelot_c/prom.c b/arch/mips/momentum/ocelot_c/prom.c index 49ac302d8901..375877aebcf6 100644 --- a/arch/mips/momentum/ocelot_c/prom.c +++ b/arch/mips/momentum/ocelot_c/prom.c | |||
@@ -94,7 +94,7 @@ void get_mac(char dest[6]) | |||
94 | #endif | 94 | #endif |
95 | 95 | ||
96 | 96 | ||
97 | #ifdef CONFIG_MIPS64 | 97 | #ifdef CONFIG_64BIT |
98 | 98 | ||
99 | unsigned long signext(unsigned long addr) | 99 | unsigned long signext(unsigned long addr) |
100 | { | 100 | { |
@@ -144,7 +144,7 @@ char *arg64(unsigned long addrin, int arg_index) | |||
144 | p = (char *)get_arg(args, arg_index); | 144 | p = (char *)get_arg(args, arg_index); |
145 | return p; | 145 | return p; |
146 | } | 146 | } |
147 | #endif /* CONFIG_MIPS64 */ | 147 | #endif /* CONFIG_64BIT */ |
148 | 148 | ||
149 | 149 | ||
150 | void __init prom_init(void) | 150 | void __init prom_init(void) |
@@ -155,7 +155,7 @@ void __init prom_init(void) | |||
155 | struct callvectors *cv = (struct callvectors *) fw_arg3; | 155 | struct callvectors *cv = (struct callvectors *) fw_arg3; |
156 | int i; | 156 | int i; |
157 | 157 | ||
158 | #ifdef CONFIG_MIPS64 | 158 | #ifdef CONFIG_64BIT |
159 | char *ptr; | 159 | char *ptr; |
160 | 160 | ||
161 | printk("prom_init - MIPS64\n"); | 161 | printk("prom_init - MIPS64\n"); |
@@ -197,7 +197,7 @@ void __init prom_init(void) | |||
197 | } | 197 | } |
198 | printk("arcs_cmdline: %s\n", arcs_cmdline); | 198 | printk("arcs_cmdline: %s\n", arcs_cmdline); |
199 | 199 | ||
200 | #else /* CONFIG_MIPS64 */ | 200 | #else /* CONFIG_64BIT */ |
201 | /* save the PROM vectors for debugging use */ | 201 | /* save the PROM vectors for debugging use */ |
202 | debug_vectors = cv; | 202 | debug_vectors = cv; |
203 | 203 | ||
@@ -222,7 +222,7 @@ void __init prom_init(void) | |||
222 | } | 222 | } |
223 | env++; | 223 | env++; |
224 | } | 224 | } |
225 | #endif /* CONFIG_MIPS64 */ | 225 | #endif /* CONFIG_64BIT */ |
226 | 226 | ||
227 | mips_machgroup = MACH_GROUP_MOMENCO; | 227 | mips_machgroup = MACH_GROUP_MOMENCO; |
228 | mips_machtype = MACH_MOMENCO_OCELOT_C; | 228 | mips_machtype = MACH_MOMENCO_OCELOT_C; |
@@ -232,7 +232,7 @@ void __init prom_init(void) | |||
232 | get_mac(prom_mac_addr_base); | 232 | get_mac(prom_mac_addr_base); |
233 | #endif | 233 | #endif |
234 | 234 | ||
235 | #ifndef CONFIG_MIPS64 | 235 | #ifndef CONFIG_64BIT |
236 | debug_vectors->printf("Booting Linux kernel...\n"); | 236 | debug_vectors->printf("Booting Linux kernel...\n"); |
237 | #endif | 237 | #endif |
238 | } | 238 | } |
diff --git a/arch/mips/momentum/ocelot_c/reset.c b/arch/mips/momentum/ocelot_c/reset.c index 1f2b4263cc8c..6a2489f3b9a0 100644 --- a/arch/mips/momentum/ocelot_c/reset.c +++ b/arch/mips/momentum/ocelot_c/reset.c | |||
@@ -28,7 +28,7 @@ void momenco_ocelot_restart(char *command) | |||
28 | { | 28 | { |
29 | /* base address of timekeeper portion of part */ | 29 | /* base address of timekeeper portion of part */ |
30 | void *nvram = (void *) | 30 | void *nvram = (void *) |
31 | #ifdef CONFIG_MIPS64 | 31 | #ifdef CONFIG_64BIT |
32 | 0xfffffffffc807000; | 32 | 0xfffffffffc807000; |
33 | #else | 33 | #else |
34 | 0xfc807000; | 34 | 0xfc807000; |
diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c index 021c00e3c07c..844ddd06349b 100644 --- a/arch/mips/momentum/ocelot_c/setup.c +++ b/arch/mips/momentum/ocelot_c/setup.c | |||
@@ -109,7 +109,7 @@ void PMON_v2_setup(void) | |||
109 | */ | 109 | */ |
110 | printk("PMON_v2_setup\n"); | 110 | printk("PMON_v2_setup\n"); |
111 | 111 | ||
112 | #ifdef CONFIG_MIPS64 | 112 | #ifdef CONFIG_64BIT |
113 | /* marvell and extra space */ | 113 | /* marvell and extra space */ |
114 | add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), 0xfffffffff4000000, PM_64K); | 114 | add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), 0xfffffffff4000000, PM_64K); |
115 | /* fpga, rtc, and uart */ | 115 | /* fpga, rtc, and uart */ |
@@ -134,7 +134,7 @@ void PMON_v2_setup(void) | |||
134 | 134 | ||
135 | unsigned long m48t37y_get_time(void) | 135 | unsigned long m48t37y_get_time(void) |
136 | { | 136 | { |
137 | #ifdef CONFIG_MIPS64 | 137 | #ifdef CONFIG_64BIT |
138 | unsigned char *rtc_base = (unsigned char*)0xfffffffffc800000; | 138 | unsigned char *rtc_base = (unsigned char*)0xfffffffffc800000; |
139 | #else | 139 | #else |
140 | unsigned char* rtc_base = (unsigned char*)0xfc800000; | 140 | unsigned char* rtc_base = (unsigned char*)0xfc800000; |
@@ -163,7 +163,7 @@ unsigned long m48t37y_get_time(void) | |||
163 | 163 | ||
164 | int m48t37y_set_time(unsigned long sec) | 164 | int m48t37y_set_time(unsigned long sec) |
165 | { | 165 | { |
166 | #ifdef CONFIG_MIPS64 | 166 | #ifdef CONFIG_64BIT |
167 | unsigned char* rtc_base = (unsigned char*)0xfffffffffc800000; | 167 | unsigned char* rtc_base = (unsigned char*)0xfffffffffc800000; |
168 | #else | 168 | #else |
169 | unsigned char* rtc_base = (unsigned char*)0xfc800000; | 169 | unsigned char* rtc_base = (unsigned char*)0xfc800000; |
@@ -342,7 +342,7 @@ static void __init momenco_ocelot_c_setup(void) | |||
342 | 342 | ||
343 | early_initcall(momenco_ocelot_c_setup); | 343 | early_initcall(momenco_ocelot_c_setup); |
344 | 344 | ||
345 | #ifndef CONFIG_MIPS64 | 345 | #ifndef CONFIG_64BIT |
346 | /* This needs to be one of the first initcalls, because no I/O port access | 346 | /* This needs to be one of the first initcalls, because no I/O port access |
347 | can work before this */ | 347 | can work before this */ |
348 | static int io_base_ioremap(void) | 348 | static int io_base_ioremap(void) |
diff --git a/arch/mips/pci/pci-ip32.c b/arch/mips/pci/pci-ip32.c index 1faeb034f06e..000dc6af6cd3 100644 --- a/arch/mips/pci/pci-ip32.c +++ b/arch/mips/pci/pci-ip32.c | |||
@@ -84,7 +84,7 @@ static irqreturn_t macepci_error(int irq, void *dev, struct pt_regs *regs) | |||
84 | 84 | ||
85 | 85 | ||
86 | extern struct pci_ops mace_pci_ops; | 86 | extern struct pci_ops mace_pci_ops; |
87 | #ifdef CONFIG_MIPS64 | 87 | #ifdef CONFIG_64BIT |
88 | static struct resource mace_pci_mem_resource = { | 88 | static struct resource mace_pci_mem_resource = { |
89 | .name = "SGI O2 PCI MEM", | 89 | .name = "SGI O2 PCI MEM", |
90 | .start = MACEPCI_HI_MEMORY, | 90 | .start = MACEPCI_HI_MEMORY, |
diff --git a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c index d6d0364fa760..d86943f9d812 100644 --- a/arch/mips/sibyte/cfe/setup.c +++ b/arch/mips/sibyte/cfe/setup.c | |||
@@ -33,7 +33,7 @@ | |||
33 | #include "cfe_error.h" | 33 | #include "cfe_error.h" |
34 | 34 | ||
35 | /* Max ram addressable in 32-bit segments */ | 35 | /* Max ram addressable in 32-bit segments */ |
36 | #ifdef CONFIG_MIPS64 | 36 | #ifdef CONFIG_64BIT |
37 | #define MAX_RAM_SIZE (~0ULL) | 37 | #define MAX_RAM_SIZE (~0ULL) |
38 | #else | 38 | #else |
39 | #ifdef CONFIG_HIGHMEM | 39 | #ifdef CONFIG_HIGHMEM |
diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c index 457aeb7be858..4742e4fc89f7 100644 --- a/arch/mips/sibyte/swarm/setup.c +++ b/arch/mips/sibyte/swarm/setup.c | |||
@@ -73,7 +73,7 @@ int swarm_be_handler(struct pt_regs *regs, int is_fixup) | |||
73 | { | 73 | { |
74 | if (!is_fixup && (regs->cp0_cause & 4)) { | 74 | if (!is_fixup && (regs->cp0_cause & 4)) { |
75 | /* Data bus error - print PA */ | 75 | /* Data bus error - print PA */ |
76 | #ifdef CONFIG_MIPS64 | 76 | #ifdef CONFIG_64BIT |
77 | printk("DBE physical address: %010lx\n", | 77 | printk("DBE physical address: %010lx\n", |
78 | __read_64bit_c0_register($26, 1)); | 78 | __read_64bit_c0_register($26, 1)); |
79 | #else | 79 | #else |