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authorRalf Baechle <ralf@linux-mips.org>2005-11-15 11:10:01 -0500
committerRalf Baechle <ralf@linux-mips.org>2005-11-17 11:23:57 -0500
commit1a6ea3ec6784cf3dedc338e1980dc0b4cf28a805 (patch)
tree91870e1281226e7ac1fac450c58e26d01f4028c5 /arch/mips
parent09b696efd93560609f25821208dae18027187425 (diff)
[MIPS] SEAD: More build fixes.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/mips-boards/sead/sead_int.c12
-rw-r--r--arch/mips/mips-boards/sead/sead_setup.c4
2 files changed, 3 insertions, 13 deletions
diff --git a/arch/mips/mips-boards/sead/sead_int.c b/arch/mips/mips-boards/sead/sead_int.c
index e1dd7e009750..90fda0d9915f 100644
--- a/arch/mips/mips-boards/sead/sead_int.c
+++ b/arch/mips/mips-boards/sead/sead_int.c
@@ -30,19 +30,9 @@
30 30
31extern asmlinkage void mipsIRQ(void); 31extern asmlinkage void mipsIRQ(void);
32 32
33asmlinkage void sead_hw0_irqdispatch(struct pt_regs *regs)
34{
35 do_IRQ(SEADINT_UART0, regs);
36}
37
38asmlinkage void sead_hw1_irqdispatch(struct pt_regs *regs)
39{
40 do_IRQ(SEADINT_UART1, regs);
41}
42
43void __init arch_init_irq(void) 33void __init arch_init_irq(void)
44{ 34{
45 mips_cpu_irq_init(0); 35 mips_cpu_irq_init(MIPSCPU_INT_BASE);
46 36
47 /* Now safe to set the exception vector. */ 37 /* Now safe to set the exception vector. */
48 set_except_vector(0, mipsIRQ); 38 set_except_vector(0, mipsIRQ);
diff --git a/arch/mips/mips-boards/sead/sead_setup.c b/arch/mips/mips-boards/sead/sead_setup.c
index de90bec5505e..f966bc161dfa 100644
--- a/arch/mips/mips-boards/sead/sead_setup.c
+++ b/arch/mips/mips-boards/sead/sead_setup.c
@@ -45,7 +45,7 @@ const char *get_system_type(void)
45 return "MIPS SEAD"; 45 return "MIPS SEAD";
46} 46}
47 47
48static void __init sead_setup(void) 48void __init plat_setup(void)
49{ 49{
50 ioport_resource.end = 0x7fffffff; 50 ioport_resource.end = 0x7fffffff;
51 51
@@ -69,7 +69,7 @@ static void __init serial_init(void)
69#else 69#else
70 s.iobase = SEAD_UART0_REGS_BASE+3; 70 s.iobase = SEAD_UART0_REGS_BASE+3;
71#endif 71#endif
72 s.irq = SEADINT_UART0; 72 s.irq = MIPSCPU_INT_BASE + MIPSCPU_INT_UART0;
73 s.uartclk = SEAD_BASE_BAUD * 16; 73 s.uartclk = SEAD_BASE_BAUD * 16;
74 s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ; 74 s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
75 s.iotype = 0; 75 s.iotype = 0;