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authorMaciej W. Rozycki <macro@linux-mips.org>2005-06-23 11:57:15 -0400
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 14:31:31 -0400
commitc4559f67b73d6c34fde0faac5c6c890a2cf3527c (patch)
tree4063b3a937215684db85cc4f70eabd99cf3b8573 /arch/mips
parent69c75fb458cd81bb29e1d9580469110b00316748 (diff)
Always use ".set mips3" rather than select between "mips2" or "mips3"
for assembling ll/sc sequences to avoid problems with 64-bit configurations. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/kernel/semaphore.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/kernel/semaphore.c b/arch/mips/kernel/semaphore.c
index dbb145ee00a7..1265358cdca1 100644
--- a/arch/mips/kernel/semaphore.c
+++ b/arch/mips/kernel/semaphore.c
@@ -42,7 +42,7 @@ static inline int __sem_update_count(struct semaphore *sem, int incr)
42 42
43 if (cpu_has_llsc && R10000_LLSC_WAR) { 43 if (cpu_has_llsc && R10000_LLSC_WAR) {
44 __asm__ __volatile__( 44 __asm__ __volatile__(
45 " .set mips2 \n" 45 " .set mips3 \n"
46 "1: ll %0, %2 # __sem_update_count \n" 46 "1: ll %0, %2 # __sem_update_count \n"
47 " sra %1, %0, 31 \n" 47 " sra %1, %0, 31 \n"
48 " not %1 \n" 48 " not %1 \n"
@@ -55,7 +55,7 @@ static inline int __sem_update_count(struct semaphore *sem, int incr)
55 : "r" (incr), "m" (sem->count)); 55 : "r" (incr), "m" (sem->count));
56 } else if (cpu_has_llsc) { 56 } else if (cpu_has_llsc) {
57 __asm__ __volatile__( 57 __asm__ __volatile__(
58 " .set mips2 \n" 58 " .set mips3 \n"
59 "1: ll %0, %2 # __sem_update_count \n" 59 "1: ll %0, %2 # __sem_update_count \n"
60 " sra %1, %0, 31 \n" 60 " sra %1, %0, 31 \n"
61 " not %1 \n" 61 " not %1 \n"