diff options
author | Markos Chandras <markos.chandras@imgtec.com> | 2014-07-14 07:43:28 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-08-01 18:06:38 -0400 |
commit | e647e6b5b355bbf58d5c20c181e69474e5aee5fe (patch) | |
tree | 7ee083801d1ca02986bcb972602a8b4428aea964 /arch/mips | |
parent | 03a58777de0895864ccdb93249f3ce8d9fcc13ac (diff) |
MIPS: cpu: Add new cpu option for Hardware Table Walker.
Moreover, report hardware page table walker support as 'htw' in the ASE
list of /proc/cpuinfo, if the core implements this feature.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7334/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/include/asm/cpu-features.h | 3 | ||||
-rw-r--r-- | arch/mips/include/asm/cpu.h | 1 | ||||
-rw-r--r-- | arch/mips/kernel/proc.c | 1 |
3 files changed, 5 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index c7d8c997d93e..3b9768e92e9e 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h | |||
@@ -29,6 +29,9 @@ | |||
29 | #ifndef cpu_has_eva | 29 | #ifndef cpu_has_eva |
30 | #define cpu_has_eva (cpu_data[0].options & MIPS_CPU_EVA) | 30 | #define cpu_has_eva (cpu_data[0].options & MIPS_CPU_EVA) |
31 | #endif | 31 | #endif |
32 | #ifndef cpu_has_htw | ||
33 | #define cpu_has_htw (cpu_data[0].options & MIPS_CPU_HTW) | ||
34 | #endif | ||
32 | 35 | ||
33 | /* | 36 | /* |
34 | * For the moment we don't consider R6000 and R8000 so we can assume that | 37 | * For the moment we don't consider R6000 and R8000 so we can assume that |
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index abacaa1f7293..ec6a0f964d6a 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h | |||
@@ -365,6 +365,7 @@ enum cpu_type_enum { | |||
365 | #define MIPS_CPU_TLBINV 0x02000000ull /* CPU supports TLBINV/F */ | 365 | #define MIPS_CPU_TLBINV 0x02000000ull /* CPU supports TLBINV/F */ |
366 | #define MIPS_CPU_SEGMENTS 0x04000000ull /* CPU supports Segmentation Control registers */ | 366 | #define MIPS_CPU_SEGMENTS 0x04000000ull /* CPU supports Segmentation Control registers */ |
367 | #define MIPS_CPU_EVA 0x80000000ull /* CPU supports Enhanced Virtual Addressing */ | 367 | #define MIPS_CPU_EVA 0x80000000ull /* CPU supports Enhanced Virtual Addressing */ |
368 | #define MIPS_CPU_HTW 0x100000000ull /* CPU support Hardware Page Table Walker */ | ||
368 | 369 | ||
369 | /* | 370 | /* |
370 | * CPU ASE encodings | 371 | * CPU ASE encodings |
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 62c4439a147b..097fc8d14e42 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c | |||
@@ -113,6 +113,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
113 | if (cpu_has_vz) seq_printf(m, "%s", " vz"); | 113 | if (cpu_has_vz) seq_printf(m, "%s", " vz"); |
114 | if (cpu_has_msa) seq_printf(m, "%s", " msa"); | 114 | if (cpu_has_msa) seq_printf(m, "%s", " msa"); |
115 | if (cpu_has_eva) seq_printf(m, "%s", " eva"); | 115 | if (cpu_has_eva) seq_printf(m, "%s", " eva"); |
116 | if (cpu_has_htw) seq_printf(m, "%s", " htw"); | ||
116 | seq_printf(m, "\n"); | 117 | seq_printf(m, "\n"); |
117 | 118 | ||
118 | if (cpu_has_mmips) { | 119 | if (cpu_has_mmips) { |