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authorThomas Gleixner <tglx@linutronix.de>2011-03-23 17:08:57 -0400
committerRalf Baechle <ralf@linux-mips.org>2011-03-25 13:45:16 -0400
commit7c8d948f1633da5ff81e4f5b31ef237d74c40127 (patch)
tree4f8a2bf7628ff9ff4d0621be0a9816d8866d584d /arch/mips
parent9fcecaf02dbde08337323bcca7917ec0baad0cc2 (diff)
MIPS: i8259: Convert to new irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2185/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/include/asm/irq.h4
-rw-r--r--arch/mips/kernel/i8259.c37
-rw-r--r--arch/mips/mti-malta/malta-smtc.c9
3 files changed, 24 insertions, 26 deletions
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index b003ed52ed17..bdc8b8c18328 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -55,8 +55,8 @@ static inline void smtc_im_ack_irq(unsigned int irq)
55#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF 55#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
56#include <linux/cpumask.h> 56#include <linux/cpumask.h>
57 57
58extern int plat_set_irq_affinity(unsigned int irq, 58extern int plat_set_irq_affinity(struct irq_data *d,
59 const struct cpumask *affinity); 59 const struct cpumask *affinity, bool force);
60extern void smtc_forward_irq(unsigned int irq); 60extern void smtc_forward_irq(unsigned int irq);
61 61
62/* 62/*
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index c58176cc796b..e221662bb80c 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -31,19 +31,19 @@
31 31
32static int i8259A_auto_eoi = -1; 32static int i8259A_auto_eoi = -1;
33DEFINE_RAW_SPINLOCK(i8259A_lock); 33DEFINE_RAW_SPINLOCK(i8259A_lock);
34static void disable_8259A_irq(unsigned int irq); 34static void disable_8259A_irq(struct irq_data *d);
35static void enable_8259A_irq(unsigned int irq); 35static void enable_8259A_irq(struct irq_data *d);
36static void mask_and_ack_8259A(unsigned int irq); 36static void mask_and_ack_8259A(struct irq_data *d);
37static void init_8259A(int auto_eoi); 37static void init_8259A(int auto_eoi);
38 38
39static struct irq_chip i8259A_chip = { 39static struct irq_chip i8259A_chip = {
40 .name = "XT-PIC", 40 .name = "XT-PIC",
41 .mask = disable_8259A_irq, 41 .irq_mask = disable_8259A_irq,
42 .disable = disable_8259A_irq, 42 .irq_disable = disable_8259A_irq,
43 .unmask = enable_8259A_irq, 43 .irq_unmask = enable_8259A_irq,
44 .mask_ack = mask_and_ack_8259A, 44 .irq_mask_ack = mask_and_ack_8259A,
45#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF 45#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
46 .set_affinity = plat_set_irq_affinity, 46 .irq_set_affinity = plat_set_irq_affinity,
47#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ 47#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
48}; 48};
49 49
@@ -59,12 +59,11 @@ static unsigned int cached_irq_mask = 0xffff;
59#define cached_master_mask (cached_irq_mask) 59#define cached_master_mask (cached_irq_mask)
60#define cached_slave_mask (cached_irq_mask >> 8) 60#define cached_slave_mask (cached_irq_mask >> 8)
61 61
62static void disable_8259A_irq(unsigned int irq) 62static void disable_8259A_irq(struct irq_data *d)
63{ 63{
64 unsigned int mask; 64 unsigned int mask, irq = d->irq - I8259A_IRQ_BASE;
65 unsigned long flags; 65 unsigned long flags;
66 66
67 irq -= I8259A_IRQ_BASE;
68 mask = 1 << irq; 67 mask = 1 << irq;
69 raw_spin_lock_irqsave(&i8259A_lock, flags); 68 raw_spin_lock_irqsave(&i8259A_lock, flags);
70 cached_irq_mask |= mask; 69 cached_irq_mask |= mask;
@@ -75,12 +74,11 @@ static void disable_8259A_irq(unsigned int irq)
75 raw_spin_unlock_irqrestore(&i8259A_lock, flags); 74 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
76} 75}
77 76
78static void enable_8259A_irq(unsigned int irq) 77static void enable_8259A_irq(struct irq_data *d)
79{ 78{
80 unsigned int mask; 79 unsigned int mask, irq = d->irq - I8259A_IRQ_BASE;
81 unsigned long flags; 80 unsigned long flags;
82 81
83 irq -= I8259A_IRQ_BASE;
84 mask = ~(1 << irq); 82 mask = ~(1 << irq);
85 raw_spin_lock_irqsave(&i8259A_lock, flags); 83 raw_spin_lock_irqsave(&i8259A_lock, flags);
86 cached_irq_mask &= mask; 84 cached_irq_mask &= mask;
@@ -145,12 +143,11 @@ static inline int i8259A_irq_real(unsigned int irq)
145 * first, _then_ send the EOI, and the order of EOI 143 * first, _then_ send the EOI, and the order of EOI
146 * to the two 8259s is important! 144 * to the two 8259s is important!
147 */ 145 */
148static void mask_and_ack_8259A(unsigned int irq) 146static void mask_and_ack_8259A(struct irq_data *d)
149{ 147{
150 unsigned int irqmask; 148 unsigned int irqmask, irq = d->irq - I8259A_IRQ_BASE;
151 unsigned long flags; 149 unsigned long flags;
152 150
153 irq -= I8259A_IRQ_BASE;
154 irqmask = 1 << irq; 151 irqmask = 1 << irq;
155 raw_spin_lock_irqsave(&i8259A_lock, flags); 152 raw_spin_lock_irqsave(&i8259A_lock, flags);
156 /* 153 /*
@@ -290,9 +287,9 @@ static void init_8259A(int auto_eoi)
290 * In AEOI mode we just have to mask the interrupt 287 * In AEOI mode we just have to mask the interrupt
291 * when acking. 288 * when acking.
292 */ 289 */
293 i8259A_chip.mask_ack = disable_8259A_irq; 290 i8259A_chip.irq_mask_ack = disable_8259A_irq;
294 else 291 else
295 i8259A_chip.mask_ack = mask_and_ack_8259A; 292 i8259A_chip.irq_mask_ack = mask_and_ack_8259A;
296 293
297 udelay(100); /* wait for 8259A to initialize */ 294 udelay(100); /* wait for 8259A to initialize */
298 295
diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c
index 2043cb6e71c5..e67891521ac1 100644
--- a/arch/mips/mti-malta/malta-smtc.c
+++ b/arch/mips/mti-malta/malta-smtc.c
@@ -113,7 +113,8 @@ struct plat_smp_ops msmtc_smp_ops = {
113 */ 113 */
114 114
115 115
116int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) 116int plat_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity,
117 bool force)
117{ 118{
118 cpumask_t tmask; 119 cpumask_t tmask;
119 int cpu = 0; 120 int cpu = 0;
@@ -143,7 +144,7 @@ int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
143 if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu)) 144 if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu))
144 cpu_clear(cpu, tmask); 145 cpu_clear(cpu, tmask);
145 } 146 }
146 cpumask_copy(irq_desc[irq].affinity, &tmask); 147 cpumask_copy(d->affinity, &tmask);
147 148
148 if (cpus_empty(tmask)) 149 if (cpus_empty(tmask))
149 /* 150 /*
@@ -154,8 +155,8 @@ int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
154 "IRQ affinity leaves no legal CPU for IRQ %d\n", irq); 155 "IRQ affinity leaves no legal CPU for IRQ %d\n", irq);
155 156
156 /* Do any generic SMTC IRQ affinity setup */ 157 /* Do any generic SMTC IRQ affinity setup */
157 smtc_set_irq_affinity(irq, tmask); 158 smtc_set_irq_affinity(d->irq, tmask);
158 159
159 return 0; 160 return IRQ_SET_MASK_OK_NOCOPY;
160} 161}
161#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ 162#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */