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authorFranck Bui-Huu <vagabon.xyz@gmail.com>2007-06-11 09:08:55 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-07-10 12:33:01 -0400
commit192cca6ef2c49ac5ff46f7a31cb9dd175995658e (patch)
tree7df5158d92d5afe078aab30dd9cf152d828eac02 /arch/mips
parentcfd2afc0f654e86e3f0b5060409b90f21964b9d3 (diff)
[MIPS] Remove Momenco Ocelot C support
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/configs/ocelot_c_defconfig delete mode 100644 arch/mips/momentum/ocelot_c/Makefile delete mode 100644 arch/mips/momentum/ocelot_c/cpci-irq.c delete mode 100644 arch/mips/momentum/ocelot_c/dbg_io.c delete mode 100644 arch/mips/momentum/ocelot_c/irq.c delete mode 100644 arch/mips/momentum/ocelot_c/ocelot_c_fpga.h delete mode 100644 arch/mips/momentum/ocelot_c/platform.c delete mode 100644 arch/mips/momentum/ocelot_c/prom.c delete mode 100644 arch/mips/momentum/ocelot_c/reset.c delete mode 100644 arch/mips/momentum/ocelot_c/setup.c delete mode 100644 arch/mips/momentum/ocelot_c/uart-irq.c delete mode 100644 arch/mips/pci/fixup-ocelot-c.c delete mode 100644 arch/mips/pci/pci-ocelot-c.c
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kconfig18
-rw-r--r--arch/mips/Makefile8
-rw-r--r--arch/mips/configs/atlas_defconfig1
-rw-r--r--arch/mips/configs/bigsur_defconfig1
-rw-r--r--arch/mips/configs/capcella_defconfig1
-rw-r--r--arch/mips/configs/cobalt_defconfig1
-rw-r--r--arch/mips/configs/db1000_defconfig1
-rw-r--r--arch/mips/configs/db1100_defconfig1
-rw-r--r--arch/mips/configs/db1200_defconfig1
-rw-r--r--arch/mips/configs/db1500_defconfig1
-rw-r--r--arch/mips/configs/db1550_defconfig1
-rw-r--r--arch/mips/configs/ddb5477_defconfig1
-rw-r--r--arch/mips/configs/decstation_defconfig1
-rw-r--r--arch/mips/configs/e55_defconfig1
-rw-r--r--arch/mips/configs/emma2rh_defconfig1
-rw-r--r--arch/mips/configs/excite_defconfig1
-rw-r--r--arch/mips/configs/ip22_defconfig1
-rw-r--r--arch/mips/configs/ip27_defconfig1
-rw-r--r--arch/mips/configs/ip32_defconfig1
-rw-r--r--arch/mips/configs/jazz_defconfig1
-rw-r--r--arch/mips/configs/jmr3927_defconfig1
-rw-r--r--arch/mips/configs/lasat200_defconfig1
-rw-r--r--arch/mips/configs/malta_defconfig1
-rw-r--r--arch/mips/configs/mipssim_defconfig1
-rw-r--r--arch/mips/configs/mpc30x_defconfig1
-rw-r--r--arch/mips/configs/ocelot_3_defconfig1
-rw-r--r--arch/mips/configs/ocelot_c_defconfig981
-rw-r--r--arch/mips/configs/ocelot_defconfig1
-rw-r--r--arch/mips/configs/pb1100_defconfig1
-rw-r--r--arch/mips/configs/pb1500_defconfig1
-rw-r--r--arch/mips/configs/pb1550_defconfig1
-rw-r--r--arch/mips/configs/pnx8550-jbs_defconfig1
-rw-r--r--arch/mips/configs/pnx8550-stb810_defconfig1
-rw-r--r--arch/mips/configs/qemu_defconfig1
-rw-r--r--arch/mips/configs/rbhma4200_defconfig1
-rw-r--r--arch/mips/configs/rbhma4500_defconfig1
-rw-r--r--arch/mips/configs/rm200_defconfig1
-rw-r--r--arch/mips/configs/sb1250-swarm_defconfig1
-rw-r--r--arch/mips/configs/sead_defconfig1
-rw-r--r--arch/mips/configs/tb0219_defconfig1
-rw-r--r--arch/mips/configs/tb0226_defconfig1
-rw-r--r--arch/mips/configs/tb0287_defconfig1
-rw-r--r--arch/mips/configs/workpad_defconfig1
-rw-r--r--arch/mips/configs/wrppmc_defconfig1
-rw-r--r--arch/mips/configs/yosemite_defconfig1
-rw-r--r--arch/mips/defconfig1
-rw-r--r--arch/mips/momentum/ocelot_c/Makefile8
-rw-r--r--arch/mips/momentum/ocelot_c/cpci-irq.c100
-rw-r--r--arch/mips/momentum/ocelot_c/dbg_io.c121
-rw-r--r--arch/mips/momentum/ocelot_c/irq.c107
-rw-r--r--arch/mips/momentum/ocelot_c/ocelot_c_fpga.h61
-rw-r--r--arch/mips/momentum/ocelot_c/platform.c183
-rw-r--r--arch/mips/momentum/ocelot_c/prom.c183
-rw-r--r--arch/mips/momentum/ocelot_c/reset.c58
-rw-r--r--arch/mips/momentum/ocelot_c/setup.c362
-rw-r--r--arch/mips/momentum/ocelot_c/uart-irq.c91
-rw-r--r--arch/mips/pci/Makefile1
-rw-r--r--arch/mips/pci/fixup-ocelot-c.c41
-rw-r--r--arch/mips/pci/pci-ocelot-c.c145
59 files changed, 0 insertions, 2511 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index a29ebfde6077..cba171a5eb03 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -276,24 +276,6 @@ config MOMENCO_OCELOT_3
276 The Ocelot-3 is based off Discovery III System Controller and 276 The Ocelot-3 is based off Discovery III System Controller and
277 PMC-Sierra Rm79000 core. 277 PMC-Sierra Rm79000 core.
278 278
279config MOMENCO_OCELOT_C
280 bool "Momentum Ocelot-C board"
281 select DMA_NONCOHERENT
282 select HW_HAS_PCI
283 select IRQ_CPU
284 select IRQ_MV64340
285 select PCI_MARVELL
286 select RM7000_CPU_SCACHE
287 select SWAP_IO_SPACE
288 select SYS_HAS_CPU_RM7000
289 select SYS_SUPPORTS_32BIT_KERNEL
290 select SYS_SUPPORTS_64BIT_KERNEL
291 select SYS_SUPPORTS_BIG_ENDIAN
292 select GENERIC_HARDIRQS_NO__DO_IRQ
293 help
294 The Ocelot is a MIPS-based Single Board Computer (SBC) made by
295 Momentum Computer <http://www.momenco.com/>.
296
297config PNX8550_JBS 279config PNX8550_JBS
298 bool "Philips PNX8550 based JBS board" 280 bool "Philips PNX8550 based JBS board"
299 select PNX8550 281 select PNX8550
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index ddb048b8600a..fc09769b3dd4 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -335,14 +335,6 @@ cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
335load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000 335load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
336 336
337# 337#
338# Momentum Ocelot-C and -CS boards
339#
340# The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
341# mips_io_port_base.
342core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/
343load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000
344
345#
346# PMC-Sierra Yosemite 338# PMC-Sierra Yosemite
347# 339#
348core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/ 340core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
diff --git a/arch/mips/configs/atlas_defconfig b/arch/mips/configs/atlas_defconfig
index 99c54f3da36a..de855d1fc01f 100644
--- a/arch/mips/configs/atlas_defconfig
+++ b/arch/mips/configs/atlas_defconfig
@@ -35,7 +35,6 @@ CONFIG_MIPS_ATLAS=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index c885e4fc4e41..bf88a6ce8042 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig
index a5ebedc1d1de..7582709874c3 100644
--- a/arch/mips/configs/capcella_defconfig
+++ b/arch/mips/configs/capcella_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig
index c70456ede3d5..9c5750c91810 100644
--- a/arch/mips/configs/cobalt_defconfig
+++ b/arch/mips/configs/cobalt_defconfig
@@ -21,7 +21,6 @@ CONFIG_MIPS_COBALT=y
21# CONFIG_MIPS_SIM is not set 21# CONFIG_MIPS_SIM is not set
22# CONFIG_MOMENCO_OCELOT is not set 22# CONFIG_MOMENCO_OCELOT is not set
23# CONFIG_MOMENCO_OCELOT_3 is not set 23# CONFIG_MOMENCO_OCELOT_3 is not set
24# CONFIG_MOMENCO_OCELOT_C is not set
25# CONFIG_PNX8550_JBS is not set 24# CONFIG_PNX8550_JBS is not set
26# CONFIG_PNX8550_STB810 is not set 25# CONFIG_PNX8550_STB810 is not set
27# CONFIG_DDB5477 is not set 26# CONFIG_DDB5477 is not set
diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig
index 87e99e5ca84d..bbf007a69105 100644
--- a/arch/mips/configs/db1000_defconfig
+++ b/arch/mips/configs/db1000_defconfig
@@ -36,7 +36,6 @@ CONFIG_MIPS_DB1000=y
36# CONFIG_MOMENCO_JAGUAR_ATX is not set 36# CONFIG_MOMENCO_JAGUAR_ATX is not set
37# CONFIG_MOMENCO_OCELOT is not set 37# CONFIG_MOMENCO_OCELOT is not set
38# CONFIG_MOMENCO_OCELOT_3 is not set 38# CONFIG_MOMENCO_OCELOT_3 is not set
39# CONFIG_MOMENCO_OCELOT_C is not set
40# CONFIG_MOMENCO_OCELOT_G is not set 39# CONFIG_MOMENCO_OCELOT_G is not set
41# CONFIG_MIPS_XXS1500 is not set 40# CONFIG_MIPS_XXS1500 is not set
42# CONFIG_PNX8550_JBS is not set 41# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig
index 5d46a9982832..384e41afb544 100644
--- a/arch/mips/configs/db1100_defconfig
+++ b/arch/mips/configs/db1100_defconfig
@@ -36,7 +36,6 @@ CONFIG_MIPS_DB1100=y
36# CONFIG_MOMENCO_JAGUAR_ATX is not set 36# CONFIG_MOMENCO_JAGUAR_ATX is not set
37# CONFIG_MOMENCO_OCELOT is not set 37# CONFIG_MOMENCO_OCELOT is not set
38# CONFIG_MOMENCO_OCELOT_3 is not set 38# CONFIG_MOMENCO_OCELOT_3 is not set
39# CONFIG_MOMENCO_OCELOT_C is not set
40# CONFIG_MOMENCO_OCELOT_G is not set 39# CONFIG_MOMENCO_OCELOT_G is not set
41# CONFIG_MIPS_XXS1500 is not set 40# CONFIG_MIPS_XXS1500 is not set
42# CONFIG_PNX8550_JBS is not set 41# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/db1200_defconfig b/arch/mips/configs/db1200_defconfig
index e6f4242268fb..76c3c46851a7 100644
--- a/arch/mips/configs/db1200_defconfig
+++ b/arch/mips/configs/db1200_defconfig
@@ -36,7 +36,6 @@ CONFIG_MIPS_DB1200=y
36# CONFIG_MOMENCO_JAGUAR_ATX is not set 36# CONFIG_MOMENCO_JAGUAR_ATX is not set
37# CONFIG_MOMENCO_OCELOT is not set 37# CONFIG_MOMENCO_OCELOT is not set
38# CONFIG_MOMENCO_OCELOT_3 is not set 38# CONFIG_MOMENCO_OCELOT_3 is not set
39# CONFIG_MOMENCO_OCELOT_C is not set
40# CONFIG_MOMENCO_OCELOT_G is not set 39# CONFIG_MOMENCO_OCELOT_G is not set
41# CONFIG_MIPS_XXS1500 is not set 40# CONFIG_MIPS_XXS1500 is not set
42# CONFIG_PNX8550_JBS is not set 41# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig
index ea5609339146..89c458086e6e 100644
--- a/arch/mips/configs/db1500_defconfig
+++ b/arch/mips/configs/db1500_defconfig
@@ -36,7 +36,6 @@ CONFIG_MIPS_DB1500=y
36# CONFIG_MOMENCO_JAGUAR_ATX is not set 36# CONFIG_MOMENCO_JAGUAR_ATX is not set
37# CONFIG_MOMENCO_OCELOT is not set 37# CONFIG_MOMENCO_OCELOT is not set
38# CONFIG_MOMENCO_OCELOT_3 is not set 38# CONFIG_MOMENCO_OCELOT_3 is not set
39# CONFIG_MOMENCO_OCELOT_C is not set
40# CONFIG_MOMENCO_OCELOT_G is not set 39# CONFIG_MOMENCO_OCELOT_G is not set
41# CONFIG_MIPS_XXS1500 is not set 40# CONFIG_MIPS_XXS1500 is not set
42# CONFIG_PNX8550_JBS is not set 41# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig
index 2728a0018b58..c83ba3cc1f05 100644
--- a/arch/mips/configs/db1550_defconfig
+++ b/arch/mips/configs/db1550_defconfig
@@ -36,7 +36,6 @@ CONFIG_MIPS_DB1550=y
36# CONFIG_MOMENCO_JAGUAR_ATX is not set 36# CONFIG_MOMENCO_JAGUAR_ATX is not set
37# CONFIG_MOMENCO_OCELOT is not set 37# CONFIG_MOMENCO_OCELOT is not set
38# CONFIG_MOMENCO_OCELOT_3 is not set 38# CONFIG_MOMENCO_OCELOT_3 is not set
39# CONFIG_MOMENCO_OCELOT_C is not set
40# CONFIG_MOMENCO_OCELOT_G is not set 39# CONFIG_MOMENCO_OCELOT_G is not set
41# CONFIG_MIPS_XXS1500 is not set 40# CONFIG_MIPS_XXS1500 is not set
42# CONFIG_PNX8550_JBS is not set 41# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/ddb5477_defconfig b/arch/mips/configs/ddb5477_defconfig
index d67f15009efa..7ec230ed225a 100644
--- a/arch/mips/configs/ddb5477_defconfig
+++ b/arch/mips/configs/ddb5477_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig
index 25e533667504..2a4948a2d7d3 100644
--- a/arch/mips/configs/decstation_defconfig
+++ b/arch/mips/configs/decstation_defconfig
@@ -35,7 +35,6 @@ CONFIG_MACH_DECSTATION=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig
index 1257a7016c44..d853278fce65 100644
--- a/arch/mips/configs/e55_defconfig
+++ b/arch/mips/configs/e55_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/emma2rh_defconfig b/arch/mips/configs/emma2rh_defconfig
index 9318fce31732..31f03f8113ee 100644
--- a/arch/mips/configs/emma2rh_defconfig
+++ b/arch/mips/configs/emma2rh_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/excite_defconfig b/arch/mips/configs/excite_defconfig
index e35a8f58c071..b1a9e0b3067e 100644
--- a/arch/mips/configs/excite_defconfig
+++ b/arch/mips/configs/excite_defconfig
@@ -36,7 +36,6 @@ CONFIG_BASLER_EXCITE=y
36# CONFIG_MOMENCO_JAGUAR_ATX is not set 36# CONFIG_MOMENCO_JAGUAR_ATX is not set
37# CONFIG_MOMENCO_OCELOT is not set 37# CONFIG_MOMENCO_OCELOT is not set
38# CONFIG_MOMENCO_OCELOT_3 is not set 38# CONFIG_MOMENCO_OCELOT_3 is not set
39# CONFIG_MOMENCO_OCELOT_C is not set
40# CONFIG_MOMENCO_OCELOT_G is not set 39# CONFIG_MOMENCO_OCELOT_G is not set
41# CONFIG_MIPS_XXS1500 is not set 40# CONFIG_MIPS_XXS1500 is not set
42# CONFIG_PNX8550_JBS is not set 41# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig
index c655d4da0c68..2f2243658aad 100644
--- a/arch/mips/configs/ip22_defconfig
+++ b/arch/mips/configs/ip22_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index a2475e7e909d..267af44f97ab 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index f95d5fef3a0b..00ec6ed5e550 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/jazz_defconfig b/arch/mips/configs/jazz_defconfig
index e2f5a5a41792..12c02656013e 100644
--- a/arch/mips/configs/jazz_defconfig
+++ b/arch/mips/configs/jazz_defconfig
@@ -35,7 +35,6 @@ CONFIG_MACH_JAZZ=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index 2c88b3295af4..61235a552df2 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/lasat200_defconfig b/arch/mips/configs/lasat200_defconfig
index ccf7227cbf98..c427c08efb6c 100644
--- a/arch/mips/configs/lasat200_defconfig
+++ b/arch/mips/configs/lasat200_defconfig
@@ -35,7 +35,6 @@ CONFIG_LASAT=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index 1c839cf29d86..1f5cf9200846 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -35,7 +35,6 @@ CONFIG_MIPS_MALTA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig
index 559f4d0038b0..ef5cae94c076 100644
--- a/arch/mips/configs/mipssim_defconfig
+++ b/arch/mips/configs/mipssim_defconfig
@@ -35,7 +35,6 @@ CONFIG_MIPS_SIM=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig
index 811ada95d729..73a5314603e3 100644
--- a/arch/mips/configs/mpc30x_defconfig
+++ b/arch/mips/configs/mpc30x_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/ocelot_3_defconfig b/arch/mips/configs/ocelot_3_defconfig
index a53175a109e7..cc99c83a81d2 100644
--- a/arch/mips/configs/ocelot_3_defconfig
+++ b/arch/mips/configs/ocelot_3_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37CONFIG_MOMENCO_OCELOT_3=y 37CONFIG_MOMENCO_OCELOT_3=y
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/ocelot_c_defconfig b/arch/mips/configs/ocelot_c_defconfig
deleted file mode 100644
index 38e86f16f856..000000000000
--- a/arch/mips/configs/ocelot_c_defconfig
+++ /dev/null
@@ -1,981 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.20
4# Tue Feb 20 21:47:36 2007
5#
6CONFIG_MIPS=y
7
8#
9# Machine selection
10#
11CONFIG_ZONE_DMA=y
12# CONFIG_MIPS_MTX1 is not set
13# CONFIG_MIPS_BOSPORUS is not set
14# CONFIG_MIPS_PB1000 is not set
15# CONFIG_MIPS_PB1100 is not set
16# CONFIG_MIPS_PB1500 is not set
17# CONFIG_MIPS_PB1550 is not set
18# CONFIG_MIPS_PB1200 is not set
19# CONFIG_MIPS_DB1000 is not set
20# CONFIG_MIPS_DB1100 is not set
21# CONFIG_MIPS_DB1500 is not set
22# CONFIG_MIPS_DB1550 is not set
23# CONFIG_MIPS_DB1200 is not set
24# CONFIG_MIPS_MIRAGE is not set
25# CONFIG_BASLER_EXCITE is not set
26# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MACH_JAZZ is not set
29# CONFIG_LASAT is not set
30# CONFIG_MIPS_ATLAS is not set
31# CONFIG_MIPS_MALTA is not set
32# CONFIG_MIPS_SEAD is not set
33# CONFIG_WR_PPMC is not set
34# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set
38CONFIG_MOMENCO_OCELOT_C=y
39# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set
42# CONFIG_PNX8550_STB810 is not set
43# CONFIG_DDB5477 is not set
44# CONFIG_MACH_VR41XX is not set
45# CONFIG_PMC_YOSEMITE is not set
46# CONFIG_QEMU is not set
47# CONFIG_MARKEINS is not set
48# CONFIG_SGI_IP22 is not set
49# CONFIG_SGI_IP27 is not set
50# CONFIG_SGI_IP32 is not set
51# CONFIG_SIBYTE_BIGSUR is not set
52# CONFIG_SIBYTE_SWARM is not set
53# CONFIG_SIBYTE_SENTOSA is not set
54# CONFIG_SIBYTE_RHONE is not set
55# CONFIG_SIBYTE_CARMEL is not set
56# CONFIG_SIBYTE_PTSWARM is not set
57# CONFIG_SIBYTE_LITTLESUR is not set
58# CONFIG_SIBYTE_CRHINE is not set
59# CONFIG_SIBYTE_CRHONE is not set
60# CONFIG_SNI_RM is not set
61# CONFIG_TOSHIBA_JMR3927 is not set
62# CONFIG_TOSHIBA_RBTX4927 is not set
63# CONFIG_TOSHIBA_RBTX4938 is not set
64CONFIG_RWSEM_GENERIC_SPINLOCK=y
65# CONFIG_ARCH_HAS_ILOG2_U32 is not set
66# CONFIG_ARCH_HAS_ILOG2_U64 is not set
67CONFIG_GENERIC_FIND_NEXT_BIT=y
68CONFIG_GENERIC_HWEIGHT=y
69CONFIG_GENERIC_CALIBRATE_DELAY=y
70CONFIG_GENERIC_TIME=y
71CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
72CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
73CONFIG_DMA_NONCOHERENT=y
74CONFIG_DMA_NEED_PCI_MAP_STATE=y
75CONFIG_CPU_BIG_ENDIAN=y
76# CONFIG_CPU_LITTLE_ENDIAN is not set
77CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
78CONFIG_IRQ_CPU=y
79CONFIG_IRQ_MV64340=y
80CONFIG_PCI_MARVELL=y
81CONFIG_SWAP_IO_SPACE=y
82CONFIG_MIPS_L1_CACHE_SHIFT=5
83
84#
85# CPU selection
86#
87# CONFIG_CPU_MIPS32_R1 is not set
88# CONFIG_CPU_MIPS32_R2 is not set
89# CONFIG_CPU_MIPS64_R1 is not set
90# CONFIG_CPU_MIPS64_R2 is not set
91# CONFIG_CPU_R3000 is not set
92# CONFIG_CPU_TX39XX is not set
93# CONFIG_CPU_VR41XX is not set
94# CONFIG_CPU_R4300 is not set
95# CONFIG_CPU_R4X00 is not set
96# CONFIG_CPU_TX49XX is not set
97# CONFIG_CPU_R5000 is not set
98# CONFIG_CPU_R5432 is not set
99# CONFIG_CPU_R6000 is not set
100# CONFIG_CPU_NEVADA is not set
101# CONFIG_CPU_R8000 is not set
102# CONFIG_CPU_R10000 is not set
103CONFIG_CPU_RM7000=y
104# CONFIG_CPU_RM9000 is not set
105# CONFIG_CPU_SB1 is not set
106CONFIG_SYS_HAS_CPU_RM7000=y
107CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
108CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
109CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
110CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
111
112#
113# Kernel type
114#
115# CONFIG_32BIT is not set
116CONFIG_64BIT=y
117CONFIG_PAGE_SIZE_4KB=y
118# CONFIG_PAGE_SIZE_8KB is not set
119# CONFIG_PAGE_SIZE_16KB is not set
120# CONFIG_PAGE_SIZE_64KB is not set
121CONFIG_BOARD_SCACHE=y
122CONFIG_RM7000_CPU_SCACHE=y
123CONFIG_CPU_HAS_PREFETCH=y
124CONFIG_MIPS_MT_DISABLED=y
125# CONFIG_MIPS_MT_SMP is not set
126# CONFIG_MIPS_MT_SMTC is not set
127# CONFIG_MIPS_VPE_LOADER is not set
128CONFIG_CPU_HAS_LLSC=y
129CONFIG_CPU_HAS_SYNC=y
130CONFIG_GENERIC_HARDIRQS=y
131CONFIG_GENERIC_IRQ_PROBE=y
132CONFIG_CPU_SUPPORTS_HIGHMEM=y
133CONFIG_ARCH_FLATMEM_ENABLE=y
134CONFIG_SELECT_MEMORY_MODEL=y
135CONFIG_FLATMEM_MANUAL=y
136# CONFIG_DISCONTIGMEM_MANUAL is not set
137# CONFIG_SPARSEMEM_MANUAL is not set
138CONFIG_FLATMEM=y
139CONFIG_FLAT_NODE_MEM_MAP=y
140# CONFIG_SPARSEMEM_STATIC is not set
141CONFIG_SPLIT_PTLOCK_CPUS=4
142CONFIG_RESOURCES_64BIT=y
143CONFIG_ZONE_DMA_FLAG=1
144# CONFIG_HZ_48 is not set
145# CONFIG_HZ_100 is not set
146# CONFIG_HZ_128 is not set
147# CONFIG_HZ_250 is not set
148# CONFIG_HZ_256 is not set
149CONFIG_HZ_1000=y
150# CONFIG_HZ_1024 is not set
151CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
152CONFIG_HZ=1000
153CONFIG_PREEMPT_NONE=y
154# CONFIG_PREEMPT_VOLUNTARY is not set
155# CONFIG_PREEMPT is not set
156# CONFIG_KEXEC is not set
157CONFIG_LOCKDEP_SUPPORT=y
158CONFIG_STACKTRACE_SUPPORT=y
159CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
160
161#
162# Code maturity level options
163#
164CONFIG_EXPERIMENTAL=y
165CONFIG_BROKEN_ON_SMP=y
166CONFIG_INIT_ENV_ARG_LIMIT=32
167
168#
169# General setup
170#
171CONFIG_LOCALVERSION=""
172CONFIG_LOCALVERSION_AUTO=y
173CONFIG_SWAP=y
174CONFIG_SYSVIPC=y
175# CONFIG_IPC_NS is not set
176CONFIG_SYSVIPC_SYSCTL=y
177# CONFIG_POSIX_MQUEUE is not set
178# CONFIG_BSD_PROCESS_ACCT is not set
179# CONFIG_TASKSTATS is not set
180# CONFIG_UTS_NS is not set
181# CONFIG_AUDIT is not set
182# CONFIG_IKCONFIG is not set
183CONFIG_SYSFS_DEPRECATED=y
184CONFIG_RELAY=y
185# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
186CONFIG_SYSCTL=y
187CONFIG_EMBEDDED=y
188CONFIG_SYSCTL_SYSCALL=y
189CONFIG_KALLSYMS=y
190# CONFIG_KALLSYMS_EXTRA_PASS is not set
191CONFIG_HOTPLUG=y
192CONFIG_PRINTK=y
193CONFIG_BUG=y
194CONFIG_ELF_CORE=y
195CONFIG_BASE_FULL=y
196CONFIG_FUTEX=y
197CONFIG_EPOLL=y
198CONFIG_SHMEM=y
199CONFIG_SLAB=y
200CONFIG_VM_EVENT_COUNTERS=y
201CONFIG_RT_MUTEXES=y
202# CONFIG_TINY_SHMEM is not set
203CONFIG_BASE_SMALL=0
204# CONFIG_SLOB is not set
205
206#
207# Loadable module support
208#
209# CONFIG_MODULES is not set
210
211#
212# Block layer
213#
214CONFIG_BLOCK=y
215# CONFIG_BLK_DEV_IO_TRACE is not set
216
217#
218# IO Schedulers
219#
220CONFIG_IOSCHED_NOOP=y
221CONFIG_IOSCHED_AS=y
222CONFIG_IOSCHED_DEADLINE=y
223CONFIG_IOSCHED_CFQ=y
224CONFIG_DEFAULT_AS=y
225# CONFIG_DEFAULT_DEADLINE is not set
226# CONFIG_DEFAULT_CFQ is not set
227# CONFIG_DEFAULT_NOOP is not set
228CONFIG_DEFAULT_IOSCHED="anticipatory"
229
230#
231# Bus options (PCI, PCMCIA, EISA, ISA, TC)
232#
233CONFIG_HW_HAS_PCI=y
234CONFIG_PCI=y
235CONFIG_MMU=y
236
237#
238# PCCARD (PCMCIA/CardBus) support
239#
240# CONFIG_PCCARD is not set
241
242#
243# PCI Hotplug Support
244#
245# CONFIG_HOTPLUG_PCI is not set
246
247#
248# Executable file formats
249#
250CONFIG_BINFMT_ELF=y
251# CONFIG_BINFMT_MISC is not set
252# CONFIG_BUILD_ELF64 is not set
253CONFIG_MIPS32_COMPAT=y
254CONFIG_COMPAT=y
255CONFIG_SYSVIPC_COMPAT=y
256CONFIG_MIPS32_O32=y
257CONFIG_MIPS32_N32=y
258CONFIG_BINFMT_ELF32=y
259
260#
261# Power management options
262#
263CONFIG_PM=y
264# CONFIG_PM_LEGACY is not set
265# CONFIG_PM_DEBUG is not set
266# CONFIG_PM_SYSFS_DEPRECATED is not set
267
268#
269# Networking
270#
271CONFIG_NET=y
272
273#
274# Networking options
275#
276# CONFIG_NETDEBUG is not set
277# CONFIG_PACKET is not set
278CONFIG_UNIX=y
279CONFIG_XFRM=y
280CONFIG_XFRM_USER=y
281# CONFIG_XFRM_SUB_POLICY is not set
282CONFIG_XFRM_MIGRATE=y
283CONFIG_NET_KEY=y
284CONFIG_NET_KEY_MIGRATE=y
285CONFIG_INET=y
286# CONFIG_IP_MULTICAST is not set
287# CONFIG_IP_ADVANCED_ROUTER is not set
288CONFIG_IP_FIB_HASH=y
289CONFIG_IP_PNP=y
290CONFIG_IP_PNP_DHCP=y
291# CONFIG_IP_PNP_BOOTP is not set
292# CONFIG_IP_PNP_RARP is not set
293# CONFIG_NET_IPIP is not set
294# CONFIG_NET_IPGRE is not set
295# CONFIG_ARPD is not set
296# CONFIG_SYN_COOKIES is not set
297# CONFIG_INET_AH is not set
298# CONFIG_INET_ESP is not set
299# CONFIG_INET_IPCOMP is not set
300# CONFIG_INET_XFRM_TUNNEL is not set
301# CONFIG_INET_TUNNEL is not set
302CONFIG_INET_XFRM_MODE_TRANSPORT=y
303CONFIG_INET_XFRM_MODE_TUNNEL=y
304CONFIG_INET_XFRM_MODE_BEET=y
305CONFIG_INET_DIAG=y
306CONFIG_INET_TCP_DIAG=y
307# CONFIG_TCP_CONG_ADVANCED is not set
308CONFIG_TCP_CONG_CUBIC=y
309CONFIG_DEFAULT_TCP_CONG="cubic"
310CONFIG_TCP_MD5SIG=y
311# CONFIG_IPV6 is not set
312# CONFIG_INET6_XFRM_TUNNEL is not set
313# CONFIG_INET6_TUNNEL is not set
314CONFIG_NETWORK_SECMARK=y
315# CONFIG_NETFILTER is not set
316
317#
318# DCCP Configuration (EXPERIMENTAL)
319#
320# CONFIG_IP_DCCP is not set
321
322#
323# SCTP Configuration (EXPERIMENTAL)
324#
325# CONFIG_IP_SCTP is not set
326
327#
328# TIPC Configuration (EXPERIMENTAL)
329#
330# CONFIG_TIPC is not set
331# CONFIG_ATM is not set
332# CONFIG_BRIDGE is not set
333# CONFIG_VLAN_8021Q is not set
334# CONFIG_DECNET is not set
335# CONFIG_LLC2 is not set
336# CONFIG_IPX is not set
337# CONFIG_ATALK is not set
338# CONFIG_X25 is not set
339# CONFIG_LAPB is not set
340# CONFIG_ECONET is not set
341# CONFIG_WAN_ROUTER is not set
342
343#
344# QoS and/or fair queueing
345#
346# CONFIG_NET_SCHED is not set
347
348#
349# Network testing
350#
351# CONFIG_NET_PKTGEN is not set
352# CONFIG_HAMRADIO is not set
353# CONFIG_IRDA is not set
354# CONFIG_BT is not set
355CONFIG_IEEE80211=y
356# CONFIG_IEEE80211_DEBUG is not set
357CONFIG_IEEE80211_CRYPT_WEP=y
358CONFIG_IEEE80211_CRYPT_CCMP=y
359CONFIG_IEEE80211_SOFTMAC=y
360# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
361CONFIG_WIRELESS_EXT=y
362
363#
364# Device Drivers
365#
366
367#
368# Generic Driver Options
369#
370CONFIG_STANDALONE=y
371CONFIG_PREVENT_FIRMWARE_BUILD=y
372CONFIG_FW_LOADER=y
373# CONFIG_SYS_HYPERVISOR is not set
374
375#
376# Connector - unified userspace <-> kernelspace linker
377#
378CONFIG_CONNECTOR=y
379CONFIG_PROC_EVENTS=y
380
381#
382# Memory Technology Devices (MTD)
383#
384# CONFIG_MTD is not set
385
386#
387# Parallel port support
388#
389# CONFIG_PARPORT is not set
390
391#
392# Plug and Play support
393#
394# CONFIG_PNPACPI is not set
395
396#
397# Block devices
398#
399# CONFIG_BLK_CPQ_DA is not set
400# CONFIG_BLK_CPQ_CISS_DA is not set
401# CONFIG_BLK_DEV_DAC960 is not set
402# CONFIG_BLK_DEV_UMEM is not set
403# CONFIG_BLK_DEV_COW_COMMON is not set
404# CONFIG_BLK_DEV_LOOP is not set
405# CONFIG_BLK_DEV_NBD is not set
406# CONFIG_BLK_DEV_SX8 is not set
407# CONFIG_BLK_DEV_RAM is not set
408# CONFIG_BLK_DEV_INITRD is not set
409CONFIG_CDROM_PKTCDVD=y
410CONFIG_CDROM_PKTCDVD_BUFFERS=8
411# CONFIG_CDROM_PKTCDVD_WCACHE is not set
412CONFIG_ATA_OVER_ETH=y
413
414#
415# Misc devices
416#
417CONFIG_SGI_IOC4=y
418# CONFIG_TIFM_CORE is not set
419
420#
421# ATA/ATAPI/MFM/RLL support
422#
423# CONFIG_IDE is not set
424
425#
426# SCSI device support
427#
428CONFIG_RAID_ATTRS=y
429# CONFIG_SCSI is not set
430# CONFIG_SCSI_NETLINK is not set
431
432#
433# Serial ATA (prod) and Parallel ATA (experimental) drivers
434#
435# CONFIG_ATA is not set
436
437#
438# Multi-device support (RAID and LVM)
439#
440# CONFIG_MD is not set
441
442#
443# Fusion MPT device support
444#
445# CONFIG_FUSION is not set
446
447#
448# IEEE 1394 (FireWire) support
449#
450# CONFIG_IEEE1394 is not set
451
452#
453# I2O device support
454#
455# CONFIG_I2O is not set
456
457#
458# Network device support
459#
460CONFIG_NETDEVICES=y
461# CONFIG_DUMMY is not set
462# CONFIG_BONDING is not set
463# CONFIG_EQUALIZER is not set
464# CONFIG_TUN is not set
465
466#
467# ARCnet devices
468#
469# CONFIG_ARCNET is not set
470
471#
472# PHY device support
473#
474CONFIG_PHYLIB=y
475
476#
477# MII PHY device drivers
478#
479CONFIG_MARVELL_PHY=y
480CONFIG_DAVICOM_PHY=y
481CONFIG_QSEMI_PHY=y
482CONFIG_LXT_PHY=y
483CONFIG_CICADA_PHY=y
484CONFIG_VITESSE_PHY=y
485CONFIG_SMSC_PHY=y
486# CONFIG_BROADCOM_PHY is not set
487# CONFIG_FIXED_PHY is not set
488
489#
490# Ethernet (10 or 100Mbit)
491#
492CONFIG_NET_ETHERNET=y
493# CONFIG_MII is not set
494# CONFIG_HAPPYMEAL is not set
495# CONFIG_SUNGEM is not set
496# CONFIG_CASSINI is not set
497# CONFIG_NET_VENDOR_3COM is not set
498# CONFIG_DM9000 is not set
499
500#
501# Tulip family network device support
502#
503# CONFIG_NET_TULIP is not set
504# CONFIG_HP100 is not set
505# CONFIG_NET_PCI is not set
506
507#
508# Ethernet (1000 Mbit)
509#
510# CONFIG_ACENIC is not set
511# CONFIG_DL2K is not set
512# CONFIG_E1000 is not set
513# CONFIG_NS83820 is not set
514# CONFIG_HAMACHI is not set
515# CONFIG_YELLOWFIN is not set
516# CONFIG_R8169 is not set
517# CONFIG_SIS190 is not set
518# CONFIG_SKGE is not set
519# CONFIG_SKY2 is not set
520# CONFIG_SK98LIN is not set
521# CONFIG_TIGON3 is not set
522# CONFIG_BNX2 is not set
523# CONFIG_MV643XX_ETH is not set
524CONFIG_QLA3XXX=y
525# CONFIG_ATL1 is not set
526
527#
528# Ethernet (10000 Mbit)
529#
530# CONFIG_CHELSIO_T1 is not set
531CONFIG_CHELSIO_T3=y
532# CONFIG_IXGB is not set
533# CONFIG_S2IO is not set
534# CONFIG_MYRI10GE is not set
535CONFIG_NETXEN_NIC=y
536
537#
538# Token Ring devices
539#
540# CONFIG_TR is not set
541
542#
543# Wireless LAN (non-hamradio)
544#
545# CONFIG_NET_RADIO is not set
546
547#
548# Wan interfaces
549#
550# CONFIG_WAN is not set
551# CONFIG_FDDI is not set
552# CONFIG_HIPPI is not set
553# CONFIG_PPP is not set
554# CONFIG_SLIP is not set
555# CONFIG_SHAPER is not set
556# CONFIG_NETCONSOLE is not set
557# CONFIG_NETPOLL is not set
558# CONFIG_NET_POLL_CONTROLLER is not set
559
560#
561# ISDN subsystem
562#
563# CONFIG_ISDN is not set
564
565#
566# Telephony Support
567#
568# CONFIG_PHONE is not set
569
570#
571# Input device support
572#
573CONFIG_INPUT=y
574# CONFIG_INPUT_FF_MEMLESS is not set
575
576#
577# Userland interfaces
578#
579CONFIG_INPUT_MOUSEDEV=y
580CONFIG_INPUT_MOUSEDEV_PSAUX=y
581CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
582CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
583# CONFIG_INPUT_JOYDEV is not set
584# CONFIG_INPUT_TSDEV is not set
585# CONFIG_INPUT_EVDEV is not set
586# CONFIG_INPUT_EVBUG is not set
587
588#
589# Input Device Drivers
590#
591# CONFIG_INPUT_KEYBOARD is not set
592# CONFIG_INPUT_MOUSE is not set
593# CONFIG_INPUT_JOYSTICK is not set
594# CONFIG_INPUT_TOUCHSCREEN is not set
595# CONFIG_INPUT_MISC is not set
596
597#
598# Hardware I/O ports
599#
600CONFIG_SERIO=y
601# CONFIG_SERIO_I8042 is not set
602CONFIG_SERIO_SERPORT=y
603# CONFIG_SERIO_PCIPS2 is not set
604# CONFIG_SERIO_LIBPS2 is not set
605CONFIG_SERIO_RAW=y
606# CONFIG_GAMEPORT is not set
607
608#
609# Character devices
610#
611CONFIG_VT=y
612CONFIG_VT_CONSOLE=y
613CONFIG_HW_CONSOLE=y
614CONFIG_VT_HW_CONSOLE_BINDING=y
615# CONFIG_SERIAL_NONSTANDARD is not set
616
617#
618# Serial drivers
619#
620CONFIG_SERIAL_8250=y
621CONFIG_SERIAL_8250_CONSOLE=y
622CONFIG_SERIAL_8250_PCI=y
623CONFIG_SERIAL_8250_NR_UARTS=4
624CONFIG_SERIAL_8250_RUNTIME_UARTS=4
625# CONFIG_SERIAL_8250_EXTENDED is not set
626
627#
628# Non-8250 serial port support
629#
630CONFIG_SERIAL_CORE=y
631CONFIG_SERIAL_CORE_CONSOLE=y
632# CONFIG_SERIAL_JSM is not set
633CONFIG_UNIX98_PTYS=y
634CONFIG_LEGACY_PTYS=y
635CONFIG_LEGACY_PTY_COUNT=256
636
637#
638# IPMI
639#
640# CONFIG_IPMI_HANDLER is not set
641
642#
643# Watchdog Cards
644#
645# CONFIG_WATCHDOG is not set
646# CONFIG_HW_RANDOM is not set
647# CONFIG_RTC is not set
648# CONFIG_GEN_RTC is not set
649# CONFIG_DTLK is not set
650# CONFIG_R3964 is not set
651# CONFIG_APPLICOM is not set
652# CONFIG_DRM is not set
653# CONFIG_RAW_DRIVER is not set
654
655#
656# TPM devices
657#
658# CONFIG_TCG_TPM is not set
659
660#
661# I2C support
662#
663# CONFIG_I2C is not set
664
665#
666# SPI support
667#
668# CONFIG_SPI is not set
669# CONFIG_SPI_MASTER is not set
670
671#
672# Dallas's 1-wire bus
673#
674# CONFIG_W1 is not set
675
676#
677# Hardware Monitoring support
678#
679# CONFIG_HWMON is not set
680# CONFIG_HWMON_VID is not set
681
682#
683# Multimedia devices
684#
685# CONFIG_VIDEO_DEV is not set
686
687#
688# Digital Video Broadcasting Devices
689#
690# CONFIG_DVB is not set
691
692#
693# Graphics support
694#
695# CONFIG_FIRMWARE_EDID is not set
696# CONFIG_FB is not set
697
698#
699# Console display driver support
700#
701# CONFIG_VGA_CONSOLE is not set
702CONFIG_DUMMY_CONSOLE=y
703# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
704
705#
706# Sound
707#
708# CONFIG_SOUND is not set
709
710#
711# HID Devices
712#
713# CONFIG_HID is not set
714
715#
716# USB support
717#
718CONFIG_USB_ARCH_HAS_HCD=y
719CONFIG_USB_ARCH_HAS_OHCI=y
720CONFIG_USB_ARCH_HAS_EHCI=y
721# CONFIG_USB is not set
722
723#
724# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
725#
726
727#
728# USB Gadget Support
729#
730# CONFIG_USB_GADGET is not set
731
732#
733# MMC/SD Card support
734#
735# CONFIG_MMC is not set
736
737#
738# LED devices
739#
740# CONFIG_NEW_LEDS is not set
741
742#
743# LED drivers
744#
745
746#
747# LED Triggers
748#
749
750#
751# InfiniBand support
752#
753# CONFIG_INFINIBAND is not set
754
755#
756# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
757#
758
759#
760# Real Time Clock
761#
762# CONFIG_RTC_CLASS is not set
763
764#
765# DMA Engine support
766#
767# CONFIG_DMA_ENGINE is not set
768
769#
770# DMA Clients
771#
772
773#
774# DMA Devices
775#
776
777#
778# Auxiliary Display support
779#
780
781#
782# Virtualization
783#
784
785#
786# File systems
787#
788CONFIG_EXT2_FS=y
789# CONFIG_EXT2_FS_XATTR is not set
790# CONFIG_EXT2_FS_XIP is not set
791# CONFIG_EXT3_FS is not set
792# CONFIG_EXT4DEV_FS is not set
793# CONFIG_REISERFS_FS is not set
794# CONFIG_JFS_FS is not set
795CONFIG_FS_POSIX_ACL=y
796# CONFIG_XFS_FS is not set
797# CONFIG_GFS2_FS is not set
798# CONFIG_OCFS2_FS is not set
799# CONFIG_MINIX_FS is not set
800# CONFIG_ROMFS_FS is not set
801CONFIG_INOTIFY=y
802CONFIG_INOTIFY_USER=y
803# CONFIG_QUOTA is not set
804CONFIG_DNOTIFY=y
805# CONFIG_AUTOFS_FS is not set
806# CONFIG_AUTOFS4_FS is not set
807CONFIG_FUSE_FS=y
808CONFIG_GENERIC_ACL=y
809
810#
811# CD-ROM/DVD Filesystems
812#
813# CONFIG_ISO9660_FS is not set
814# CONFIG_UDF_FS is not set
815
816#
817# DOS/FAT/NT Filesystems
818#
819# CONFIG_MSDOS_FS is not set
820# CONFIG_VFAT_FS is not set
821# CONFIG_NTFS_FS is not set
822
823#
824# Pseudo filesystems
825#
826CONFIG_PROC_FS=y
827CONFIG_PROC_KCORE=y
828CONFIG_PROC_SYSCTL=y
829CONFIG_SYSFS=y
830CONFIG_TMPFS=y
831CONFIG_TMPFS_POSIX_ACL=y
832# CONFIG_HUGETLB_PAGE is not set
833CONFIG_RAMFS=y
834CONFIG_CONFIGFS_FS=y
835
836#
837# Miscellaneous filesystems
838#
839# CONFIG_ADFS_FS is not set
840# CONFIG_AFFS_FS is not set
841# CONFIG_ECRYPT_FS is not set
842# CONFIG_HFS_FS is not set
843# CONFIG_HFSPLUS_FS is not set
844# CONFIG_BEFS_FS is not set
845# CONFIG_BFS_FS is not set
846# CONFIG_EFS_FS is not set
847# CONFIG_CRAMFS is not set
848# CONFIG_VXFS_FS is not set
849# CONFIG_HPFS_FS is not set
850# CONFIG_QNX4FS_FS is not set
851# CONFIG_SYSV_FS is not set
852# CONFIG_UFS_FS is not set
853
854#
855# Network File Systems
856#
857CONFIG_NFS_FS=y
858# CONFIG_NFS_V3 is not set
859# CONFIG_NFS_V4 is not set
860# CONFIG_NFS_DIRECTIO is not set
861CONFIG_NFSD=y
862# CONFIG_NFSD_V3 is not set
863# CONFIG_NFSD_TCP is not set
864CONFIG_ROOT_NFS=y
865CONFIG_LOCKD=y
866CONFIG_EXPORTFS=y
867CONFIG_NFS_COMMON=y
868CONFIG_SUNRPC=y
869# CONFIG_RPCSEC_GSS_KRB5 is not set
870# CONFIG_RPCSEC_GSS_SPKM3 is not set
871# CONFIG_SMB_FS is not set
872# CONFIG_CIFS is not set
873# CONFIG_NCP_FS is not set
874# CONFIG_CODA_FS is not set
875# CONFIG_AFS_FS is not set
876# CONFIG_9P_FS is not set
877
878#
879# Partition Types
880#
881# CONFIG_PARTITION_ADVANCED is not set
882CONFIG_MSDOS_PARTITION=y
883
884#
885# Native Language Support
886#
887# CONFIG_NLS is not set
888
889#
890# Distributed Lock Manager
891#
892CONFIG_DLM=y
893CONFIG_DLM_TCP=y
894# CONFIG_DLM_SCTP is not set
895# CONFIG_DLM_DEBUG is not set
896
897#
898# Profiling support
899#
900# CONFIG_PROFILING is not set
901
902#
903# Kernel hacking
904#
905CONFIG_TRACE_IRQFLAGS_SUPPORT=y
906# CONFIG_PRINTK_TIME is not set
907CONFIG_ENABLE_MUST_CHECK=y
908# CONFIG_MAGIC_SYSRQ is not set
909# CONFIG_UNUSED_SYMBOLS is not set
910# CONFIG_DEBUG_FS is not set
911# CONFIG_HEADERS_CHECK is not set
912# CONFIG_DEBUG_KERNEL is not set
913CONFIG_LOG_BUF_SHIFT=14
914CONFIG_CROSSCOMPILE=y
915CONFIG_CMDLINE=""
916
917#
918# Security options
919#
920CONFIG_KEYS=y
921CONFIG_KEYS_DEBUG_PROC_KEYS=y
922# CONFIG_SECURITY is not set
923
924#
925# Cryptographic options
926#
927CONFIG_CRYPTO=y
928CONFIG_CRYPTO_ALGAPI=y
929CONFIG_CRYPTO_BLKCIPHER=y
930CONFIG_CRYPTO_HASH=y
931CONFIG_CRYPTO_MANAGER=y
932CONFIG_CRYPTO_HMAC=y
933CONFIG_CRYPTO_XCBC=y
934CONFIG_CRYPTO_NULL=y
935CONFIG_CRYPTO_MD4=y
936CONFIG_CRYPTO_MD5=y
937CONFIG_CRYPTO_SHA1=y
938CONFIG_CRYPTO_SHA256=y
939CONFIG_CRYPTO_SHA512=y
940CONFIG_CRYPTO_WP512=y
941CONFIG_CRYPTO_TGR192=y
942CONFIG_CRYPTO_GF128MUL=y
943CONFIG_CRYPTO_ECB=y
944CONFIG_CRYPTO_CBC=y
945CONFIG_CRYPTO_PCBC=y
946CONFIG_CRYPTO_LRW=y
947CONFIG_CRYPTO_DES=y
948CONFIG_CRYPTO_FCRYPT=y
949CONFIG_CRYPTO_BLOWFISH=y
950CONFIG_CRYPTO_TWOFISH=y
951CONFIG_CRYPTO_TWOFISH_COMMON=y
952CONFIG_CRYPTO_SERPENT=y
953CONFIG_CRYPTO_AES=y
954CONFIG_CRYPTO_CAST5=y
955CONFIG_CRYPTO_CAST6=y
956CONFIG_CRYPTO_TEA=y
957CONFIG_CRYPTO_ARC4=y
958CONFIG_CRYPTO_KHAZAD=y
959CONFIG_CRYPTO_ANUBIS=y
960CONFIG_CRYPTO_DEFLATE=y
961CONFIG_CRYPTO_MICHAEL_MIC=y
962CONFIG_CRYPTO_CRC32C=y
963CONFIG_CRYPTO_CAMELLIA=y
964
965#
966# Hardware crypto devices
967#
968
969#
970# Library routines
971#
972CONFIG_BITREVERSE=y
973# CONFIG_CRC_CCITT is not set
974CONFIG_CRC16=y
975CONFIG_CRC32=y
976CONFIG_LIBCRC32C=y
977CONFIG_ZLIB_INFLATE=y
978CONFIG_ZLIB_DEFLATE=y
979CONFIG_PLIST=y
980CONFIG_HAS_IOMEM=y
981CONFIG_HAS_IOPORT=y
diff --git a/arch/mips/configs/ocelot_defconfig b/arch/mips/configs/ocelot_defconfig
index f5948e56b848..5f3b47fa3f19 100644
--- a/arch/mips/configs/ocelot_defconfig
+++ b/arch/mips/configs/ocelot_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36CONFIG_MOMENCO_OCELOT=y 36CONFIG_MOMENCO_OCELOT=y
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig
index e764285aac62..b57662a2a3e3 100644
--- a/arch/mips/configs/pb1100_defconfig
+++ b/arch/mips/configs/pb1100_defconfig
@@ -36,7 +36,6 @@ CONFIG_MIPS_PB1100=y
36# CONFIG_MOMENCO_JAGUAR_ATX is not set 36# CONFIG_MOMENCO_JAGUAR_ATX is not set
37# CONFIG_MOMENCO_OCELOT is not set 37# CONFIG_MOMENCO_OCELOT is not set
38# CONFIG_MOMENCO_OCELOT_3 is not set 38# CONFIG_MOMENCO_OCELOT_3 is not set
39# CONFIG_MOMENCO_OCELOT_C is not set
40# CONFIG_MOMENCO_OCELOT_G is not set 39# CONFIG_MOMENCO_OCELOT_G is not set
41# CONFIG_MIPS_XXS1500 is not set 40# CONFIG_MIPS_XXS1500 is not set
42# CONFIG_PNX8550_JBS is not set 41# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig
index 37e2a102f6e2..350f9bdbb5e2 100644
--- a/arch/mips/configs/pb1500_defconfig
+++ b/arch/mips/configs/pb1500_defconfig
@@ -36,7 +36,6 @@ CONFIG_MIPS_PB1500=y
36# CONFIG_MOMENCO_JAGUAR_ATX is not set 36# CONFIG_MOMENCO_JAGUAR_ATX is not set
37# CONFIG_MOMENCO_OCELOT is not set 37# CONFIG_MOMENCO_OCELOT is not set
38# CONFIG_MOMENCO_OCELOT_3 is not set 38# CONFIG_MOMENCO_OCELOT_3 is not set
39# CONFIG_MOMENCO_OCELOT_C is not set
40# CONFIG_MOMENCO_OCELOT_G is not set 39# CONFIG_MOMENCO_OCELOT_G is not set
41# CONFIG_MIPS_XXS1500 is not set 40# CONFIG_MIPS_XXS1500 is not set
42# CONFIG_PNX8550_JBS is not set 41# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig
index b1206a20e7e0..8ea039ab0895 100644
--- a/arch/mips/configs/pb1550_defconfig
+++ b/arch/mips/configs/pb1550_defconfig
@@ -36,7 +36,6 @@ CONFIG_MIPS_PB1550=y
36# CONFIG_MOMENCO_JAGUAR_ATX is not set 36# CONFIG_MOMENCO_JAGUAR_ATX is not set
37# CONFIG_MOMENCO_OCELOT is not set 37# CONFIG_MOMENCO_OCELOT is not set
38# CONFIG_MOMENCO_OCELOT_3 is not set 38# CONFIG_MOMENCO_OCELOT_3 is not set
39# CONFIG_MOMENCO_OCELOT_C is not set
40# CONFIG_MOMENCO_OCELOT_G is not set 39# CONFIG_MOMENCO_OCELOT_G is not set
41# CONFIG_MIPS_XXS1500 is not set 40# CONFIG_MIPS_XXS1500 is not set
42# CONFIG_PNX8550_JBS is not set 41# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/pnx8550-jbs_defconfig b/arch/mips/configs/pnx8550-jbs_defconfig
index e7096449ba26..9c8c54ee5e9d 100644
--- a/arch/mips/configs/pnx8550-jbs_defconfig
+++ b/arch/mips/configs/pnx8550-jbs_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41CONFIG_PNX8550_JBS=y 40CONFIG_PNX8550_JBS=y
diff --git a/arch/mips/configs/pnx8550-stb810_defconfig b/arch/mips/configs/pnx8550-stb810_defconfig
index a46761f56a12..2f60c5a4286b 100644
--- a/arch/mips/configs/pnx8550-stb810_defconfig
+++ b/arch/mips/configs/pnx8550-stb810_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/qemu_defconfig b/arch/mips/configs/qemu_defconfig
index 93f382b32179..d7ace0857383 100644
--- a/arch/mips/configs/qemu_defconfig
+++ b/arch/mips/configs/qemu_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/rbhma4200_defconfig b/arch/mips/configs/rbhma4200_defconfig
index dbb485d499a5..b020e9270147 100644
--- a/arch/mips/configs/rbhma4200_defconfig
+++ b/arch/mips/configs/rbhma4200_defconfig
@@ -33,7 +33,6 @@ CONFIG_MIPS=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_OCELOT is not set 34# CONFIG_MOMENCO_OCELOT is not set
35# CONFIG_MOMENCO_OCELOT_3 is not set 35# CONFIG_MOMENCO_OCELOT_3 is not set
36# CONFIG_MOMENCO_OCELOT_C is not set
37# CONFIG_MIPS_XXS1500 is not set 36# CONFIG_MIPS_XXS1500 is not set
38# CONFIG_PNX8550_JBS is not set 37# CONFIG_PNX8550_JBS is not set
39# CONFIG_PNX8550_STB810 is not set 38# CONFIG_PNX8550_STB810 is not set
diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig
index c7c28a1616b2..b0abd16fae29 100644
--- a/arch/mips/configs/rbhma4500_defconfig
+++ b/arch/mips/configs/rbhma4500_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig
index f3ee7e179f24..120dcff4942e 100644
--- a/arch/mips/configs/rm200_defconfig
+++ b/arch/mips/configs/rm200_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig
index 11f034764812..534de60fd03c 100644
--- a/arch/mips/configs/sb1250-swarm_defconfig
+++ b/arch/mips/configs/sb1250-swarm_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/sead_defconfig b/arch/mips/configs/sead_defconfig
index 0d055b2d1510..e0185ebdfa8f 100644
--- a/arch/mips/configs/sead_defconfig
+++ b/arch/mips/configs/sead_defconfig
@@ -35,7 +35,6 @@ CONFIG_MIPS_SEAD=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/tb0219_defconfig b/arch/mips/configs/tb0219_defconfig
index a0cda222254f..11f4c66ea456 100644
--- a/arch/mips/configs/tb0219_defconfig
+++ b/arch/mips/configs/tb0219_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig
index 9b0a1d59eddd..1c54d1bbba7d 100644
--- a/arch/mips/configs/tb0226_defconfig
+++ b/arch/mips/configs/tb0226_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/tb0287_defconfig b/arch/mips/configs/tb0287_defconfig
index f8f11dcbb8de..7f2ece3d857c 100644
--- a/arch/mips/configs/tb0287_defconfig
+++ b/arch/mips/configs/tb0287_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig
index 8558348cad3b..ef663304c93d 100644
--- a/arch/mips/configs/workpad_defconfig
+++ b/arch/mips/configs/workpad_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/wrppmc_defconfig b/arch/mips/configs/wrppmc_defconfig
index 01b05b2a497a..d57d6cca646c 100644
--- a/arch/mips/configs/wrppmc_defconfig
+++ b/arch/mips/configs/wrppmc_defconfig
@@ -35,7 +35,6 @@ CONFIG_WR_PPMC=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig
index 3d40e7c1277b..38349216668f 100644
--- a/arch/mips/configs/yosemite_defconfig
+++ b/arch/mips/configs/yosemite_defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/defconfig b/arch/mips/defconfig
index 195311dfeae6..9515ed6128ca 100644
--- a/arch/mips/defconfig
+++ b/arch/mips/defconfig
@@ -35,7 +35,6 @@ CONFIG_ZONE_DMA=y
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set 37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_C is not set
39# CONFIG_MOMENCO_OCELOT_G is not set 38# CONFIG_MOMENCO_OCELOT_G is not set
40# CONFIG_MIPS_XXS1500 is not set 39# CONFIG_MIPS_XXS1500 is not set
41# CONFIG_PNX8550_JBS is not set 40# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/momentum/ocelot_c/Makefile b/arch/mips/momentum/ocelot_c/Makefile
deleted file mode 100644
index d69161aa1675..000000000000
--- a/arch/mips/momentum/ocelot_c/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for Momentum Computer's Ocelot-C and -CS boards.
3#
4
5obj-y += cpci-irq.o irq.o platform.o prom.o reset.o \
6 setup.o uart-irq.o
7
8obj-$(CONFIG_KGDB) += dbg_io.o
diff --git a/arch/mips/momentum/ocelot_c/cpci-irq.c b/arch/mips/momentum/ocelot_c/cpci-irq.c
deleted file mode 100644
index 186a140fd2a9..000000000000
--- a/arch/mips/momentum/ocelot_c/cpci-irq.c
+++ /dev/null
@@ -1,100 +0,0 @@
1/*
2 * Copyright 2002 Momentum Computer
3 * Author: mdharm@momenco.com
4 *
5 * arch/mips/momentum/ocelot_c/cpci-irq.c
6 * Interrupt routines for cpci. Interrupt numbers are assigned from
7 * CPCI_IRQ_BASE to CPCI_IRQ_BASE+8 (8 interrupt sources).
8 *
9 * Note that the high-level software will need to be careful about using
10 * these interrupts. If this board is asserting a cPCI interrupt, it will
11 * also see the asserted interrupt. Care must be taken to avoid an
12 * interrupt flood.
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
18 */
19
20#include <linux/module.h>
21#include <linux/interrupt.h>
22#include <linux/irq.h>
23#include <linux/kernel.h>
24#include <linux/sched.h>
25#include <linux/kernel_stat.h>
26#include <asm/io.h>
27#include "ocelot_c_fpga.h"
28
29#define CPCI_IRQ_BASE 8
30
31static inline int ls1bit8(unsigned int x)
32{
33 int b = 7, s;
34
35 s = 4; if (((unsigned char)(x << 4)) == 0) s = 0; b -= s; x <<= s;
36 s = 2; if (((unsigned char)(x << 2)) == 0) s = 0; b -= s; x <<= s;
37 s = 1; if (((unsigned char)(x << 1)) == 0) s = 0; b -= s;
38
39 return b;
40}
41
42/* mask off an interrupt -- 0 is enable, 1 is disable */
43static inline void mask_cpci_irq(unsigned int irq)
44{
45 uint32_t value;
46
47 value = OCELOT_FPGA_READ(INTMASK);
48 value |= 1 << (irq - CPCI_IRQ_BASE);
49 OCELOT_FPGA_WRITE(value, INTMASK);
50
51 /* read the value back to assure that it's really been written */
52 value = OCELOT_FPGA_READ(INTMASK);
53}
54
55/* unmask an interrupt -- 0 is enable, 1 is disable */
56static inline void unmask_cpci_irq(unsigned int irq)
57{
58 uint32_t value;
59
60 value = OCELOT_FPGA_READ(INTMASK);
61 value &= ~(1 << (irq - CPCI_IRQ_BASE));
62 OCELOT_FPGA_WRITE(value, INTMASK);
63
64 /* read the value back to assure that it's really been written */
65 value = OCELOT_FPGA_READ(INTMASK);
66}
67
68/*
69 * Interrupt handler for interrupts coming from the FPGA chip.
70 * It could be built in ethernet ports etc...
71 */
72void ll_cpci_irq(void)
73{
74 unsigned int irq_src, irq_mask;
75
76 /* read the interrupt status registers */
77 irq_src = OCELOT_FPGA_READ(INTSTAT);
78 irq_mask = OCELOT_FPGA_READ(INTMASK);
79
80 /* mask for just the interrupts we want */
81 irq_src &= ~irq_mask;
82
83 do_IRQ(ls1bit8(irq_src) + CPCI_IRQ_BASE);
84}
85
86struct irq_chip cpci_irq_type = {
87 .name = "CPCI/FPGA",
88 .ack = mask_cpci_irq,
89 .mask = mask_cpci_irq,
90 .mask_ack = mask_cpci_irq,
91 .unmask = unmask_cpci_irq,
92};
93
94void cpci_irq_init(void)
95{
96 int i;
97
98 for (i = CPCI_IRQ_BASE; i < (CPCI_IRQ_BASE + 8); i++)
99 set_irq_chip_and_handler(i, &cpci_irq_type, handle_level_irq);
100}
diff --git a/arch/mips/momentum/ocelot_c/dbg_io.c b/arch/mips/momentum/ocelot_c/dbg_io.c
deleted file mode 100644
index 32d6fb4ee679..000000000000
--- a/arch/mips/momentum/ocelot_c/dbg_io.c
+++ /dev/null
@@ -1,121 +0,0 @@
1
2#include <asm/serial.h> /* For the serial port location and base baud */
3
4/* --- CONFIG --- */
5
6typedef unsigned char uint8;
7typedef unsigned int uint32;
8
9/* --- END OF CONFIG --- */
10
11#define UART16550_BAUD_2400 2400
12#define UART16550_BAUD_4800 4800
13#define UART16550_BAUD_9600 9600
14#define UART16550_BAUD_19200 19200
15#define UART16550_BAUD_38400 38400
16#define UART16550_BAUD_57600 57600
17#define UART16550_BAUD_115200 115200
18
19#define UART16550_PARITY_NONE 0
20#define UART16550_PARITY_ODD 0x08
21#define UART16550_PARITY_EVEN 0x18
22#define UART16550_PARITY_MARK 0x28
23#define UART16550_PARITY_SPACE 0x38
24
25#define UART16550_DATA_5BIT 0x0
26#define UART16550_DATA_6BIT 0x1
27#define UART16550_DATA_7BIT 0x2
28#define UART16550_DATA_8BIT 0x3
29
30#define UART16550_STOP_1BIT 0x0
31#define UART16550_STOP_2BIT 0x4
32
33/* ----------------------------------------------------- */
34
35/* === CONFIG === */
36
37/* [jsun] we use the second serial port for kdb */
38#define BASE OCELOT_SERIAL1_BASE
39#define MAX_BAUD OCELOT_BASE_BAUD
40
41/* === END OF CONFIG === */
42
43#define REG_OFFSET 4
44
45/* register offset */
46#define OFS_RCV_BUFFER 0
47#define OFS_TRANS_HOLD 0
48#define OFS_SEND_BUFFER 0
49#define OFS_INTR_ENABLE (1*REG_OFFSET)
50#define OFS_INTR_ID (2*REG_OFFSET)
51#define OFS_DATA_FORMAT (3*REG_OFFSET)
52#define OFS_LINE_CONTROL (3*REG_OFFSET)
53#define OFS_MODEM_CONTROL (4*REG_OFFSET)
54#define OFS_RS232_OUTPUT (4*REG_OFFSET)
55#define OFS_LINE_STATUS (5*REG_OFFSET)
56#define OFS_MODEM_STATUS (6*REG_OFFSET)
57#define OFS_RS232_INPUT (6*REG_OFFSET)
58#define OFS_SCRATCH_PAD (7*REG_OFFSET)
59
60#define OFS_DIVISOR_LSB (0*REG_OFFSET)
61#define OFS_DIVISOR_MSB (1*REG_OFFSET)
62
63
64/* memory-mapped read/write of the port */
65#define UART16550_READ(y) (*((volatile uint8*)(BASE + y)))
66#define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z)
67
68void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
69{
70 /* disable interrupts */
71 UART16550_WRITE(OFS_INTR_ENABLE, 0);
72
73 /* set up baud rate */
74 {
75 uint32 divisor;
76
77 /* set DIAB bit */
78 UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
79
80 /* set divisor */
81 divisor = MAX_BAUD / baud;
82 UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
83 UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
84
85 /* clear DIAB bit */
86 UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
87 }
88
89 /* set data format */
90 UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
91}
92
93static int remoteDebugInitialized = 0;
94
95uint8 getDebugChar(void)
96{
97 if (!remoteDebugInitialized) {
98 remoteDebugInitialized = 1;
99 debugInit(UART16550_BAUD_38400,
100 UART16550_DATA_8BIT,
101 UART16550_PARITY_NONE, UART16550_STOP_1BIT);
102 }
103
104 while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0);
105 return UART16550_READ(OFS_RCV_BUFFER);
106}
107
108
109int putDebugChar(uint8 byte)
110{
111 if (!remoteDebugInitialized) {
112 remoteDebugInitialized = 1;
113 debugInit(UART16550_BAUD_38400,
114 UART16550_DATA_8BIT,
115 UART16550_PARITY_NONE, UART16550_STOP_1BIT);
116 }
117
118 while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0);
119 UART16550_WRITE(OFS_SEND_BUFFER, byte);
120 return 1;
121}
diff --git a/arch/mips/momentum/ocelot_c/irq.c b/arch/mips/momentum/ocelot_c/irq.c
deleted file mode 100644
index 844d566c9de3..000000000000
--- a/arch/mips/momentum/ocelot_c/irq.c
+++ /dev/null
@@ -1,107 +0,0 @@
1/*
2 * Copyright (C) 2000 RidgeRun, Inc.
3 * Author: RidgeRun, Inc.
4 * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
5 *
6 * Copyright 2001 MontaVista Software Inc.
7 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
8 * Copyright (C) 2000, 01, 05 Ralf Baechle (ralf@linux-mips.org)
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 *
30 */
31#include <linux/errno.h>
32#include <linux/init.h>
33#include <linux/kernel_stat.h>
34#include <linux/module.h>
35#include <linux/signal.h>
36#include <linux/sched.h>
37#include <linux/types.h>
38#include <linux/interrupt.h>
39#include <linux/ioport.h>
40#include <linux/timex.h>
41#include <linux/slab.h>
42#include <linux/random.h>
43#include <linux/bitops.h>
44#include <linux/mv643xx.h>
45#include <asm/bootinfo.h>
46#include <asm/io.h>
47#include <asm/irq_cpu.h>
48#include <asm/mipsregs.h>
49#include <asm/system.h>
50
51extern void uart_irq_init(void);
52extern void cpci_irq_init(void);
53
54static struct irqaction cascade_fpga = {
55 no_action, IRQF_DISABLED, CPU_MASK_NONE, "cascade via FPGA", NULL, NULL
56};
57
58static struct irqaction cascade_mv64340 = {
59 no_action, IRQF_DISABLED, CPU_MASK_NONE, "cascade via MV64340", NULL, NULL
60};
61
62extern void ll_uart_irq(void);
63extern void ll_cpci_irq(void);
64
65asmlinkage void plat_irq_dispatch(void)
66{
67 unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
68
69 if (pending & STATUSF_IP0)
70 do_IRQ(0);
71 else if (pending & STATUSF_IP1)
72 do_IRQ(1);
73 else if (pending & STATUSF_IP2)
74 do_IRQ(2);
75 else if (pending & STATUSF_IP3)
76 ll_uart_irq();
77 else if (pending & STATUSF_IP4)
78 do_IRQ(4);
79 else if (pending & STATUSF_IP5)
80 ll_cpci_irq();
81 else if (pending & STATUSF_IP6)
82 ll_mv64340_irq();
83 else if (pending & STATUSF_IP7)
84 do_IRQ(7);
85 else
86 spurious_interrupt();
87}
88
89void __init arch_init_irq(void)
90{
91 /*
92 * Clear all of the interrupts while we change the able around a bit.
93 * int-handler is not on bootstrap
94 */
95 clear_c0_status(ST0_IM);
96
97 mips_cpu_irq_init();
98
99 /* set up the cascading interrupts */
100 setup_irq(3, &cascade_fpga);
101 setup_irq(5, &cascade_fpga);
102 setup_irq(6, &cascade_mv64340);
103
104 mv64340_irq_init(16);
105 uart_irq_init();
106 cpci_irq_init();
107}
diff --git a/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h b/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
deleted file mode 100644
index f0f5581dcb50..000000000000
--- a/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
+++ /dev/null
@@ -1,61 +0,0 @@
1/*
2 * Ocelot-C Board Register Definitions
3 *
4 * (C) 2002 Momentum Computer Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 * Louis Hamilton, Red Hat, Inc.
27 * hamilton@redhat.com [MIPS64 modifications]
28 */
29
30#ifndef __OCELOT_C_FPGA_H__
31#define __OCELOT_C_FPGA_H__
32
33
34#ifdef CONFIG_64BIT
35#define OCELOT_C_CS0_ADDR (0xfffffffffc000000)
36#else
37#define OCELOT_C_CS0_ADDR (0xfc000000)
38#endif
39
40#define OCELOT_C_REG_BOARDREV 0x0
41#define OCELOT_C_REG_FPGA_REV 0x1
42#define OCELOT_C_REG_FPGA_TYPE 0x2
43#define OCELOT_C_REG_RESET_STATUS 0x3
44#define OCELOT_C_REG_BOARD_STATUS 0x4
45#define OCELOT_C_REG_CPCI_ID 0x5
46#define OCELOT_C_REG_SET 0x6
47#define OCELOT_C_REG_CLR 0x7
48#define OCELOT_C_REG_EEPROM_MODE 0x9
49#define OCELOT_C_REG_INTMASK 0xa
50#define OCELOT_C_REG_INTSTAT 0xb
51#define OCELOT_C_REG_UART_INTMASK 0xc
52#define OCELOT_C_REG_UART_INTSTAT 0xd
53#define OCELOT_C_REG_INTSET 0xe
54#define OCELOT_C_REG_INTCLR 0xf
55
56#define __FPGA_REG_TO_ADDR(reg) \
57 ((void *) OCELOT_C_CS0_ADDR + OCELOT_C_REG_##reg)
58#define OCELOT_FPGA_WRITE(x, reg) writeb(x, __FPGA_REG_TO_ADDR(reg))
59#define OCELOT_FPGA_READ(reg) readb(__FPGA_REG_TO_ADDR(reg))
60
61#endif
diff --git a/arch/mips/momentum/ocelot_c/platform.c b/arch/mips/momentum/ocelot_c/platform.c
deleted file mode 100644
index 7780aa0c6555..000000000000
--- a/arch/mips/momentum/ocelot_c/platform.c
+++ /dev/null
@@ -1,183 +0,0 @@
1#include <linux/delay.h>
2#include <linux/if_ether.h>
3#include <linux/ioport.h>
4#include <linux/mv643xx.h>
5#include <linux/platform_device.h>
6
7#include "ocelot_c_fpga.h"
8
9#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
10
11static struct resource mv643xx_eth_shared_resources[] = {
12 [0] = {
13 .name = "ethernet shared base",
14 .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
15 .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
16 MV643XX_ETH_SHARED_REGS_SIZE - 1,
17 .flags = IORESOURCE_MEM,
18 },
19};
20
21static struct platform_device mv643xx_eth_shared_device = {
22 .name = MV643XX_ETH_SHARED_NAME,
23 .id = 0,
24 .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
25 .resource = mv643xx_eth_shared_resources,
26};
27
28#define MV_SRAM_BASE 0xfe000000UL
29#define MV_SRAM_SIZE (256 * 1024)
30
31#define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4)
32#define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4)
33
34#define MV_SRAM_BASE_ETH0 MV_SRAM_BASE
35#define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2))
36
37#define MV64x60_IRQ_ETH_0 48
38#define MV64x60_IRQ_ETH_1 49
39
40static struct resource mv64x60_eth0_resources[] = {
41 [0] = {
42 .name = "eth0 irq",
43 .start = MV64x60_IRQ_ETH_0,
44 .end = MV64x60_IRQ_ETH_0,
45 .flags = IORESOURCE_IRQ,
46 },
47};
48
49static struct mv643xx_eth_platform_data eth0_pd = {
50 .port_number = 0,
51
52 .tx_sram_addr = MV_SRAM_BASE_ETH0,
53 .tx_sram_size = MV_SRAM_TXRING_SIZE,
54 .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
55
56 .rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE,
57 .rx_sram_size = MV_SRAM_RXRING_SIZE,
58 .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
59};
60
61static struct platform_device eth0_device = {
62 .name = MV643XX_ETH_NAME,
63 .id = 0,
64 .num_resources = ARRAY_SIZE(mv64x60_eth0_resources),
65 .resource = mv64x60_eth0_resources,
66 .dev = {
67 .platform_data = &eth0_pd,
68 },
69};
70
71static struct resource mv64x60_eth1_resources[] = {
72 [0] = {
73 .name = "eth1 irq",
74 .start = MV64x60_IRQ_ETH_1,
75 .end = MV64x60_IRQ_ETH_1,
76 .flags = IORESOURCE_IRQ,
77 },
78};
79
80static struct mv643xx_eth_platform_data eth1_pd = {
81 .port_number = 1,
82
83 .tx_sram_addr = MV_SRAM_BASE_ETH1,
84 .tx_sram_size = MV_SRAM_TXRING_SIZE,
85 .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
86
87 .rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE,
88 .rx_sram_size = MV_SRAM_RXRING_SIZE,
89 .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
90};
91
92static struct platform_device eth1_device = {
93 .name = MV643XX_ETH_NAME,
94 .id = 1,
95 .num_resources = ARRAY_SIZE(mv64x60_eth1_resources),
96 .resource = mv64x60_eth1_resources,
97 .dev = {
98 .platform_data = &eth1_pd,
99 },
100};
101
102static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
103 &mv643xx_eth_shared_device,
104 &eth0_device,
105 &eth1_device,
106 /* The third port is not wired up on the Ocelot C */
107};
108
109static u8 __init exchange_bit(u8 val, u8 cs)
110{
111 /* place the data */
112 OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
113 udelay(1);
114
115 /* turn the clock on */
116 OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
117 udelay(1);
118
119 /* turn the clock off and read-strobe */
120 OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
121
122 /* return the data */
123 return (OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1;
124}
125
126static void __init get_mac(char dest[6])
127{
128 u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
129 int i,j;
130
131 for (i = 0; i < 12; i++)
132 exchange_bit(read_opcode[i], 1);
133
134 for (j = 0; j < 6; j++) {
135 dest[j] = 0;
136 for (i = 0; i < 8; i++) {
137 dest[j] <<= 1;
138 dest[j] |= exchange_bit(0, 1);
139 }
140 }
141
142 /* turn off CS */
143 exchange_bit(0,0);
144}
145
146/*
147 * Copy and increment ethernet MAC address by a small value.
148 *
149 * This is useful for systems where the only one MAC address is stored in
150 * non-volatile memory for multiple ports.
151 */
152static inline void eth_mac_add(unsigned char *dst, unsigned char *src,
153 unsigned int add)
154{
155 int i;
156
157 BUG_ON(add >= 256);
158
159 for (i = ETH_ALEN; i >= 0; i--) {
160 dst[i] = src[i] + add;
161 add = dst[i] < src[i]; /* compute carry */
162 }
163
164 WARN_ON(add);
165}
166
167static int __init mv643xx_eth_add_pds(void)
168{
169 unsigned char mac[ETH_ALEN];
170 int ret;
171
172 get_mac(mac);
173 eth_mac_add(eth0_pd.mac_addr, mac, 0);
174 eth_mac_add(eth1_pd.mac_addr, mac, 1);
175 ret = platform_add_devices(mv643xx_eth_pd_devs,
176 ARRAY_SIZE(mv643xx_eth_pd_devs));
177
178 return ret;
179}
180
181device_initcall(mv643xx_eth_add_pds);
182
183#endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */
diff --git a/arch/mips/momentum/ocelot_c/prom.c b/arch/mips/momentum/ocelot_c/prom.c
deleted file mode 100644
index b689ceea8cfb..000000000000
--- a/arch/mips/momentum/ocelot_c/prom.c
+++ /dev/null
@@ -1,183 +0,0 @@
1/*
2 * Copyright 2002 Momentum Computer Inc.
3 * Author: Matthew Dharm <mdharm@momenco.com>
4 *
5 * Louis Hamilton, Red Hat, Inc.
6 * hamilton@redhat.com [MIPS64 modifications]
7 *
8 * Based on Ocelot Linux port, which is
9 * Copyright 2001 MontaVista Software Inc.
10 * Author: jsun@mvista.com or jsun@junsun.net
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 */
17#include <linux/init.h>
18#include <linux/mm.h>
19#include <linux/sched.h>
20#include <linux/bootmem.h>
21#include <linux/mv643xx.h>
22
23#include <asm/addrspace.h>
24#include <asm/bootinfo.h>
25#include <asm/pmon.h>
26
27#include "ocelot_c_fpga.h"
28
29struct callvectors* debug_vectors;
30
31extern unsigned long marvell_base;
32extern unsigned int cpu_clock;
33
34const char *get_system_type(void)
35{
36#ifdef CONFIG_CPU_SR71000
37 return "Momentum Ocelot-CS";
38#else
39 return "Momentum Ocelot-C";
40#endif
41}
42
43#ifdef CONFIG_64BIT
44
45unsigned long signext(unsigned long addr)
46{
47 addr &= 0xffffffff;
48 return (unsigned long)((int)addr);
49}
50
51void *get_arg(unsigned long args, int arc)
52{
53 unsigned long ul;
54 unsigned char *puc, uc;
55
56 args += (arc * 4);
57 ul = (unsigned long)signext(args);
58 puc = (unsigned char *)ul;
59 if (puc == 0)
60 return (void *)0;
61
62#ifdef CONFIG_CPU_LITTLE_ENDIAN
63 uc = *puc++;
64 ul = (unsigned long)uc;
65 uc = *puc++;
66 ul |= (((unsigned long)uc) << 8);
67 uc = *puc++;
68 ul |= (((unsigned long)uc) << 16);
69 uc = *puc++;
70 ul |= (((unsigned long)uc) << 24);
71#else /* CONFIG_CPU_LITTLE_ENDIAN */
72 uc = *puc++;
73 ul = ((unsigned long)uc) << 24;
74 uc = *puc++;
75 ul |= (((unsigned long)uc) << 16);
76 uc = *puc++;
77 ul |= (((unsigned long)uc) << 8);
78 uc = *puc++;
79 ul |= ((unsigned long)uc);
80#endif /* CONFIG_CPU_LITTLE_ENDIAN */
81 ul = signext(ul);
82 return (void *)ul;
83}
84
85char *arg64(unsigned long addrin, int arg_index)
86{
87 unsigned long args;
88 char *p;
89 args = signext(addrin);
90 p = (char *)get_arg(args, arg_index);
91 return p;
92}
93#endif /* CONFIG_64BIT */
94
95
96void __init prom_init(void)
97{
98 int argc = fw_arg0;
99 char **arg = (char **) fw_arg1;
100 char **env = (char **) fw_arg2;
101 struct callvectors *cv = (struct callvectors *) fw_arg3;
102 int i;
103
104#ifdef CONFIG_64BIT
105 char *ptr;
106
107 printk("prom_init - MIPS64\n");
108 /* save the PROM vectors for debugging use */
109 debug_vectors = (struct callvectors *)signext((unsigned long)cv);
110
111 /* arg[0] is "g", the rest is boot parameters */
112 arcs_cmdline[0] = '\0';
113
114 for (i = 1; i < argc; i++) {
115 ptr = (char *)arg64((unsigned long)arg, i);
116 if ((strlen(arcs_cmdline) + strlen(ptr) + 1) >=
117 sizeof(arcs_cmdline))
118 break;
119 strcat(arcs_cmdline, ptr);
120 strcat(arcs_cmdline, " ");
121 }
122 i = 0;
123 while (1) {
124 ptr = (char *)arg64((unsigned long)env, i);
125 if (! ptr)
126 break;
127
128 if (strncmp("gtbase", ptr, strlen("gtbase")) == 0) {
129 marvell_base = simple_strtol(ptr + strlen("gtbase="),
130 NULL, 16);
131
132 if ((marvell_base & 0xffffffff00000000) == 0)
133 marvell_base |= 0xffffffff00000000;
134
135 printk("marvell_base set to 0x%016lx\n", marvell_base);
136 }
137 if (strncmp("cpuclock", ptr, strlen("cpuclock")) == 0) {
138 cpu_clock = simple_strtol(ptr + strlen("cpuclock="),
139 NULL, 10);
140 printk("cpu_clock set to %d\n", cpu_clock);
141 }
142 i++;
143 }
144 printk("arcs_cmdline: %s\n", arcs_cmdline);
145
146#else /* CONFIG_64BIT */
147 /* save the PROM vectors for debugging use */
148 debug_vectors = cv;
149
150 /* arg[0] is "g", the rest is boot parameters */
151 arcs_cmdline[0] = '\0';
152 for (i = 1; i < argc; i++) {
153 if (strlen(arcs_cmdline) + strlen(arg[i] + 1)
154 >= sizeof(arcs_cmdline))
155 break;
156 strcat(arcs_cmdline, arg[i]);
157 strcat(arcs_cmdline, " ");
158 }
159
160 while (*env) {
161 if (strncmp("gtbase", *env, strlen("gtbase")) == 0) {
162 marvell_base = simple_strtol(*env + strlen("gtbase="),
163 NULL, 16);
164 }
165 if (strncmp("cpuclock", *env, strlen("cpuclock")) == 0) {
166 cpu_clock = simple_strtol(*env + strlen("cpuclock="),
167 NULL, 10);
168 }
169 env++;
170 }
171#endif /* CONFIG_64BIT */
172
173 mips_machgroup = MACH_GROUP_MOMENCO;
174 mips_machtype = MACH_MOMENCO_OCELOT_C;
175
176#ifndef CONFIG_64BIT
177 debug_vectors->printf("Booting Linux kernel...\n");
178#endif
179}
180
181void __init prom_free_prom_memory(void)
182{
183}
diff --git a/arch/mips/momentum/ocelot_c/reset.c b/arch/mips/momentum/ocelot_c/reset.c
deleted file mode 100644
index 3fdcb64ff1e6..000000000000
--- a/arch/mips/momentum/ocelot_c/reset.c
+++ /dev/null
@@ -1,58 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License as published by the
4 * Free Software Foundation; either version 2 of the License, or (at your
5 * option) any later version.
6 *
7 * Copyright (C) 1997, 2001 Ralf Baechle
8 * Copyright 2001 MontaVista Software Inc.
9 * Author: jsun@mvista.com or jsun@junsun.net
10 *
11 * Copyright (C) 2002 Momentum Computer Inc.
12 * Author: Matthew Dharm <mdharm@momenco.com>
13 *
14 * Louis Hamilton, Red Hat, Inc.
15 * hamilton@redhat.com [MIPS64 modifications]
16 */
17#include <linux/sched.h>
18#include <linux/mm.h>
19#include <asm/io.h>
20#include <asm/pgtable.h>
21#include <asm/processor.h>
22#include <asm/reboot.h>
23#include <asm/system.h>
24#include <linux/delay.h>
25
26void momenco_ocelot_restart(char *command)
27{
28 /* base address of timekeeper portion of part */
29 void *nvram = (void *)
30#ifdef CONFIG_64BIT
31 0xfffffffffc807000;
32#else
33 0xfc807000;
34#endif
35
36 /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */
37 writeb(0x84, nvram + 0xff7);
38
39 /* wait for the watchdog to go off */
40 mdelay(100+(1000/16));
41
42 /* if the watchdog fails for some reason, let people know */
43 printk(KERN_NOTICE "Watchdog reset failed\n");
44}
45
46void momenco_ocelot_halt(void)
47{
48 printk(KERN_NOTICE "\n** You can safely turn off the power\n");
49 while (1)
50 __asm__(".set\tmips3\n\t"
51 "wait\n\t"
52 ".set\tmips0");
53}
54
55void momenco_ocelot_power_off(void)
56{
57 momenco_ocelot_halt();
58}
diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c
deleted file mode 100644
index 0b6b2338cfb4..000000000000
--- a/arch/mips/momentum/ocelot_c/setup.c
+++ /dev/null
@@ -1,362 +0,0 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * Momentum Computer Ocelot-C and -CS board dependent boot routines
4 *
5 * Copyright (C) 1996, 1997, 2001 Ralf Baechle
6 * Copyright (C) 2000 RidgeRun, Inc.
7 * Copyright (C) 2001 Red Hat, Inc.
8 * Copyright (C) 2002 Momentum Computer
9 *
10 * Author: Matthew Dharm, Momentum Computer
11 * mdharm@momenco.com
12 *
13 * Louis Hamilton, Red Hat, Inc.
14 * hamilton@redhat.com [MIPS64 modifications]
15 *
16 * Author: RidgeRun, Inc.
17 * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
18 *
19 * Copyright 2001 MontaVista Software Inc.
20 * Author: jsun@mvista.com or jsun@junsun.net
21 *
22 * This program is free software; you can redistribute it and/or modify it
23 * under the terms of the GNU General Public License as published by the
24 * Free Software Foundation; either version 2 of the License, or (at your
25 * option) any later version.
26 *
27 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
30 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
31 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
32 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
33 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
34 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
36 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 *
38 * You should have received a copy of the GNU General Public License along
39 * with this program; if not, write to the Free Software Foundation, Inc.,
40 * 675 Mass Ave, Cambridge, MA 02139, USA.
41 *
42 */
43#include <linux/bcd.h>
44#include <linux/init.h>
45#include <linux/kernel.h>
46#include <linux/types.h>
47#include <linux/mm.h>
48#include <linux/swap.h>
49#include <linux/ioport.h>
50#include <linux/sched.h>
51#include <linux/interrupt.h>
52#include <linux/pci.h>
53#include <linux/pm.h>
54#include <linux/timex.h>
55#include <linux/vmalloc.h>
56#include <linux/mv643xx.h>
57
58#include <asm/time.h>
59#include <asm/bootinfo.h>
60#include <asm/page.h>
61#include <asm/io.h>
62#include <asm/irq.h>
63#include <asm/pci.h>
64#include <asm/processor.h>
65#include <asm/reboot.h>
66#include <asm/marvell.h>
67#include <linux/bootmem.h>
68#include <linux/blkdev.h>
69#include "ocelot_c_fpga.h"
70
71unsigned long marvell_base;
72unsigned int cpu_clock;
73
74/* These functions are used for rebooting or halting the machine*/
75extern void momenco_ocelot_restart(char *command);
76extern void momenco_ocelot_halt(void);
77extern void momenco_ocelot_power_off(void);
78
79void momenco_time_init(void);
80
81static char reset_reason;
82
83void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, unsigned long entryhi, unsigned long pagemask);
84
85static unsigned long ENTRYLO(unsigned long paddr)
86{
87 return ((paddr & PAGE_MASK) |
88 (_PAGE_PRESENT | __READABLE | __WRITEABLE | _PAGE_GLOBAL |
89 _CACHE_UNCACHED)) >> 6;
90}
91
92/* setup code for a handoff from a version 2 PMON 2000 PROM */
93void PMON_v2_setup(void)
94{
95 /* Some wired TLB entries for the MV64340 and perhiperals. The
96 MV64340 is going to be hit on every IRQ anyway - there's
97 absolutely no point in letting it be a random TLB entry, as
98 it'll just cause needless churning of the TLB. And we use
99 the other half for the serial port, which is just a PITA
100 otherwise :)
101
102 Device Physical Virtual
103 MV64340 Internal Regs 0xf4000000 0xf4000000
104 Ocelot-C[S] PLD (CS0) 0xfc000000 0xfc000000
105 NVRAM (CS1) 0xfc800000 0xfc800000
106 UARTs (CS2) 0xfd000000 0xfd000000
107 Internal SRAM 0xfe000000 0xfe000000
108 M-Systems DOC (CS3) 0xff000000 0xff000000
109 */
110 printk("PMON_v2_setup\n");
111
112#ifdef CONFIG_64BIT
113 /* marvell and extra space */
114 add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), 0xfffffffff4000000, PM_64K);
115 /* fpga, rtc, and uart */
116 add_wired_entry(ENTRYLO(0xfc000000), ENTRYLO(0xfd000000), 0xfffffffffc000000, PM_16M);
117 /* m-sys and internal SRAM */
118 add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000), 0xfffffffffe000000, PM_16M);
119
120 marvell_base = 0xfffffffff4000000;
121#else
122 /* marvell and extra space */
123 add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), 0xf4000000, PM_64K);
124 /* fpga, rtc, and uart */
125 add_wired_entry(ENTRYLO(0xfc000000), ENTRYLO(0xfd000000), 0xfc000000, PM_16M);
126 /* m-sys and internal SRAM */
127 add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000), 0xfe000000, PM_16M);
128
129 marvell_base = 0xf4000000;
130#endif
131}
132
133unsigned long m48t37y_get_time(void)
134{
135#ifdef CONFIG_64BIT
136 unsigned char *rtc_base = (unsigned char*)0xfffffffffc800000;
137#else
138 unsigned char* rtc_base = (unsigned char*)0xfc800000;
139#endif
140 unsigned int year, month, day, hour, min, sec;
141 unsigned long flags;
142
143 spin_lock_irqsave(&rtc_lock, flags);
144 /* stop the update */
145 rtc_base[0x7ff8] = 0x40;
146
147 year = BCD2BIN(rtc_base[0x7fff]);
148 year += BCD2BIN(rtc_base[0x7ff1]) * 100;
149
150 month = BCD2BIN(rtc_base[0x7ffe]);
151
152 day = BCD2BIN(rtc_base[0x7ffd]);
153
154 hour = BCD2BIN(rtc_base[0x7ffb]);
155 min = BCD2BIN(rtc_base[0x7ffa]);
156 sec = BCD2BIN(rtc_base[0x7ff9]);
157
158 /* start the update */
159 rtc_base[0x7ff8] = 0x00;
160 spin_unlock_irqrestore(&rtc_lock, flags);
161
162 return mktime(year, month, day, hour, min, sec);
163}
164
165int m48t37y_set_time(unsigned long sec)
166{
167#ifdef CONFIG_64BIT
168 unsigned char* rtc_base = (unsigned char*)0xfffffffffc800000;
169#else
170 unsigned char* rtc_base = (unsigned char*)0xfc800000;
171#endif
172 struct rtc_time tm;
173 unsigned long flags;
174
175 /* convert to a more useful format -- note months count from 0 */
176 to_tm(sec, &tm);
177 tm.tm_mon += 1;
178
179 spin_lock_irqsave(&rtc_lock, flags);
180 /* enable writing */
181 rtc_base[0x7ff8] = 0x80;
182
183 /* year */
184 rtc_base[0x7fff] = BIN2BCD(tm.tm_year % 100);
185 rtc_base[0x7ff1] = BIN2BCD(tm.tm_year / 100);
186
187 /* month */
188 rtc_base[0x7ffe] = BIN2BCD(tm.tm_mon);
189
190 /* day */
191 rtc_base[0x7ffd] = BIN2BCD(tm.tm_mday);
192
193 /* hour/min/sec */
194 rtc_base[0x7ffb] = BIN2BCD(tm.tm_hour);
195 rtc_base[0x7ffa] = BIN2BCD(tm.tm_min);
196 rtc_base[0x7ff9] = BIN2BCD(tm.tm_sec);
197
198 /* day of week -- not really used, but let's keep it up-to-date */
199 rtc_base[0x7ffc] = BIN2BCD(tm.tm_wday + 1);
200
201 /* disable writing */
202 rtc_base[0x7ff8] = 0x00;
203 spin_unlock_irqrestore(&rtc_lock, flags);
204
205 return 0;
206}
207
208void __init plat_timer_setup(struct irqaction *irq)
209{
210 setup_irq(7, irq);
211}
212
213void momenco_time_init(void)
214{
215#ifdef CONFIG_CPU_SR71000
216 mips_hpt_frequency = cpu_clock;
217#elif defined(CONFIG_CPU_RM7000)
218 mips_hpt_frequency = cpu_clock / 2;
219#else
220#error Unknown CPU for this board
221#endif
222 printk("momenco_time_init cpu_clock=%d\n", cpu_clock);
223
224 rtc_mips_get_time = m48t37y_get_time;
225 rtc_mips_set_time = m48t37y_set_time;
226}
227
228void __init plat_mem_setup(void)
229{
230 unsigned int tmpword;
231
232 board_time_init = momenco_time_init;
233
234 _machine_restart = momenco_ocelot_restart;
235 _machine_halt = momenco_ocelot_halt;
236 pm_power_off = momenco_ocelot_power_off;
237
238 /*
239 * initrd_start = (unsigned long)ocelot_initrd_start;
240 * initrd_end = (unsigned long)ocelot_initrd_start + (ulong)ocelot_initrd_size;
241 * initrd_below_start_ok = 1;
242 */
243
244 /* do handoff reconfiguration */
245 PMON_v2_setup();
246
247 /* shut down ethernet ports, just to be sure our memory doesn't get
248 * corrupted by random ethernet traffic.
249 */
250 MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8);
251 MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8);
252 MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8);
253 MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8);
254 do {}
255 while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff);
256 do {}
257 while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff);
258 do {}
259 while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff);
260 do {}
261 while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff);
262 MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0),
263 MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1);
264 MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1),
265 MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1);
266
267 /* Turn off the Bit-Error LED */
268 OCELOT_FPGA_WRITE(0x80, CLR);
269
270 tmpword = OCELOT_FPGA_READ(BOARDREV);
271#ifdef CONFIG_CPU_SR71000
272 if (tmpword < 26)
273 printk("Momenco Ocelot-CS: Board Assembly Rev. %c\n",
274 'A'+tmpword);
275 else
276 printk("Momenco Ocelot-CS: Board Assembly Revision #0x%x\n",
277 tmpword);
278#else
279 if (tmpword < 26)
280 printk("Momenco Ocelot-C: Board Assembly Rev. %c\n",
281 'A'+tmpword);
282 else
283 printk("Momenco Ocelot-C: Board Assembly Revision #0x%x\n",
284 tmpword);
285#endif
286
287 tmpword = OCELOT_FPGA_READ(FPGA_REV);
288 printk("FPGA Rev: %d.%d\n", tmpword>>4, tmpword&15);
289 tmpword = OCELOT_FPGA_READ(RESET_STATUS);
290 printk("Reset reason: 0x%x\n", tmpword);
291 switch (tmpword) {
292 case 0x1:
293 printk(" - Power-up reset\n");
294 break;
295 case 0x2:
296 printk(" - Push-button reset\n");
297 break;
298 case 0x4:
299 printk(" - cPCI bus reset\n");
300 break;
301 case 0x8:
302 printk(" - Watchdog reset\n");
303 break;
304 case 0x10:
305 printk(" - Software reset\n");
306 break;
307 default:
308 printk(" - Unknown reset cause\n");
309 }
310 reset_reason = tmpword;
311 OCELOT_FPGA_WRITE(0xff, RESET_STATUS);
312
313 tmpword = OCELOT_FPGA_READ(CPCI_ID);
314 printk("cPCI ID register: 0x%02x\n", tmpword);
315 printk(" - Slot number: %d\n", tmpword & 0x1f);
316 printk(" - PCI bus present: %s\n", tmpword & 0x40 ? "yes" : "no");
317 printk(" - System Slot: %s\n", tmpword & 0x20 ? "yes" : "no");
318
319 tmpword = OCELOT_FPGA_READ(BOARD_STATUS);
320 printk("Board Status register: 0x%02x\n", tmpword);
321 printk(" - User jumper: %s\n", (tmpword & 0x80)?"installed":"absent");
322 printk(" - Boot flash write jumper: %s\n", (tmpword&0x40)?"installed":"absent");
323 printk(" - L3 Cache size: %d MiB\n", (1<<((tmpword&12) >> 2))&~1);
324 printk(" - SDRAM size: %d MiB\n", 1<<(6+(tmpword&3)));
325
326 switch(tmpword &3) {
327 case 3:
328 /* 512MiB */
329 add_memory_region(0x0, 0x200<<20, BOOT_MEM_RAM);
330 break;
331 case 2:
332 /* 256MiB */
333 add_memory_region(0x0, 0x100<<20, BOOT_MEM_RAM);
334 break;
335 case 1:
336 /* 128MiB */
337 add_memory_region(0x0, 0x80<<20, BOOT_MEM_RAM);
338 break;
339 case 0:
340 /* 1GiB -- needs CONFIG_HIGHMEM */
341 add_memory_region(0x0, 0x400<<20, BOOT_MEM_RAM);
342 break;
343 }
344}
345
346/*
347 * This needs to be one of the first initcalls, because no I/O port access
348 * can work before this
349 */
350static int io_base_ioremap(void)
351{
352 void __iomem * io_remap_range = ioremap(0xc0000000UL, 0x10000);
353
354 if (!io_remap_range)
355 panic("Could not ioremap I/O port range");
356
357 set_io_port_base((unsigned long) io_remap_range);
358
359 return 0;
360}
361
362module_init(io_base_ioremap);
diff --git a/arch/mips/momentum/ocelot_c/uart-irq.c b/arch/mips/momentum/ocelot_c/uart-irq.c
deleted file mode 100644
index de1a31ee52f3..000000000000
--- a/arch/mips/momentum/ocelot_c/uart-irq.c
+++ /dev/null
@@ -1,91 +0,0 @@
1/*
2 * Copyright 2002 Momentum Computer
3 * Author: mdharm@momenco.com
4 *
5 * arch/mips/momentum/ocelot_c/uart-irq.c
6 * Interrupt routines for UARTs. Interrupt numbers are assigned from
7 * 80 to 81 (2 interrupt sources).
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/irq.h>
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/kernel_stat.h>
21#include <asm/io.h>
22#include <asm/irq.h>
23#include "ocelot_c_fpga.h"
24
25static inline int ls1bit8(unsigned int x)
26{
27 int b = 7, s;
28
29 s = 4; if (((unsigned char)(x << 4)) == 0) s = 0; b -= s; x <<= s;
30 s = 2; if (((unsigned char)(x << 2)) == 0) s = 0; b -= s; x <<= s;
31 s = 1; if (((unsigned char)(x << 1)) == 0) s = 0; b -= s;
32
33 return b;
34}
35
36/* mask off an interrupt -- 0 is enable, 1 is disable */
37static inline void mask_uart_irq(unsigned int irq)
38{
39 uint8_t value;
40
41 value = OCELOT_FPGA_READ(UART_INTMASK);
42 value |= 1 << (irq - 74);
43 OCELOT_FPGA_WRITE(value, UART_INTMASK);
44
45 /* read the value back to assure that it's really been written */
46 value = OCELOT_FPGA_READ(UART_INTMASK);
47}
48
49/* unmask an interrupt -- 0 is enable, 1 is disable */
50static inline void unmask_uart_irq(unsigned int irq)
51{
52 uint8_t value;
53
54 value = OCELOT_FPGA_READ(UART_INTMASK);
55 value &= ~(1 << (irq - 74));
56 OCELOT_FPGA_WRITE(value, UART_INTMASK);
57
58 /* read the value back to assure that it's really been written */
59 value = OCELOT_FPGA_READ(UART_INTMASK);
60}
61
62/*
63 * Interrupt handler for interrupts coming from the FPGA chip.
64 */
65void ll_uart_irq(void)
66{
67 unsigned int irq_src, irq_mask;
68
69 /* read the interrupt status registers */
70 irq_src = OCELOT_FPGA_READ(UART_INTSTAT);
71 irq_mask = OCELOT_FPGA_READ(UART_INTMASK);
72
73 /* mask for just the interrupts we want */
74 irq_src &= ~irq_mask;
75
76 do_IRQ(ls1bit8(irq_src) + 74);
77}
78
79struct irq_chip uart_irq_type = {
80 .name = "UART/FPGA",
81 .ack = mask_uart_irq,
82 .mask = mask_uart_irq,
83 .mask_ack = mask_uart_irq,
84 .unmask = unmask_uart_irq,
85};
86
87void uart_irq_init(void)
88{
89 set_irq_chip_and_handler(80, &uart_irq_type, handle_level_irq);
90 set_irq_chip_and_handler(81, &uart_irq_type, handle_level_irq);
91}
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 3ff56b84add0..a3e741e190f2 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -31,7 +31,6 @@ obj-$(CONFIG_SOC_PNX8550) += fixup-pnx8550.o ops-pnx8550.o
31obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o 31obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o
32obj-$(CONFIG_MOMENCO_OCELOT) += fixup-ocelot.o pci-ocelot.o 32obj-$(CONFIG_MOMENCO_OCELOT) += fixup-ocelot.o pci-ocelot.o
33obj-$(CONFIG_MOMENCO_OCELOT_3) += fixup-ocelot3.o 33obj-$(CONFIG_MOMENCO_OCELOT_3) += fixup-ocelot3.o
34obj-$(CONFIG_MOMENCO_OCELOT_C) += fixup-ocelot-c.o pci-ocelot-c.o
35obj-$(CONFIG_PMC_YOSEMITE) += fixup-yosemite.o ops-titan.o ops-titan-ht.o \ 34obj-$(CONFIG_PMC_YOSEMITE) += fixup-yosemite.o ops-titan.o ops-titan-ht.o \
36 pci-yosemite.o 35 pci-yosemite.o
37obj-$(CONFIG_SGI_IP27) += ops-bridge.o pci-ip27.o 36obj-$(CONFIG_SGI_IP27) += ops-bridge.o pci-ip27.o
diff --git a/arch/mips/pci/fixup-ocelot-c.c b/arch/mips/pci/fixup-ocelot-c.c
deleted file mode 100644
index 6616648712c2..000000000000
--- a/arch/mips/pci/fixup-ocelot-c.c
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * Copyright 2002 Momentum Computer Inc.
3 * Author: Matthew Dharm <mdharm@momenco.com>
4 *
5 * Based on work for the Linux port to the Ocelot board, which is
6 * Copyright 2001 MontaVista Software Inc.
7 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
8 *
9 * arch/mips/momentum/ocelot_g/pci.c
10 * Board-specific PCI routines for mv64340 controller.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 */
17#include <linux/types.h>
18#include <linux/pci.h>
19#include <linux/kernel.h>
20#include <linux/init.h>
21
22int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
23{
24 int bus = dev->bus->number;
25
26 if (bus == 0 && slot == 1)
27 return 2; /* PCI-X A */
28 if (bus == 1 && slot == 1)
29 return 12; /* PCI-X B */
30 if (bus == 1 && slot == 2)
31 return 4; /* PCI B */
32
33return 0;
34 panic("Whooops in pcibios_map_irq");
35}
36
37/* Do platform specific device initialization at pci_enable_device() time */
38int pcibios_plat_dev_init(struct pci_dev *dev)
39{
40 return 0;
41}
diff --git a/arch/mips/pci/pci-ocelot-c.c b/arch/mips/pci/pci-ocelot-c.c
deleted file mode 100644
index 027759f7c904..000000000000
--- a/arch/mips/pci/pci-ocelot-c.c
+++ /dev/null
@@ -1,145 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2004, 06 by Ralf Baechle (ralf@linux-mips.org)
7 */
8
9#include <linux/types.h>
10#include <linux/pci.h>
11#include <linux/mv643xx.h>
12
13#include <linux/init.h>
14
15#include <asm/marvell.h>
16
17/*
18 * We assume the address ranges have already been setup appropriately by
19 * the firmware. PMON in case of the Ocelot C does that.
20 */
21static struct resource mv_pci_io_mem0_resource = {
22 .name = "MV64340 PCI0 IO MEM",
23 .flags = IORESOURCE_IO
24};
25
26static struct resource mv_pci_mem0_resource = {
27 .name = "MV64340 PCI0 MEM",
28 .flags = IORESOURCE_MEM
29};
30
31static struct mv_pci_controller mv_bus0_controller = {
32 .pcic = {
33 .pci_ops = &mv_pci_ops,
34 .mem_resource = &mv_pci_mem0_resource,
35 .io_resource = &mv_pci_io_mem0_resource,
36 },
37 .config_addr = MV64340_PCI_0_CONFIG_ADDR,
38 .config_vreg = MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG,
39};
40
41static uint32_t mv_io_base, mv_io_size;
42
43static void mv64340_pci0_init(void)
44{
45 uint32_t mem0_base, mem0_size;
46 uint32_t io_base, io_size;
47
48 io_base = MV_READ(MV64340_PCI_0_IO_BASE_ADDR) << 16;
49 io_size = (MV_READ(MV64340_PCI_0_IO_SIZE) + 1) << 16;
50 mem0_base = MV_READ(MV64340_PCI_0_MEMORY0_BASE_ADDR) << 16;
51 mem0_size = (MV_READ(MV64340_PCI_0_MEMORY0_SIZE) + 1) << 16;
52
53 mv_pci_io_mem0_resource.start = 0;
54 mv_pci_io_mem0_resource.end = io_size - 1;
55 mv_pci_mem0_resource.start = mem0_base;
56 mv_pci_mem0_resource.end = mem0_base + mem0_size - 1;
57 mv_bus0_controller.pcic.mem_offset = mem0_base;
58 mv_bus0_controller.pcic.io_offset = 0;
59
60 ioport_resource.end = io_size - 1;
61
62 register_pci_controller(&mv_bus0_controller.pcic);
63
64 mv_io_base = io_base;
65 mv_io_size = io_size;
66}
67
68static struct resource mv_pci_io_mem1_resource = {
69 .name = "MV64340 PCI1 IO MEM",
70 .flags = IORESOURCE_IO
71};
72
73static struct resource mv_pci_mem1_resource = {
74 .name = "MV64340 PCI1 MEM",
75 .flags = IORESOURCE_MEM
76};
77
78static struct mv_pci_controller mv_bus1_controller = {
79 .pcic = {
80 .pci_ops = &mv_pci_ops,
81 .mem_resource = &mv_pci_mem1_resource,
82 .io_resource = &mv_pci_io_mem1_resource,
83 },
84 .config_addr = MV64340_PCI_1_CONFIG_ADDR,
85 .config_vreg = MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG,
86};
87
88static __init void mv64340_pci1_init(void)
89{
90 uint32_t mem0_base, mem0_size;
91 uint32_t io_base, io_size;
92
93 io_base = MV_READ(MV64340_PCI_1_IO_BASE_ADDR) << 16;
94 io_size = (MV_READ(MV64340_PCI_1_IO_SIZE) + 1) << 16;
95 mem0_base = MV_READ(MV64340_PCI_1_MEMORY0_BASE_ADDR) << 16;
96 mem0_size = (MV_READ(MV64340_PCI_1_MEMORY0_SIZE) + 1) << 16;
97
98 /*
99 * Here we assume the I/O window of second bus to be contiguous with
100 * the first. A gap is no problem but would waste address space for
101 * remapping the port space.
102 */
103 mv_pci_io_mem1_resource.start = mv_io_size;
104 mv_pci_io_mem1_resource.end = mv_io_size + io_size - 1;
105 mv_pci_mem1_resource.start = mem0_base;
106 mv_pci_mem1_resource.end = mem0_base + mem0_size - 1;
107 mv_bus1_controller.pcic.mem_offset = mem0_base;
108 mv_bus1_controller.pcic.io_offset = 0;
109
110 ioport_resource.end = io_base + io_size -mv_io_base - 1;
111
112 register_pci_controller(&mv_bus1_controller.pcic);
113
114 mv_io_size = io_base + io_size - mv_io_base;
115}
116
117static __init int __init ocelot_c_pci_init(void)
118{
119 unsigned long io_v_base;
120 uint32_t enable;
121
122 enable = ~MV_READ(MV64340_BASE_ADDR_ENABLE);
123
124 /*
125 * We require at least one enabled I/O or PCI memory window or we
126 * will ignore this PCI bus. We ignore PCI windows 1, 2 and 3.
127 */
128 if (enable & (0x01 << 9) || enable & (0x01 << 10))
129 mv64340_pci0_init();
130
131 if (enable & (0x01 << 14) || enable & (0x01 << 15))
132 mv64340_pci1_init();
133
134 if (mv_io_size) {
135 io_v_base = (unsigned long) ioremap(mv_io_base, mv_io_size);
136 if (!io_v_base)
137 panic("Could not ioremap I/O port range");
138
139 set_io_port_base(io_v_base);
140 }
141
142 return 0;
143}
144
145arch_initcall(ocelot_c_pci_init);