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authorLinus Torvalds <torvalds@linux-foundation.org>2011-10-25 07:25:22 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-10-25 07:25:22 -0400
commit8a9ea3237e7eb5c25f09e429ad242ae5a3d5ea22 (patch)
treea0a63398a9983667d52cbbbf4e2405b4f22b1d83 /arch/mips
parent1be025d3cb40cd295123af2c394f7229ef9b30ca (diff)
parent8b3408f8ee994973869d8ba32c5bf482bc4ddca4 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1745 commits) dp83640: free packet queues on remove dp83640: use proper function to free transmit time stamping packets ipv6: Do not use routes from locally generated RAs |PATCH net-next] tg3: add tx_dropped counter be2net: don't create multiple RX/TX rings in multi channel mode be2net: don't create multiple TXQs in BE2 be2net: refactor VF setup/teardown code into be_vf_setup/clear() be2net: add vlan/rx-mode/flow-control config to be_setup() net_sched: cls_flow: use skb_header_pointer() ipv4: avoid useless call of the function check_peer_pmtu TCP: remove TCP_DEBUG net: Fix driver name for mdio-gpio.c ipv4: tcp: fix TOS value in ACK messages sent from TIME_WAIT rtnetlink: Add missing manual netlink notification in dev_change_net_namespaces ipv4: fix ipsec forward performance regression jme: fix irq storm after suspend/resume route: fix ICMP redirect validation net: hold sock reference while processing tx timestamps tcp: md5: add more const attributes Add ethtool -g support to virtio_net ... Fix up conflicts in: - drivers/net/Kconfig: The split-up generated a trivial conflict with removal of a stale reference to Documentation/networking/net-modules.txt. Remove it from the new location instead. - fs/sysfs/dir.c: Fairly nasty conflicts with the sysfs rb-tree usage, conflicting with Eric Biederman's changes for tagged directories.
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kconfig8
-rw-r--r--arch/mips/bcm47xx/Kconfig31
-rw-r--r--arch/mips/bcm47xx/Makefile3
-rw-r--r--arch/mips/bcm47xx/gpio.c82
-rw-r--r--arch/mips/bcm47xx/irq.c12
-rw-r--r--arch/mips/bcm47xx/nvram.c29
-rw-r--r--arch/mips/bcm47xx/serial.c46
-rw-r--r--arch/mips/bcm47xx/setup.c90
-rw-r--r--arch/mips/bcm47xx/time.c16
-rw-r--r--arch/mips/bcm47xx/wgt634u.c14
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/bcm47xx.h26
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/gpio.h108
-rw-r--r--arch/mips/pci/pci-bcm47xx.c6
-rw-r--r--arch/mips/txx9/generic/setup_tx4939.c2
14 files changed, 406 insertions, 67 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index b122adc8bdbb..4cbc6d8de210 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -92,15 +92,8 @@ config BCM47XX
92 select DMA_NONCOHERENT 92 select DMA_NONCOHERENT
93 select HW_HAS_PCI 93 select HW_HAS_PCI
94 select IRQ_CPU 94 select IRQ_CPU
95 select SYS_HAS_CPU_MIPS32_R1
96 select SYS_SUPPORTS_32BIT_KERNEL 95 select SYS_SUPPORTS_32BIT_KERNEL
97 select SYS_SUPPORTS_LITTLE_ENDIAN 96 select SYS_SUPPORTS_LITTLE_ENDIAN
98 select SSB
99 select SSB_DRIVER_MIPS
100 select SSB_DRIVER_EXTIF
101 select SSB_EMBEDDED
102 select SSB_B43_PCI_BRIDGE if PCI
103 select SSB_PCICORE_HOSTMODE if PCI
104 select GENERIC_GPIO 97 select GENERIC_GPIO
105 select SYS_HAS_EARLY_PRINTK 98 select SYS_HAS_EARLY_PRINTK
106 select CFE 99 select CFE
@@ -791,6 +784,7 @@ endchoice
791 784
792source "arch/mips/alchemy/Kconfig" 785source "arch/mips/alchemy/Kconfig"
793source "arch/mips/ath79/Kconfig" 786source "arch/mips/ath79/Kconfig"
787source "arch/mips/bcm47xx/Kconfig"
794source "arch/mips/bcm63xx/Kconfig" 788source "arch/mips/bcm63xx/Kconfig"
795source "arch/mips/jazz/Kconfig" 789source "arch/mips/jazz/Kconfig"
796source "arch/mips/jz4740/Kconfig" 790source "arch/mips/jz4740/Kconfig"
diff --git a/arch/mips/bcm47xx/Kconfig b/arch/mips/bcm47xx/Kconfig
new file mode 100644
index 000000000000..6210b8d84109
--- /dev/null
+++ b/arch/mips/bcm47xx/Kconfig
@@ -0,0 +1,31 @@
1if BCM47XX
2
3config BCM47XX_SSB
4 bool "SSB Support for Broadcom BCM47XX"
5 select SYS_HAS_CPU_MIPS32_R1
6 select SSB
7 select SSB_DRIVER_MIPS
8 select SSB_DRIVER_EXTIF
9 select SSB_EMBEDDED
10 select SSB_B43_PCI_BRIDGE if PCI
11 select SSB_PCICORE_HOSTMODE if PCI
12 default y
13 help
14 Add support for old Broadcom BCM47xx boards with Sonics Silicon Backplane support.
15
16 This will generate an image with support for SSB and MIPS32 R1 instruction set.
17
18config BCM47XX_BCMA
19 bool "BCMA Support for Broadcom BCM47XX"
20 select SYS_HAS_CPU_MIPS32_R2
21 select BCMA
22 select BCMA_HOST_SOC
23 select BCMA_DRIVER_MIPS
24 select BCMA_DRIVER_PCI_HOSTMODE if PCI
25 default y
26 help
27 Add support for new Broadcom BCM47xx boards with Broadcom specific Advanced Microcontroller Bus.
28
29 This will generate an image with support for BCMA and MIPS32 R2 instruction set.
30
31endif
diff --git a/arch/mips/bcm47xx/Makefile b/arch/mips/bcm47xx/Makefile
index 7465e8a72d9a..4add17349ff9 100644
--- a/arch/mips/bcm47xx/Makefile
+++ b/arch/mips/bcm47xx/Makefile
@@ -3,4 +3,5 @@
3# under Linux. 3# under Linux.
4# 4#
5 5
6obj-y := gpio.o irq.o nvram.o prom.o serial.o setup.o time.o wgt634u.o 6obj-y += gpio.o irq.o nvram.o prom.o serial.o setup.o time.o
7obj-$(CONFIG_BCM47XX_SSB) += wgt634u.o
diff --git a/arch/mips/bcm47xx/gpio.c b/arch/mips/bcm47xx/gpio.c
index e4a5ee9c9721..57b425fd4d41 100644
--- a/arch/mips/bcm47xx/gpio.c
+++ b/arch/mips/bcm47xx/gpio.c
@@ -20,42 +20,82 @@ static DECLARE_BITMAP(gpio_in_use, BCM47XX_EXTIF_GPIO_LINES);
20 20
21int gpio_request(unsigned gpio, const char *tag) 21int gpio_request(unsigned gpio, const char *tag)
22{ 22{
23 if (ssb_chipco_available(&ssb_bcm47xx.chipco) && 23 switch (bcm47xx_bus_type) {
24 ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) 24#ifdef CONFIG_BCM47XX_SSB
25 return -EINVAL; 25 case BCM47XX_BUS_TYPE_SSB:
26 if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) &&
27 ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
28 return -EINVAL;
26 29
27 if (ssb_extif_available(&ssb_bcm47xx.extif) && 30 if (ssb_extif_available(&bcm47xx_bus.ssb.extif) &&
28 ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES)) 31 ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
29 return -EINVAL; 32 return -EINVAL;
30 33
31 if (test_and_set_bit(gpio, gpio_in_use)) 34 if (test_and_set_bit(gpio, gpio_in_use))
32 return -EBUSY; 35 return -EBUSY;
33 36
34 return 0; 37 return 0;
38#endif
39#ifdef CONFIG_BCM47XX_BCMA
40 case BCM47XX_BUS_TYPE_BCMA:
41 if (gpio >= BCM47XX_CHIPCO_GPIO_LINES)
42 return -EINVAL;
43
44 if (test_and_set_bit(gpio, gpio_in_use))
45 return -EBUSY;
46
47 return 0;
48#endif
49 }
50 return -EINVAL;
35} 51}
36EXPORT_SYMBOL(gpio_request); 52EXPORT_SYMBOL(gpio_request);
37 53
38void gpio_free(unsigned gpio) 54void gpio_free(unsigned gpio)
39{ 55{
40 if (ssb_chipco_available(&ssb_bcm47xx.chipco) && 56 switch (bcm47xx_bus_type) {
41 ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) 57#ifdef CONFIG_BCM47XX_SSB
42 return; 58 case BCM47XX_BUS_TYPE_SSB:
59 if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) &&
60 ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
61 return;
62
63 if (ssb_extif_available(&bcm47xx_bus.ssb.extif) &&
64 ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
65 return;
43 66
44 if (ssb_extif_available(&ssb_bcm47xx.extif) && 67 clear_bit(gpio, gpio_in_use);
45 ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
46 return; 68 return;
69#endif
70#ifdef CONFIG_BCM47XX_BCMA
71 case BCM47XX_BUS_TYPE_BCMA:
72 if (gpio >= BCM47XX_CHIPCO_GPIO_LINES)
73 return;
47 74
48 clear_bit(gpio, gpio_in_use); 75 clear_bit(gpio, gpio_in_use);
76 return;
77#endif
78 }
49} 79}
50EXPORT_SYMBOL(gpio_free); 80EXPORT_SYMBOL(gpio_free);
51 81
52int gpio_to_irq(unsigned gpio) 82int gpio_to_irq(unsigned gpio)
53{ 83{
54 if (ssb_chipco_available(&ssb_bcm47xx.chipco)) 84 switch (bcm47xx_bus_type) {
55 return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2; 85#ifdef CONFIG_BCM47XX_SSB
56 else if (ssb_extif_available(&ssb_bcm47xx.extif)) 86 case BCM47XX_BUS_TYPE_SSB:
57 return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2; 87 if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco))
58 else 88 return ssb_mips_irq(bcm47xx_bus.ssb.chipco.dev) + 2;
59 return -EINVAL; 89 else if (ssb_extif_available(&bcm47xx_bus.ssb.extif))
90 return ssb_mips_irq(bcm47xx_bus.ssb.extif.dev) + 2;
91 else
92 return -EINVAL;
93#endif
94#ifdef CONFIG_BCM47XX_BCMA
95 case BCM47XX_BUS_TYPE_BCMA:
96 return bcma_core_mips_irq(bcm47xx_bus.bcma.bus.drv_cc.core) + 2;
97#endif
98 }
99 return -EINVAL;
60} 100}
61EXPORT_SYMBOL_GPL(gpio_to_irq); 101EXPORT_SYMBOL_GPL(gpio_to_irq);
diff --git a/arch/mips/bcm47xx/irq.c b/arch/mips/bcm47xx/irq.c
index 325757acd020..8cf3833b2d29 100644
--- a/arch/mips/bcm47xx/irq.c
+++ b/arch/mips/bcm47xx/irq.c
@@ -26,6 +26,7 @@
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/irq.h> 27#include <linux/irq.h>
28#include <asm/irq_cpu.h> 28#include <asm/irq_cpu.h>
29#include <bcm47xx.h>
29 30
30void plat_irq_dispatch(void) 31void plat_irq_dispatch(void)
31{ 32{
@@ -51,5 +52,16 @@ void plat_irq_dispatch(void)
51 52
52void __init arch_init_irq(void) 53void __init arch_init_irq(void)
53{ 54{
55#ifdef CONFIG_BCM47XX_BCMA
56 if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) {
57 bcma_write32(bcm47xx_bus.bcma.bus.drv_mips.core,
58 BCMA_MIPS_MIPS74K_INTMASK(5), 1 << 31);
59 /*
60 * the kernel reads the timer irq from some register and thinks
61 * it's #5, but we offset it by 2 and route to #7
62 */
63 cp0_compare_irq = 7;
64 }
65#endif
54 mips_cpu_irq_init(); 66 mips_cpu_irq_init();
55} 67}
diff --git a/arch/mips/bcm47xx/nvram.c b/arch/mips/bcm47xx/nvram.c
index 54db815bc86c..a84e3bb7387f 100644
--- a/arch/mips/bcm47xx/nvram.c
+++ b/arch/mips/bcm47xx/nvram.c
@@ -26,14 +26,35 @@ static char nvram_buf[NVRAM_SPACE];
26/* Probe for NVRAM header */ 26/* Probe for NVRAM header */
27static void early_nvram_init(void) 27static void early_nvram_init(void)
28{ 28{
29 struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore; 29#ifdef CONFIG_BCM47XX_SSB
30 struct ssb_mipscore *mcore_ssb;
31#endif
32#ifdef CONFIG_BCM47XX_BCMA
33 struct bcma_drv_cc *bcma_cc;
34#endif
30 struct nvram_header *header; 35 struct nvram_header *header;
31 int i; 36 int i;
32 u32 base, lim, off; 37 u32 base = 0;
38 u32 lim = 0;
39 u32 off;
33 u32 *src, *dst; 40 u32 *src, *dst;
34 41
35 base = mcore->flash_window; 42 switch (bcm47xx_bus_type) {
36 lim = mcore->flash_window_size; 43#ifdef CONFIG_BCM47XX_SSB
44 case BCM47XX_BUS_TYPE_SSB:
45 mcore_ssb = &bcm47xx_bus.ssb.mipscore;
46 base = mcore_ssb->flash_window;
47 lim = mcore_ssb->flash_window_size;
48 break;
49#endif
50#ifdef CONFIG_BCM47XX_BCMA
51 case BCM47XX_BUS_TYPE_BCMA:
52 bcma_cc = &bcm47xx_bus.bcma.bus.drv_cc;
53 base = bcma_cc->pflash.window;
54 lim = bcma_cc->pflash.window_size;
55 break;
56#endif
57 }
37 58
38 off = FLASH_MIN; 59 off = FLASH_MIN;
39 while (off <= lim) { 60 while (off <= lim) {
diff --git a/arch/mips/bcm47xx/serial.c b/arch/mips/bcm47xx/serial.c
index 59c11afdb2ab..57981e4fe2bc 100644
--- a/arch/mips/bcm47xx/serial.c
+++ b/arch/mips/bcm47xx/serial.c
@@ -23,10 +23,11 @@ static struct platform_device uart8250_device = {
23 }, 23 },
24}; 24};
25 25
26static int __init uart8250_init(void) 26#ifdef CONFIG_BCM47XX_SSB
27static int __init uart8250_init_ssb(void)
27{ 28{
28 int i; 29 int i;
29 struct ssb_mipscore *mcore = &(ssb_bcm47xx.mipscore); 30 struct ssb_mipscore *mcore = &(bcm47xx_bus.ssb.mipscore);
30 31
31 memset(&uart8250_data, 0, sizeof(uart8250_data)); 32 memset(&uart8250_data, 0, sizeof(uart8250_data));
32 33
@@ -44,6 +45,47 @@ static int __init uart8250_init(void)
44 } 45 }
45 return platform_device_register(&uart8250_device); 46 return platform_device_register(&uart8250_device);
46} 47}
48#endif
49
50#ifdef CONFIG_BCM47XX_BCMA
51static int __init uart8250_init_bcma(void)
52{
53 int i;
54 struct bcma_drv_cc *cc = &(bcm47xx_bus.bcma.bus.drv_cc);
55
56 memset(&uart8250_data, 0, sizeof(uart8250_data));
57
58 for (i = 0; i < cc->nr_serial_ports; i++) {
59 struct plat_serial8250_port *p = &(uart8250_data[i]);
60 struct bcma_serial_port *bcma_port;
61 bcma_port = &(cc->serial_ports[i]);
62
63 p->mapbase = (unsigned int) bcma_port->regs;
64 p->membase = (void *) bcma_port->regs;
65 p->irq = bcma_port->irq + 2;
66 p->uartclk = bcma_port->baud_base;
67 p->regshift = bcma_port->reg_shift;
68 p->iotype = UPIO_MEM;
69 p->flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
70 }
71 return platform_device_register(&uart8250_device);
72}
73#endif
74
75static int __init uart8250_init(void)
76{
77 switch (bcm47xx_bus_type) {
78#ifdef CONFIG_BCM47XX_SSB
79 case BCM47XX_BUS_TYPE_SSB:
80 return uart8250_init_ssb();
81#endif
82#ifdef CONFIG_BCM47XX_BCMA
83 case BCM47XX_BUS_TYPE_BCMA:
84 return uart8250_init_bcma();
85#endif
86 }
87 return -EINVAL;
88}
47 89
48module_init(uart8250_init); 90module_init(uart8250_init);
49 91
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index cfae81571ded..17c3d14d7c49 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -29,21 +29,36 @@
29#include <linux/types.h> 29#include <linux/types.h>
30#include <linux/ssb/ssb.h> 30#include <linux/ssb/ssb.h>
31#include <linux/ssb/ssb_embedded.h> 31#include <linux/ssb/ssb_embedded.h>
32#include <linux/bcma/bcma_soc.h>
32#include <asm/bootinfo.h> 33#include <asm/bootinfo.h>
33#include <asm/reboot.h> 34#include <asm/reboot.h>
34#include <asm/time.h> 35#include <asm/time.h>
35#include <bcm47xx.h> 36#include <bcm47xx.h>
36#include <asm/mach-bcm47xx/nvram.h> 37#include <asm/mach-bcm47xx/nvram.h>
37 38
38struct ssb_bus ssb_bcm47xx; 39union bcm47xx_bus bcm47xx_bus;
39EXPORT_SYMBOL(ssb_bcm47xx); 40EXPORT_SYMBOL(bcm47xx_bus);
41
42enum bcm47xx_bus_type bcm47xx_bus_type;
43EXPORT_SYMBOL(bcm47xx_bus_type);
40 44
41static void bcm47xx_machine_restart(char *command) 45static void bcm47xx_machine_restart(char *command)
42{ 46{
43 printk(KERN_ALERT "Please stand by while rebooting the system...\n"); 47 printk(KERN_ALERT "Please stand by while rebooting the system...\n");
44 local_irq_disable(); 48 local_irq_disable();
45 /* Set the watchdog timer to reset immediately */ 49 /* Set the watchdog timer to reset immediately */
46 ssb_watchdog_timer_set(&ssb_bcm47xx, 1); 50 switch (bcm47xx_bus_type) {
51#ifdef CONFIG_BCM47XX_SSB
52 case BCM47XX_BUS_TYPE_SSB:
53 ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);
54 break;
55#endif
56#ifdef CONFIG_BCM47XX_BCMA
57 case BCM47XX_BUS_TYPE_BCMA:
58 bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1);
59 break;
60#endif
61 }
47 while (1) 62 while (1)
48 cpu_relax(); 63 cpu_relax();
49} 64}
@@ -52,11 +67,23 @@ static void bcm47xx_machine_halt(void)
52{ 67{
53 /* Disable interrupts and watchdog and spin forever */ 68 /* Disable interrupts and watchdog and spin forever */
54 local_irq_disable(); 69 local_irq_disable();
55 ssb_watchdog_timer_set(&ssb_bcm47xx, 0); 70 switch (bcm47xx_bus_type) {
71#ifdef CONFIG_BCM47XX_SSB
72 case BCM47XX_BUS_TYPE_SSB:
73 ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0);
74 break;
75#endif
76#ifdef CONFIG_BCM47XX_BCMA
77 case BCM47XX_BUS_TYPE_BCMA:
78 bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 0);
79 break;
80#endif
81 }
56 while (1) 82 while (1)
57 cpu_relax(); 83 cpu_relax();
58} 84}
59 85
86#ifdef CONFIG_BCM47XX_SSB
60#define READ_FROM_NVRAM(_outvar, name, buf) \ 87#define READ_FROM_NVRAM(_outvar, name, buf) \
61 if (nvram_getprefix(prefix, name, buf, sizeof(buf)) >= 0)\ 88 if (nvram_getprefix(prefix, name, buf, sizeof(buf)) >= 0)\
62 sprom->_outvar = simple_strtoul(buf, NULL, 0); 89 sprom->_outvar = simple_strtoul(buf, NULL, 0);
@@ -247,7 +274,7 @@ static int bcm47xx_get_invariants(struct ssb_bus *bus,
247 return 0; 274 return 0;
248} 275}
249 276
250void __init plat_mem_setup(void) 277static void __init bcm47xx_register_ssb(void)
251{ 278{
252 int err; 279 int err;
253 char buf[100]; 280 char buf[100];
@@ -258,12 +285,12 @@ void __init plat_mem_setup(void)
258 printk(KERN_WARNING "bcm47xx: someone else already registered" 285 printk(KERN_WARNING "bcm47xx: someone else already registered"
259 " a ssb SPROM callback handler (err %d)\n", err); 286 " a ssb SPROM callback handler (err %d)\n", err);
260 287
261 err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE, 288 err = ssb_bus_ssbbus_register(&(bcm47xx_bus.ssb), SSB_ENUM_BASE,
262 bcm47xx_get_invariants); 289 bcm47xx_get_invariants);
263 if (err) 290 if (err)
264 panic("Failed to initialize SSB bus (err %d)\n", err); 291 panic("Failed to initialize SSB bus (err %d)\n", err);
265 292
266 mcore = &ssb_bcm47xx.mipscore; 293 mcore = &bcm47xx_bus.ssb.mipscore;
267 if (nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) { 294 if (nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
268 if (strstr(buf, "console=ttyS1")) { 295 if (strstr(buf, "console=ttyS1")) {
269 struct ssb_serial_port port; 296 struct ssb_serial_port port;
@@ -276,8 +303,57 @@ void __init plat_mem_setup(void)
276 memcpy(&mcore->serial_ports[1], &port, sizeof(port)); 303 memcpy(&mcore->serial_ports[1], &port, sizeof(port));
277 } 304 }
278 } 305 }
306}
307#endif
308
309#ifdef CONFIG_BCM47XX_BCMA
310static void __init bcm47xx_register_bcma(void)
311{
312 int err;
313
314 err = bcma_host_soc_register(&bcm47xx_bus.bcma);
315 if (err)
316 panic("Failed to initialize BCMA bus (err %d)\n", err);
317}
318#endif
319
320void __init plat_mem_setup(void)
321{
322 struct cpuinfo_mips *c = &current_cpu_data;
323
324 if (c->cputype == CPU_74K) {
325 printk(KERN_INFO "bcm47xx: using bcma bus\n");
326#ifdef CONFIG_BCM47XX_BCMA
327 bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA;
328 bcm47xx_register_bcma();
329#endif
330 } else {
331 printk(KERN_INFO "bcm47xx: using ssb bus\n");
332#ifdef CONFIG_BCM47XX_SSB
333 bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB;
334 bcm47xx_register_ssb();
335#endif
336 }
279 337
280 _machine_restart = bcm47xx_machine_restart; 338 _machine_restart = bcm47xx_machine_restart;
281 _machine_halt = bcm47xx_machine_halt; 339 _machine_halt = bcm47xx_machine_halt;
282 pm_power_off = bcm47xx_machine_halt; 340 pm_power_off = bcm47xx_machine_halt;
283} 341}
342
343static int __init bcm47xx_register_bus_complete(void)
344{
345 switch (bcm47xx_bus_type) {
346#ifdef CONFIG_BCM47XX_SSB
347 case BCM47XX_BUS_TYPE_SSB:
348 /* Nothing to do */
349 break;
350#endif
351#ifdef CONFIG_BCM47XX_BCMA
352 case BCM47XX_BUS_TYPE_BCMA:
353 bcma_bus_register(&bcm47xx_bus.bcma.bus);
354 break;
355#endif
356 }
357 return 0;
358}
359device_initcall(bcm47xx_register_bus_complete);
diff --git a/arch/mips/bcm47xx/time.c b/arch/mips/bcm47xx/time.c
index 0c6f47b3fd94..536374dcba78 100644
--- a/arch/mips/bcm47xx/time.c
+++ b/arch/mips/bcm47xx/time.c
@@ -30,7 +30,7 @@
30 30
31void __init plat_time_init(void) 31void __init plat_time_init(void)
32{ 32{
33 unsigned long hz; 33 unsigned long hz = 0;
34 34
35 /* 35 /*
36 * Use deterministic values for initial counter interrupt 36 * Use deterministic values for initial counter interrupt
@@ -39,7 +39,19 @@ void __init plat_time_init(void)
39 write_c0_count(0); 39 write_c0_count(0);
40 write_c0_compare(0xffff); 40 write_c0_compare(0xffff);
41 41
42 hz = ssb_cpu_clock(&ssb_bcm47xx.mipscore) / 2; 42 switch (bcm47xx_bus_type) {
43#ifdef CONFIG_BCM47XX_SSB
44 case BCM47XX_BUS_TYPE_SSB:
45 hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2;
46 break;
47#endif
48#ifdef CONFIG_BCM47XX_BCMA
49 case BCM47XX_BUS_TYPE_BCMA:
50 hz = bcma_cpu_clock(&bcm47xx_bus.bcma.bus.drv_mips) / 2;
51 break;
52#endif
53 }
54
43 if (!hz) 55 if (!hz)
44 hz = 100000000; 56 hz = 100000000;
45 57
diff --git a/arch/mips/bcm47xx/wgt634u.c b/arch/mips/bcm47xx/wgt634u.c
index 74d06965326f..e9f9ec8d443b 100644
--- a/arch/mips/bcm47xx/wgt634u.c
+++ b/arch/mips/bcm47xx/wgt634u.c
@@ -108,7 +108,7 @@ static irqreturn_t gpio_interrupt(int irq, void *ignored)
108 108
109 /* Interrupts are shared, check if the current one is 109 /* Interrupts are shared, check if the current one is
110 a GPIO interrupt. */ 110 a GPIO interrupt. */
111 if (!ssb_chipco_irq_status(&ssb_bcm47xx.chipco, 111 if (!ssb_chipco_irq_status(&bcm47xx_bus.ssb.chipco,
112 SSB_CHIPCO_IRQ_GPIO)) 112 SSB_CHIPCO_IRQ_GPIO))
113 return IRQ_NONE; 113 return IRQ_NONE;
114 114
@@ -132,22 +132,26 @@ static int __init wgt634u_init(void)
132 * machine. Use the MAC address as an heuristic. Netgear Inc. has 132 * machine. Use the MAC address as an heuristic. Netgear Inc. has
133 * been allocated ranges 00:09:5b:xx:xx:xx and 00:0f:b5:xx:xx:xx. 133 * been allocated ranges 00:09:5b:xx:xx:xx and 00:0f:b5:xx:xx:xx.
134 */ 134 */
135 u8 *et0mac;
135 136
136 u8 *et0mac = ssb_bcm47xx.sprom.et0mac; 137 if (bcm47xx_bus_type != BCM47XX_BUS_TYPE_SSB)
138 return -ENODEV;
139
140 et0mac = bcm47xx_bus.ssb.sprom.et0mac;
137 141
138 if (et0mac[0] == 0x00 && 142 if (et0mac[0] == 0x00 &&
139 ((et0mac[1] == 0x09 && et0mac[2] == 0x5b) || 143 ((et0mac[1] == 0x09 && et0mac[2] == 0x5b) ||
140 (et0mac[1] == 0x0f && et0mac[2] == 0xb5))) { 144 (et0mac[1] == 0x0f && et0mac[2] == 0xb5))) {
141 struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore; 145 struct ssb_mipscore *mcore = &bcm47xx_bus.ssb.mipscore;
142 146
143 printk(KERN_INFO "WGT634U machine detected.\n"); 147 printk(KERN_INFO "WGT634U machine detected.\n");
144 148
145 if (!request_irq(gpio_to_irq(WGT634U_GPIO_RESET), 149 if (!request_irq(gpio_to_irq(WGT634U_GPIO_RESET),
146 gpio_interrupt, IRQF_SHARED, 150 gpio_interrupt, IRQF_SHARED,
147 "WGT634U GPIO", &ssb_bcm47xx.chipco)) { 151 "WGT634U GPIO", &bcm47xx_bus.ssb.chipco)) {
148 gpio_direction_input(WGT634U_GPIO_RESET); 152 gpio_direction_input(WGT634U_GPIO_RESET);
149 gpio_intmask(WGT634U_GPIO_RESET, 1); 153 gpio_intmask(WGT634U_GPIO_RESET, 1);
150 ssb_chipco_irq_mask(&ssb_bcm47xx.chipco, 154 ssb_chipco_irq_mask(&bcm47xx_bus.ssb.chipco,
151 SSB_CHIPCO_IRQ_GPIO, 155 SSB_CHIPCO_IRQ_GPIO,
152 SSB_CHIPCO_IRQ_GPIO); 156 SSB_CHIPCO_IRQ_GPIO);
153 } 157 }
diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
index d008f47a28bd..de95e0723e2b 100644
--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
@@ -19,7 +19,29 @@
19#ifndef __ASM_BCM47XX_H 19#ifndef __ASM_BCM47XX_H
20#define __ASM_BCM47XX_H 20#define __ASM_BCM47XX_H
21 21
22/* SSB bus */ 22#include <linux/ssb/ssb.h>
23extern struct ssb_bus ssb_bcm47xx; 23#include <linux/bcma/bcma.h>
24#include <linux/bcma/bcma_soc.h>
25
26enum bcm47xx_bus_type {
27#ifdef CONFIG_BCM47XX_SSB
28 BCM47XX_BUS_TYPE_SSB,
29#endif
30#ifdef CONFIG_BCM47XX_BCMA
31 BCM47XX_BUS_TYPE_BCMA,
32#endif
33};
34
35union bcm47xx_bus {
36#ifdef CONFIG_BCM47XX_SSB
37 struct ssb_bus ssb;
38#endif
39#ifdef CONFIG_BCM47XX_BCMA
40 struct bcma_soc bcma;
41#endif
42};
43
44extern union bcm47xx_bus bcm47xx_bus;
45extern enum bcm47xx_bus_type bcm47xx_bus_type;
24 46
25#endif /* __ASM_BCM47XX_H */ 47#endif /* __ASM_BCM47XX_H */
diff --git a/arch/mips/include/asm/mach-bcm47xx/gpio.h b/arch/mips/include/asm/mach-bcm47xx/gpio.h
index 98504142124e..76961cabeedf 100644
--- a/arch/mips/include/asm/mach-bcm47xx/gpio.h
+++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h
@@ -10,6 +10,7 @@
10#define __BCM47XX_GPIO_H 10#define __BCM47XX_GPIO_H
11 11
12#include <linux/ssb/ssb_embedded.h> 12#include <linux/ssb/ssb_embedded.h>
13#include <linux/bcma/bcma.h>
13#include <asm/mach-bcm47xx/bcm47xx.h> 14#include <asm/mach-bcm47xx/bcm47xx.h>
14 15
15#define BCM47XX_EXTIF_GPIO_LINES 5 16#define BCM47XX_EXTIF_GPIO_LINES 5
@@ -21,41 +22,118 @@ extern int gpio_to_irq(unsigned gpio);
21 22
22static inline int gpio_get_value(unsigned gpio) 23static inline int gpio_get_value(unsigned gpio)
23{ 24{
24 return ssb_gpio_in(&ssb_bcm47xx, 1 << gpio); 25 switch (bcm47xx_bus_type) {
26#ifdef CONFIG_BCM47XX_SSB
27 case BCM47XX_BUS_TYPE_SSB:
28 return ssb_gpio_in(&bcm47xx_bus.ssb, 1 << gpio);
29#endif
30#ifdef CONFIG_BCM47XX_BCMA
31 case BCM47XX_BUS_TYPE_BCMA:
32 return bcma_chipco_gpio_in(&bcm47xx_bus.bcma.bus.drv_cc,
33 1 << gpio);
34#endif
35 }
36 return -EINVAL;
25} 37}
26 38
27static inline void gpio_set_value(unsigned gpio, int value) 39static inline void gpio_set_value(unsigned gpio, int value)
28{ 40{
29 ssb_gpio_out(&ssb_bcm47xx, 1 << gpio, value ? 1 << gpio : 0); 41 switch (bcm47xx_bus_type) {
42#ifdef CONFIG_BCM47XX_SSB
43 case BCM47XX_BUS_TYPE_SSB:
44 ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio,
45 value ? 1 << gpio : 0);
46 return;
47#endif
48#ifdef CONFIG_BCM47XX_BCMA
49 case BCM47XX_BUS_TYPE_BCMA:
50 bcma_chipco_gpio_out(&bcm47xx_bus.bcma.bus.drv_cc, 1 << gpio,
51 value ? 1 << gpio : 0);
52 return;
53#endif
54 }
30} 55}
31 56
32static inline int gpio_direction_input(unsigned gpio) 57static inline int gpio_direction_input(unsigned gpio)
33{ 58{
34 ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 0); 59 switch (bcm47xx_bus_type) {
35 return 0; 60#ifdef CONFIG_BCM47XX_SSB
61 case BCM47XX_BUS_TYPE_SSB:
62 ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 0);
63 return 0;
64#endif
65#ifdef CONFIG_BCM47XX_BCMA
66 case BCM47XX_BUS_TYPE_BCMA:
67 bcma_chipco_gpio_outen(&bcm47xx_bus.bcma.bus.drv_cc, 1 << gpio,
68 0);
69 return 0;
70#endif
71 }
72 return -EINVAL;
36} 73}
37 74
38static inline int gpio_direction_output(unsigned gpio, int value) 75static inline int gpio_direction_output(unsigned gpio, int value)
39{ 76{
40 /* first set the gpio out value */ 77 switch (bcm47xx_bus_type) {
41 ssb_gpio_out(&ssb_bcm47xx, 1 << gpio, value ? 1 << gpio : 0); 78#ifdef CONFIG_BCM47XX_SSB
42 /* then set the gpio mode */ 79 case BCM47XX_BUS_TYPE_SSB:
43 ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 1 << gpio); 80 /* first set the gpio out value */
44 return 0; 81 ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio,
82 value ? 1 << gpio : 0);
83 /* then set the gpio mode */
84 ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 1 << gpio);
85 return 0;
86#endif
87#ifdef CONFIG_BCM47XX_BCMA
88 case BCM47XX_BUS_TYPE_BCMA:
89 /* first set the gpio out value */
90 bcma_chipco_gpio_out(&bcm47xx_bus.bcma.bus.drv_cc, 1 << gpio,
91 value ? 1 << gpio : 0);
92 /* then set the gpio mode */
93 bcma_chipco_gpio_outen(&bcm47xx_bus.bcma.bus.drv_cc, 1 << gpio,
94 1 << gpio);
95 return 0;
96#endif
97 }
98 return -EINVAL;
45} 99}
46 100
47static inline int gpio_intmask(unsigned gpio, int value) 101static inline int gpio_intmask(unsigned gpio, int value)
48{ 102{
49 ssb_gpio_intmask(&ssb_bcm47xx, 1 << gpio, 103 switch (bcm47xx_bus_type) {
50 value ? 1 << gpio : 0); 104#ifdef CONFIG_BCM47XX_SSB
51 return 0; 105 case BCM47XX_BUS_TYPE_SSB:
106 ssb_gpio_intmask(&bcm47xx_bus.ssb, 1 << gpio,
107 value ? 1 << gpio : 0);
108 return 0;
109#endif
110#ifdef CONFIG_BCM47XX_BCMA
111 case BCM47XX_BUS_TYPE_BCMA:
112 bcma_chipco_gpio_intmask(&bcm47xx_bus.bcma.bus.drv_cc,
113 1 << gpio, value ? 1 << gpio : 0);
114 return 0;
115#endif
116 }
117 return -EINVAL;
52} 118}
53 119
54static inline int gpio_polarity(unsigned gpio, int value) 120static inline int gpio_polarity(unsigned gpio, int value)
55{ 121{
56 ssb_gpio_polarity(&ssb_bcm47xx, 1 << gpio, 122 switch (bcm47xx_bus_type) {
57 value ? 1 << gpio : 0); 123#ifdef CONFIG_BCM47XX_SSB
58 return 0; 124 case BCM47XX_BUS_TYPE_SSB:
125 ssb_gpio_polarity(&bcm47xx_bus.ssb, 1 << gpio,
126 value ? 1 << gpio : 0);
127 return 0;
128#endif
129#ifdef CONFIG_BCM47XX_BCMA
130 case BCM47XX_BUS_TYPE_BCMA:
131 bcma_chipco_gpio_polarity(&bcm47xx_bus.bcma.bus.drv_cc,
132 1 << gpio, value ? 1 << gpio : 0);
133 return 0;
134#endif
135 }
136 return -EINVAL;
59} 137}
60 138
61 139
diff --git a/arch/mips/pci/pci-bcm47xx.c b/arch/mips/pci/pci-bcm47xx.c
index 455f8e50a007..400535a955d0 100644
--- a/arch/mips/pci/pci-bcm47xx.c
+++ b/arch/mips/pci/pci-bcm47xx.c
@@ -25,6 +25,7 @@
25#include <linux/types.h> 25#include <linux/types.h>
26#include <linux/pci.h> 26#include <linux/pci.h>
27#include <linux/ssb/ssb.h> 27#include <linux/ssb/ssb.h>
28#include <bcm47xx.h>
28 29
29int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 30int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
30{ 31{
@@ -33,9 +34,13 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
33 34
34int pcibios_plat_dev_init(struct pci_dev *dev) 35int pcibios_plat_dev_init(struct pci_dev *dev)
35{ 36{
37#ifdef CONFIG_BCM47XX_SSB
36 int res; 38 int res;
37 u8 slot, pin; 39 u8 slot, pin;
38 40
41 if (bcm47xx_bus_type != BCM47XX_BUS_TYPE_SSB)
42 return 0;
43
39 res = ssb_pcibios_plat_dev_init(dev); 44 res = ssb_pcibios_plat_dev_init(dev);
40 if (res < 0) { 45 if (res < 0) {
41 printk(KERN_ALERT "PCI: Failed to init device %s\n", 46 printk(KERN_ALERT "PCI: Failed to init device %s\n",
@@ -55,5 +60,6 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
55 } 60 }
56 61
57 dev->irq = res; 62 dev->irq = res;
63#endif
58 return 0; 64 return 0;
59} 65}
diff --git a/arch/mips/txx9/generic/setup_tx4939.c b/arch/mips/txx9/generic/setup_tx4939.c
index e9f95dcde379..ba3cec3155df 100644
--- a/arch/mips/txx9/generic/setup_tx4939.c
+++ b/arch/mips/txx9/generic/setup_tx4939.c
@@ -321,7 +321,7 @@ void __init tx4939_sio_init(unsigned int sclk, unsigned int cts_mask)
321static u32 tx4939_get_eth_speed(struct net_device *dev) 321static u32 tx4939_get_eth_speed(struct net_device *dev)
322{ 322{
323 struct ethtool_cmd cmd; 323 struct ethtool_cmd cmd;
324 if (dev_ethtool_get_settings(dev, &cmd)) 324 if (__ethtool_get_settings(dev, &cmd))
325 return 100; /* default 100Mbps */ 325 return 100; /* default 100Mbps */
326 326
327 return ethtool_cmd_speed(&cmd); 327 return ethtool_cmd_speed(&cmd);
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-10 02:42:23 -0500