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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2005-09-28 07:24:58 -0400
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 14:32:28 -0400
commit9043f7e95d104795fcb03a2f762524babcd49da5 (patch)
treecee4858eaee2579c061b3e8e52f88c557087d45b /arch/mips
parent9d58f302ca370c720fa47cb419f0b33eaa1a1132 (diff)
Sync c-tx39.c with c-r4k.c.
tx39_flush_cache_range() does nothing if !cpu_has_dc_aliases. It should flush d-cache and invalidate i-cache since the TX39(H2) has separate I/D cache. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/mm/c-tx39.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index 56c3fcdd2822..c3ba81dab31d 100644
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -167,15 +167,16 @@ static void tx39_flush_cache_mm(struct mm_struct *mm)
167static void tx39_flush_cache_range(struct vm_area_struct *vma, 167static void tx39_flush_cache_range(struct vm_area_struct *vma,
168 unsigned long start, unsigned long end) 168 unsigned long start, unsigned long end)
169{ 169{
170 struct mm_struct *mm = vma->vm_mm; 170 int exec;
171 171
172 if (!cpu_has_dc_aliases) 172 if (!(cpu_context(smp_processor_id(), vma->vm_mm)))
173 return; 173 return;
174 174
175 if (cpu_context(smp_processor_id(), mm) != 0) { 175 exec = vma->vm_flags & VM_EXEC;
176 if (cpu_has_dc_aliases || exec)
176 tx39_blast_dcache(); 177 tx39_blast_dcache();
178 if (exec)
177 tx39_blast_icache(); 179 tx39_blast_icache();
178 }
179} 180}
180 181
181static void tx39_flush_cache_page(struct vm_area_struct *vma, unsigned long page, unsigned long pfn) 182static void tx39_flush_cache_page(struct vm_area_struct *vma, unsigned long page, unsigned long pfn)