diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2008-09-01 09:22:40 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2008-10-11 11:18:49 -0400 |
commit | b27311e1cace4e296ace786c886d22f7a8ec78d6 (patch) | |
tree | 94d962590160c480f7ef4d0cbb8d43406d91ab1d /arch/mips | |
parent | 0dcdbe6add26719e956299eb519542f7d2f7d0a8 (diff) |
MIPS: TXx9: Add RBTX4939 board support
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
create mode 100644 arch/mips/txx9/rbtx4939/Makefile
create mode 100644 arch/mips/txx9/rbtx4939/irq.c
create mode 100644 arch/mips/txx9/rbtx4939/prom.c
create mode 100644 arch/mips/txx9/rbtx4939/setup.c
create mode 100644 include/asm-mips/txx9/rbtx4939.h
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/Makefile | 8 | ||||
-rw-r--r-- | arch/mips/txx9/Kconfig | 8 | ||||
-rw-r--r-- | arch/mips/txx9/generic/setup.c | 5 | ||||
-rw-r--r-- | arch/mips/txx9/rbtx4939/Makefile | 3 | ||||
-rw-r--r-- | arch/mips/txx9/rbtx4939/irq.c | 96 | ||||
-rw-r--r-- | arch/mips/txx9/rbtx4939/prom.c | 17 | ||||
-rw-r--r-- | arch/mips/txx9/rbtx4939/setup.c | 306 |
7 files changed, 437 insertions, 6 deletions
diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 9aab51caf16a..87f67228e309 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile | |||
@@ -567,15 +567,11 @@ cflags-$(CONFIG_MIKROTIK_RB532) += -Iinclude/asm-mips/mach-rc32434 | |||
567 | load-$(CONFIG_MIKROTIK_RB532) += 0xffffffff80101000 | 567 | load-$(CONFIG_MIKROTIK_RB532) += 0xffffffff80101000 |
568 | 568 | ||
569 | # | 569 | # |
570 | # Toshiba RBTX4927 board or | 570 | # Toshiba RBTX49XX boards |
571 | # Toshiba RBTX4937 board | ||
572 | # | 571 | # |
573 | core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/rbtx4927/ | 572 | core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/rbtx4927/ |
574 | |||
575 | # | ||
576 | # Toshiba RBTX4938 board | ||
577 | # | ||
578 | core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/rbtx4938/ | 573 | core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/rbtx4938/ |
574 | core-$(CONFIG_TOSHIBA_RBTX4939) += arch/mips/txx9/rbtx4939/ | ||
579 | 575 | ||
580 | cflags-y += -Iinclude/asm-mips/mach-generic | 576 | cflags-y += -Iinclude/asm-mips/mach-generic |
581 | drivers-$(CONFIG_PCI) += arch/mips/pci/ | 577 | drivers-$(CONFIG_PCI) += arch/mips/pci/ |
diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig index 58691a1fe779..17052db4161d 100644 --- a/arch/mips/txx9/Kconfig +++ b/arch/mips/txx9/Kconfig | |||
@@ -45,6 +45,14 @@ config TOSHIBA_RBTX4938 | |||
45 | This Toshiba board is based on the TX4938 processor. Say Y here to | 45 | This Toshiba board is based on the TX4938 processor. Say Y here to |
46 | support this machine type | 46 | support this machine type |
47 | 47 | ||
48 | config TOSHIBA_RBTX4939 | ||
49 | bool "Toshiba RBTX4939 bobard" | ||
50 | depends on MACH_TX49XX | ||
51 | select SOC_TX4939 | ||
52 | help | ||
53 | This Toshiba board is based on the TX4939 processor. Say Y here to | ||
54 | support this machine type | ||
55 | |||
48 | config SOC_TX3927 | 56 | config SOC_TX3927 |
49 | bool | 57 | bool |
50 | select CEVT_TXX9 | 58 | select CEVT_TXX9 |
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index 1ea06553a1e1..7a05c34c1dec 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c | |||
@@ -372,6 +372,11 @@ static void __init select_board(void) | |||
372 | txx9_board_vec = &rbtx4938_vec; | 372 | txx9_board_vec = &rbtx4938_vec; |
373 | break; | 373 | break; |
374 | #endif | 374 | #endif |
375 | #ifdef CONFIG_TOSHIBA_RBTX4939 | ||
376 | case 0x4939: | ||
377 | txx9_board_vec = &rbtx4939_vec; | ||
378 | break; | ||
379 | #endif | ||
375 | } | 380 | } |
376 | #endif | 381 | #endif |
377 | } | 382 | } |
diff --git a/arch/mips/txx9/rbtx4939/Makefile b/arch/mips/txx9/rbtx4939/Makefile new file mode 100644 index 000000000000..3232cd03a7d6 --- /dev/null +++ b/arch/mips/txx9/rbtx4939/Makefile | |||
@@ -0,0 +1,3 @@ | |||
1 | obj-y += irq.o setup.o prom.o | ||
2 | |||
3 | EXTRA_CFLAGS += -Werror | ||
diff --git a/arch/mips/txx9/rbtx4939/irq.c b/arch/mips/txx9/rbtx4939/irq.c new file mode 100644 index 000000000000..500cc0a908e6 --- /dev/null +++ b/arch/mips/txx9/rbtx4939/irq.c | |||
@@ -0,0 +1,96 @@ | |||
1 | /* | ||
2 | * Toshiba RBTX4939 interrupt routines | ||
3 | * Based on linux/arch/mips/txx9/rbtx4938/irq.c, | ||
4 | * and RBTX49xx patch from CELF patch archive. | ||
5 | * | ||
6 | * Copyright (C) 2000-2001,2005-2006 Toshiba Corporation | ||
7 | * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the | ||
8 | * terms of the GNU General Public License version 2. This program is | ||
9 | * licensed "as is" without any warranty of any kind, whether express | ||
10 | * or implied. | ||
11 | */ | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <asm/mipsregs.h> | ||
15 | #include <asm/txx9/rbtx4939.h> | ||
16 | |||
17 | /* | ||
18 | * RBTX4939 IOC controller definition | ||
19 | */ | ||
20 | |||
21 | static void rbtx4939_ioc_irq_unmask(unsigned int irq) | ||
22 | { | ||
23 | int ioc_nr = irq - RBTX4939_IRQ_IOC; | ||
24 | |||
25 | writeb(readb(rbtx4939_ien_addr) | (1 << ioc_nr), rbtx4939_ien_addr); | ||
26 | } | ||
27 | |||
28 | static void rbtx4939_ioc_irq_mask(unsigned int irq) | ||
29 | { | ||
30 | int ioc_nr = irq - RBTX4939_IRQ_IOC; | ||
31 | |||
32 | writeb(readb(rbtx4939_ien_addr) & ~(1 << ioc_nr), rbtx4939_ien_addr); | ||
33 | mmiowb(); | ||
34 | } | ||
35 | |||
36 | static struct irq_chip rbtx4939_ioc_irq_chip = { | ||
37 | .name = "IOC", | ||
38 | .ack = rbtx4939_ioc_irq_mask, | ||
39 | .mask = rbtx4939_ioc_irq_mask, | ||
40 | .mask_ack = rbtx4939_ioc_irq_mask, | ||
41 | .unmask = rbtx4939_ioc_irq_unmask, | ||
42 | }; | ||
43 | |||
44 | |||
45 | static inline int rbtx4939_ioc_irqroute(void) | ||
46 | { | ||
47 | unsigned char istat = readb(rbtx4939_ifac2_addr); | ||
48 | |||
49 | if (unlikely(istat == 0)) | ||
50 | return -1; | ||
51 | return RBTX4939_IRQ_IOC + __fls8(istat); | ||
52 | } | ||
53 | |||
54 | static int rbtx4939_irq_dispatch(int pending) | ||
55 | { | ||
56 | int irq; | ||
57 | |||
58 | if (pending & CAUSEF_IP7) | ||
59 | return MIPS_CPU_IRQ_BASE + 7; | ||
60 | irq = tx4939_irq(); | ||
61 | if (likely(irq >= 0)) { | ||
62 | /* redirect IOC interrupts */ | ||
63 | switch (irq) { | ||
64 | case RBTX4939_IRQ_IOCINT: | ||
65 | irq = rbtx4939_ioc_irqroute(); | ||
66 | break; | ||
67 | } | ||
68 | } else if (pending & CAUSEF_IP0) | ||
69 | irq = MIPS_CPU_IRQ_BASE + 0; | ||
70 | else if (pending & CAUSEF_IP1) | ||
71 | irq = MIPS_CPU_IRQ_BASE + 1; | ||
72 | else | ||
73 | irq = -1; | ||
74 | return irq; | ||
75 | } | ||
76 | |||
77 | void __init rbtx4939_irq_setup(void) | ||
78 | { | ||
79 | int i; | ||
80 | |||
81 | /* mask all IOC interrupts */ | ||
82 | writeb(0, rbtx4939_ien_addr); | ||
83 | |||
84 | /* clear SoftInt interrupts */ | ||
85 | writeb(0, rbtx4939_softint_addr); | ||
86 | |||
87 | txx9_irq_dispatch = rbtx4939_irq_dispatch; | ||
88 | |||
89 | tx4939_irq_init(); | ||
90 | for (i = RBTX4939_IRQ_IOC; | ||
91 | i < RBTX4939_IRQ_IOC + RBTX4939_NR_IRQ_IOC; i++) | ||
92 | set_irq_chip_and_handler(i, &rbtx4939_ioc_irq_chip, | ||
93 | handle_level_irq); | ||
94 | |||
95 | set_irq_chained_handler(RBTX4939_IRQ_IOCINT, handle_simple_irq); | ||
96 | } | ||
diff --git a/arch/mips/txx9/rbtx4939/prom.c b/arch/mips/txx9/rbtx4939/prom.c new file mode 100644 index 000000000000..bd277ecb4ad6 --- /dev/null +++ b/arch/mips/txx9/rbtx4939/prom.c | |||
@@ -0,0 +1,17 @@ | |||
1 | /* | ||
2 | * rbtx4939 specific prom routines | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #include <linux/init.h> | ||
10 | #include <asm/txx9/generic.h> | ||
11 | #include <asm/txx9/rbtx4939.h> | ||
12 | |||
13 | void __init rbtx4939_prom_init(void) | ||
14 | { | ||
15 | tx4939_add_memory_regions(); | ||
16 | txx9_sio_putchar_init(TX4939_SIO_REG(0) & 0xfffffffffULL); | ||
17 | } | ||
diff --git a/arch/mips/txx9/rbtx4939/setup.c b/arch/mips/txx9/rbtx4939/setup.c new file mode 100644 index 000000000000..277864d5e779 --- /dev/null +++ b/arch/mips/txx9/rbtx4939/setup.c | |||
@@ -0,0 +1,306 @@ | |||
1 | /* | ||
2 | * Toshiba RBTX4939 setup routines. | ||
3 | * Based on linux/arch/mips/txx9/rbtx4938/setup.c, | ||
4 | * and RBTX49xx patch from CELF patch archive. | ||
5 | * | ||
6 | * Copyright (C) 2000-2001,2005-2007 Toshiba Corporation | ||
7 | * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the | ||
8 | * terms of the GNU General Public License version 2. This program is | ||
9 | * licensed "as is" without any warranty of any kind, whether express | ||
10 | * or implied. | ||
11 | */ | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/types.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/leds.h> | ||
17 | #include <asm/reboot.h> | ||
18 | #include <asm/txx9/generic.h> | ||
19 | #include <asm/txx9/pci.h> | ||
20 | #include <asm/txx9/rbtx4939.h> | ||
21 | |||
22 | static void rbtx4939_machine_restart(char *command) | ||
23 | { | ||
24 | local_irq_disable(); | ||
25 | writeb(1, rbtx4939_reseten_addr); | ||
26 | writeb(1, rbtx4939_softreset_addr); | ||
27 | while (1) | ||
28 | ; | ||
29 | } | ||
30 | |||
31 | static void __init rbtx4939_time_init(void) | ||
32 | { | ||
33 | tx4939_time_init(0); | ||
34 | } | ||
35 | |||
36 | static void __init rbtx4939_pci_setup(void) | ||
37 | { | ||
38 | #ifdef CONFIG_PCI | ||
39 | int extarb = !(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCIARB); | ||
40 | struct pci_controller *c = &txx9_primary_pcic; | ||
41 | |||
42 | register_pci_controller(c); | ||
43 | |||
44 | tx4939_report_pciclk(); | ||
45 | tx4927_pcic_setup(tx4939_pcicptr, c, extarb); | ||
46 | if (!(__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_ATA1MODE) && | ||
47 | (__raw_readq(&tx4939_ccfgptr->pcfg) & | ||
48 | (TX4939_PCFG_ET0MODE | TX4939_PCFG_ET1MODE))) { | ||
49 | tx4939_report_pci1clk(); | ||
50 | |||
51 | /* mem:64K(max), io:64K(max) (enough for ETH0,ETH1) */ | ||
52 | c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000); | ||
53 | register_pci_controller(c); | ||
54 | tx4927_pcic_setup(tx4939_pcic1ptr, c, 0); | ||
55 | } | ||
56 | |||
57 | tx4939_setup_pcierr_irq(); | ||
58 | #endif /* CONFIG_PCI */ | ||
59 | } | ||
60 | |||
61 | static unsigned long long default_ebccr[] __initdata = { | ||
62 | 0x01c0000000007608ULL, /* 64M ROM */ | ||
63 | 0x017f000000007049ULL, /* 1M IOC */ | ||
64 | 0x0180000000408608ULL, /* ISA */ | ||
65 | 0, | ||
66 | }; | ||
67 | |||
68 | static void __init rbtx4939_ebusc_setup(void) | ||
69 | { | ||
70 | int i; | ||
71 | unsigned int sp; | ||
72 | |||
73 | /* use user-configured speed */ | ||
74 | sp = TX4939_EBUSC_CR(0) & 0x30; | ||
75 | default_ebccr[0] |= sp; | ||
76 | default_ebccr[1] |= sp; | ||
77 | default_ebccr[2] |= sp; | ||
78 | /* initialise by myself */ | ||
79 | for (i = 0; i < ARRAY_SIZE(default_ebccr); i++) { | ||
80 | if (default_ebccr[i]) | ||
81 | ____raw_writeq(default_ebccr[i], | ||
82 | &tx4939_ebuscptr->cr[i]); | ||
83 | else | ||
84 | ____raw_writeq(____raw_readq(&tx4939_ebuscptr->cr[i]) | ||
85 | & ~8, | ||
86 | &tx4939_ebuscptr->cr[i]); | ||
87 | } | ||
88 | } | ||
89 | |||
90 | static void __init rbtx4939_update_ioc_pen(void) | ||
91 | { | ||
92 | __u64 pcfg = ____raw_readq(&tx4939_ccfgptr->pcfg); | ||
93 | __u64 ccfg = ____raw_readq(&tx4939_ccfgptr->ccfg); | ||
94 | __u8 pe1 = readb(rbtx4939_pe1_addr); | ||
95 | __u8 pe2 = readb(rbtx4939_pe2_addr); | ||
96 | __u8 pe3 = readb(rbtx4939_pe3_addr); | ||
97 | if (pcfg & TX4939_PCFG_ATA0MODE) | ||
98 | pe1 |= RBTX4939_PE1_ATA(0); | ||
99 | else | ||
100 | pe1 &= ~RBTX4939_PE1_ATA(0); | ||
101 | if (pcfg & TX4939_PCFG_ATA1MODE) { | ||
102 | pe1 |= RBTX4939_PE1_ATA(1); | ||
103 | pe1 &= ~(RBTX4939_PE1_RMII(0) | RBTX4939_PE1_RMII(1)); | ||
104 | } else { | ||
105 | pe1 &= ~RBTX4939_PE1_ATA(1); | ||
106 | if (pcfg & TX4939_PCFG_ET0MODE) | ||
107 | pe1 |= RBTX4939_PE1_RMII(0); | ||
108 | else | ||
109 | pe1 &= ~RBTX4939_PE1_RMII(0); | ||
110 | if (pcfg & TX4939_PCFG_ET1MODE) | ||
111 | pe1 |= RBTX4939_PE1_RMII(1); | ||
112 | else | ||
113 | pe1 &= ~RBTX4939_PE1_RMII(1); | ||
114 | } | ||
115 | if (ccfg & TX4939_CCFG_PTSEL) | ||
116 | pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P | | ||
117 | RBTX4939_PE3_VP_S); | ||
118 | else { | ||
119 | __u64 vmode = pcfg & | ||
120 | (TX4939_PCFG_VSSMODE | TX4939_PCFG_VPSMODE); | ||
121 | if (vmode == 0) | ||
122 | pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P | | ||
123 | RBTX4939_PE3_VP_S); | ||
124 | else if (vmode == TX4939_PCFG_VPSMODE) { | ||
125 | pe3 |= RBTX4939_PE3_VP_P; | ||
126 | pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_S); | ||
127 | } else if (vmode == TX4939_PCFG_VSSMODE) { | ||
128 | pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_S; | ||
129 | pe3 &= ~RBTX4939_PE3_VP_P; | ||
130 | } else { | ||
131 | pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_P; | ||
132 | pe3 &= ~RBTX4939_PE3_VP_S; | ||
133 | } | ||
134 | } | ||
135 | if (pcfg & TX4939_PCFG_SPIMODE) { | ||
136 | if (pcfg & TX4939_PCFG_SIO2MODE_GPIO) | ||
137 | pe2 &= ~(RBTX4939_PE2_SIO2 | RBTX4939_PE2_SIO0); | ||
138 | else { | ||
139 | if (pcfg & TX4939_PCFG_SIO2MODE_SIO2) { | ||
140 | pe2 |= RBTX4939_PE2_SIO2; | ||
141 | pe2 &= ~RBTX4939_PE2_SIO0; | ||
142 | } else { | ||
143 | pe2 |= RBTX4939_PE2_SIO0; | ||
144 | pe2 &= ~RBTX4939_PE2_SIO2; | ||
145 | } | ||
146 | } | ||
147 | if (pcfg & TX4939_PCFG_SIO3MODE) | ||
148 | pe2 |= RBTX4939_PE2_SIO3; | ||
149 | else | ||
150 | pe2 &= ~RBTX4939_PE2_SIO3; | ||
151 | pe2 &= ~RBTX4939_PE2_SPI; | ||
152 | } else { | ||
153 | pe2 |= RBTX4939_PE2_SPI; | ||
154 | pe2 &= ~(RBTX4939_PE2_SIO3 | RBTX4939_PE2_SIO2 | | ||
155 | RBTX4939_PE2_SIO0); | ||
156 | } | ||
157 | if ((pcfg & TX4939_PCFG_I2SMODE_MASK) == TX4939_PCFG_I2SMODE_GPIO) | ||
158 | pe2 |= RBTX4939_PE2_GPIO; | ||
159 | else | ||
160 | pe2 &= ~RBTX4939_PE2_GPIO; | ||
161 | writeb(pe1, rbtx4939_pe1_addr); | ||
162 | writeb(pe2, rbtx4939_pe2_addr); | ||
163 | writeb(pe3, rbtx4939_pe3_addr); | ||
164 | } | ||
165 | |||
166 | #define RBTX4939_MAX_7SEGLEDS 8 | ||
167 | |||
168 | #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE) | ||
169 | static u8 led_val[RBTX4939_MAX_7SEGLEDS]; | ||
170 | struct rbtx4939_led_data { | ||
171 | struct led_classdev cdev; | ||
172 | char name[32]; | ||
173 | unsigned int num; | ||
174 | }; | ||
175 | |||
176 | /* Use "dot" in 7seg LEDs */ | ||
177 | static void rbtx4939_led_brightness_set(struct led_classdev *led_cdev, | ||
178 | enum led_brightness value) | ||
179 | { | ||
180 | struct rbtx4939_led_data *led_dat = | ||
181 | container_of(led_cdev, struct rbtx4939_led_data, cdev); | ||
182 | unsigned int num = led_dat->num; | ||
183 | unsigned long flags; | ||
184 | |||
185 | local_irq_save(flags); | ||
186 | led_val[num] = (led_val[num] & 0x7f) | (value ? 0x80 : 0); | ||
187 | writeb(led_val[num], rbtx4939_7seg_addr(num / 4, num % 4)); | ||
188 | local_irq_restore(flags); | ||
189 | } | ||
190 | |||
191 | static int __init rbtx4939_led_probe(struct platform_device *pdev) | ||
192 | { | ||
193 | struct rbtx4939_led_data *leds_data; | ||
194 | int i; | ||
195 | static char *default_triggers[] __initdata = { | ||
196 | "heartbeat", | ||
197 | "ide-disk", | ||
198 | "nand-disk", | ||
199 | }; | ||
200 | |||
201 | leds_data = kzalloc(sizeof(*leds_data) * RBTX4939_MAX_7SEGLEDS, | ||
202 | GFP_KERNEL); | ||
203 | if (!leds_data) | ||
204 | return -ENOMEM; | ||
205 | for (i = 0; i < RBTX4939_MAX_7SEGLEDS; i++) { | ||
206 | int rc; | ||
207 | struct rbtx4939_led_data *led_dat = &leds_data[i]; | ||
208 | |||
209 | led_dat->num = i; | ||
210 | led_dat->cdev.brightness_set = rbtx4939_led_brightness_set; | ||
211 | sprintf(led_dat->name, "rbtx4939:amber:%u", i); | ||
212 | led_dat->cdev.name = led_dat->name; | ||
213 | if (i < ARRAY_SIZE(default_triggers)) | ||
214 | led_dat->cdev.default_trigger = default_triggers[i]; | ||
215 | rc = led_classdev_register(&pdev->dev, &led_dat->cdev); | ||
216 | if (rc < 0) | ||
217 | return rc; | ||
218 | led_dat->cdev.brightness_set(&led_dat->cdev, 0); | ||
219 | } | ||
220 | return 0; | ||
221 | |||
222 | } | ||
223 | |||
224 | static struct platform_driver rbtx4939_led_driver = { | ||
225 | .driver = { | ||
226 | .name = "rbtx4939-led", | ||
227 | .owner = THIS_MODULE, | ||
228 | }, | ||
229 | }; | ||
230 | |||
231 | static void __init rbtx4939_led_setup(void) | ||
232 | { | ||
233 | platform_device_register_simple("rbtx4939-led", -1, NULL, 0); | ||
234 | platform_driver_probe(&rbtx4939_led_driver, rbtx4939_led_probe); | ||
235 | } | ||
236 | #else | ||
237 | static inline void rbtx4939_led_setup(void) | ||
238 | { | ||
239 | } | ||
240 | #endif | ||
241 | |||
242 | static void __init rbtx4939_arch_init(void) | ||
243 | { | ||
244 | rbtx4939_pci_setup(); | ||
245 | } | ||
246 | |||
247 | static void __init rbtx4939_device_init(void) | ||
248 | { | ||
249 | #if defined(CONFIG_TC35815) || defined(CONFIG_TC35815_MODULE) | ||
250 | int i, j; | ||
251 | unsigned char ethaddr[2][6]; | ||
252 | for (i = 0; i < 2; i++) { | ||
253 | unsigned long area = CKSEG1 + 0x1fff0000 + (i * 0x10); | ||
254 | if (readb(rbtx4939_bdipsw_addr) & 8) { | ||
255 | u16 buf[3]; | ||
256 | area -= 0x03000000; | ||
257 | for (j = 0; j < 3; j++) | ||
258 | buf[j] = le16_to_cpup((u16 *)(area + j * 2)); | ||
259 | memcpy(ethaddr[i], buf, 6); | ||
260 | } else | ||
261 | memcpy(ethaddr[i], (void *)area, 6); | ||
262 | } | ||
263 | tx4939_ethaddr_init(ethaddr[0], ethaddr[1]); | ||
264 | #endif | ||
265 | rbtx4939_led_setup(); | ||
266 | tx4939_wdt_init(); | ||
267 | } | ||
268 | |||
269 | static void __init rbtx4939_setup(void) | ||
270 | { | ||
271 | rbtx4939_ebusc_setup(); | ||
272 | /* always enable ATA0 */ | ||
273 | txx9_set64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_ATA0MODE); | ||
274 | rbtx4939_update_ioc_pen(); | ||
275 | if (txx9_master_clock == 0) | ||
276 | txx9_master_clock = 20000000; | ||
277 | tx4939_setup(); | ||
278 | |||
279 | _machine_restart = rbtx4939_machine_restart; | ||
280 | |||
281 | pr_info("RBTX4939 (Rev %02x) --- FPGA(Rev %02x) DIPSW:%02x,%02x\n", | ||
282 | readb(rbtx4939_board_rev_addr), readb(rbtx4939_ioc_rev_addr), | ||
283 | readb(rbtx4939_udipsw_addr), readb(rbtx4939_bdipsw_addr)); | ||
284 | |||
285 | #ifdef CONFIG_PCI | ||
286 | txx9_alloc_pci_controller(&txx9_primary_pcic, 0, 0, 0, 0); | ||
287 | txx9_board_pcibios_setup = tx4927_pcibios_setup; | ||
288 | #else | ||
289 | set_io_port_base(RBTX4939_ETHER_BASE); | ||
290 | #endif | ||
291 | |||
292 | tx4939_sio_init(TX4939_SCLK0(txx9_master_clock), 0); | ||
293 | } | ||
294 | |||
295 | struct txx9_board_vec rbtx4939_vec __initdata = { | ||
296 | .system = "Tothiba RBTX4939", | ||
297 | .prom_init = rbtx4939_prom_init, | ||
298 | .mem_setup = rbtx4939_setup, | ||
299 | .irq_setup = rbtx4939_irq_setup, | ||
300 | .time_init = rbtx4939_time_init, | ||
301 | .device_init = rbtx4939_device_init, | ||
302 | .arch_init = rbtx4939_arch_init, | ||
303 | #ifdef CONFIG_PCI | ||
304 | .pci_map_irq = tx4939_pci_map_irq, | ||
305 | #endif | ||
306 | }; | ||