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authorJohn Crispin <blogic@openwrt.org>2012-04-13 14:56:13 -0400
committerRalf Baechle <ralf@linux-mips.org>2012-05-21 09:31:49 -0400
commita0392222d9a374588803454c4d2211108c64d4e4 (patch)
treebad591d5d0d2015f50084b8c5c2480c098def308 /arch/mips
parentcd93b4895ea51dcd15c96801aa21e71f793e3af3 (diff)
OF: MIPS: lantiq: implement OF support
Activate USE_OF, add a sample DTS file and convert the core soc code to OF. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3803/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kconfig1
-rw-r--r--arch/mips/lantiq/Kconfig9
-rw-r--r--arch/mips/lantiq/Makefile4
-rw-r--r--arch/mips/lantiq/dts/Makefile4
-rw-r--r--arch/mips/lantiq/dts/danube.dtsi105
-rw-r--r--arch/mips/lantiq/dts/easy50712.dts113
-rw-r--r--arch/mips/lantiq/prom.c57
-rw-r--r--arch/mips/lantiq/prom.h2
-rw-r--r--arch/mips/lantiq/setup.c43
-rw-r--r--arch/mips/lantiq/xway/ebu.c4
-rw-r--r--arch/mips/lantiq/xway/reset.c29
11 files changed, 294 insertions, 77 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7c855623a0f9..fbb56394c675 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -229,6 +229,7 @@ config LANTIQ
229 select SWAP_IO_SPACE 229 select SWAP_IO_SPACE
230 select BOOT_RAW 230 select BOOT_RAW
231 select HAVE_CLK 231 select HAVE_CLK
232 select USE_OF
232 233
233config LASAT 234config LASAT
234 bool "LASAT Networks platforms" 235 bool "LASAT Networks platforms"
diff --git a/arch/mips/lantiq/Kconfig b/arch/mips/lantiq/Kconfig
index 2780461e3258..9485fe54752b 100644
--- a/arch/mips/lantiq/Kconfig
+++ b/arch/mips/lantiq/Kconfig
@@ -18,4 +18,13 @@ config SOC_XWAY
18 select HW_HAS_PCI 18 select HW_HAS_PCI
19endchoice 19endchoice
20 20
21
22choice
23 prompt "Devicetree"
24
25config DT_EASY50712
26 bool "Easy50712"
27 depends on SOC_XWAY
28endchoice
29
21endif 30endif
diff --git a/arch/mips/lantiq/Makefile b/arch/mips/lantiq/Makefile
index a268391eb45e..16f1c758616b 100644
--- a/arch/mips/lantiq/Makefile
+++ b/arch/mips/lantiq/Makefile
@@ -4,7 +4,9 @@
4# under the terms of the GNU General Public License version 2 as published 4# under the terms of the GNU General Public License version 2 as published
5# by the Free Software Foundation. 5# by the Free Software Foundation.
6 6
7obj-y := irq.o setup.o clk.o prom.o 7obj-y := irq.o clk.o prom.o
8
9obj-y += dts/
8 10
9obj-$(CONFIG_EARLY_PRINTK) += early_printk.o 11obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
10 12
diff --git a/arch/mips/lantiq/dts/Makefile b/arch/mips/lantiq/dts/Makefile
new file mode 100644
index 000000000000..674fca45f72d
--- /dev/null
+++ b/arch/mips/lantiq/dts/Makefile
@@ -0,0 +1,4 @@
1obj-$(CONFIG_DT_EASY50712) := easy50712.dtb.o
2
3$(obj)/%.dtb: $(obj)/%.dts
4 $(call if_changed,dtc)
diff --git a/arch/mips/lantiq/dts/danube.dtsi b/arch/mips/lantiq/dts/danube.dtsi
new file mode 100644
index 000000000000..3a4520f009cf
--- /dev/null
+++ b/arch/mips/lantiq/dts/danube.dtsi
@@ -0,0 +1,105 @@
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "lantiq,xway", "lantiq,danube";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips24Kc";
9 };
10 };
11
12 biu@1F800000 {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "lantiq,biu", "simple-bus";
16 reg = <0x1F800000 0x800000>;
17 ranges = <0x0 0x1F800000 0x7FFFFF>;
18
19 icu0: icu@80200 {
20 #interrupt-cells = <1>;
21 interrupt-controller;
22 compatible = "lantiq,icu";
23 reg = <0x80200 0x120>;
24 };
25
26 watchdog@803F0 {
27 compatible = "lantiq,wdt";
28 reg = <0x803F0 0x10>;
29 };
30 };
31
32 sram@1F000000 {
33 #address-cells = <1>;
34 #size-cells = <1>;
35 compatible = "lantiq,sram";
36 reg = <0x1F000000 0x800000>;
37 ranges = <0x0 0x1F000000 0x7FFFFF>;
38
39 eiu0: eiu@101000 {
40 #interrupt-cells = <1>;
41 interrupt-controller;
42 interrupt-parent;
43 compatible = "lantiq,eiu-xway";
44 reg = <0x101000 0x1000>;
45 };
46
47 pmu0: pmu@102000 {
48 compatible = "lantiq,pmu-xway";
49 reg = <0x102000 0x1000>;
50 };
51
52 cgu0: cgu@103000 {
53 compatible = "lantiq,cgu-xway";
54 reg = <0x103000 0x1000>;
55 #clock-cells = <1>;
56 };
57
58 rcu0: rcu@203000 {
59 compatible = "lantiq,rcu-xway";
60 reg = <0x203000 0x1000>;
61 };
62 };
63
64 fpi@10000000 {
65 #address-cells = <1>;
66 #size-cells = <1>;
67 compatible = "lantiq,fpi", "simple-bus";
68 ranges = <0x0 0x10000000 0xEEFFFFF>;
69 reg = <0x10000000 0xEF00000>;
70
71 gptu@E100A00 {
72 compatible = "lantiq,gptu-xway";
73 reg = <0xE100A00 0x100>;
74 };
75
76 serial@E100C00 {
77 compatible = "lantiq,asc";
78 reg = <0xE100C00 0x400>;
79 interrupt-parent = <&icu0>;
80 interrupts = <112 113 114>;
81 };
82
83 dma0: dma@E104100 {
84 compatible = "lantiq,dma-xway";
85 reg = <0xE104100 0x800>;
86 };
87
88 ebu0: ebu@E105300 {
89 compatible = "lantiq,ebu-xway";
90 reg = <0xE105300 0x100>;
91 };
92
93 pci0: pci@E105400 {
94 #address-cells = <3>;
95 #size-cells = <2>;
96 #interrupt-cells = <1>;
97 compatible = "lantiq,pci-xway";
98 bus-range = <0x0 0x0>;
99 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
100 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
101 reg = <0x7000000 0x8000 /* config space */
102 0xE105400 0x400>; /* pci bridge */
103 };
104 };
105};
diff --git a/arch/mips/lantiq/dts/easy50712.dts b/arch/mips/lantiq/dts/easy50712.dts
new file mode 100644
index 000000000000..68c17310bc82
--- /dev/null
+++ b/arch/mips/lantiq/dts/easy50712.dts
@@ -0,0 +1,113 @@
1/dts-v1/;
2
3/include/ "danube.dtsi"
4
5/ {
6 chosen {
7 bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
8 };
9
10 memory@0 {
11 reg = <0x0 0x2000000>;
12 };
13
14 fpi@10000000 {
15 #address-cells = <1>;
16 #size-cells = <1>;
17 localbus@0 {
18 #address-cells = <2>;
19 #size-cells = <1>;
20 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
21 1 0 0x4000000 0x4000010>; /* addsel1 */
22 compatible = "lantiq,localbus", "simple-bus";
23
24 nor-boot@0 {
25 compatible = "lantiq,nor";
26 bank-width = <2>;
27 reg = <0 0x0 0x2000000>;
28 #address-cells = <1>;
29 #size-cells = <1>;
30
31 partition@0 {
32 label = "uboot";
33 reg = <0x00000 0x10000>; /* 64 KB */
34 };
35
36 partition@10000 {
37 label = "uboot_env";
38 reg = <0x10000 0x10000>; /* 64 KB */
39 };
40
41 partition@20000 {
42 label = "linux";
43 reg = <0x20000 0x3d0000>;
44 };
45
46 partition@400000 {
47 label = "rootfs";
48 reg = <0x400000 0x400000>;
49 };
50 };
51 };
52
53 gpio: pinmux@E100B10 {
54 compatible = "lantiq,pinctrl-xway";
55 pinctrl-names = "default";
56 pinctrl-0 = <&state_default>;
57
58 #gpio-cells = <2>;
59 gpio-controller;
60 reg = <0xE100B10 0xA0>;
61
62 state_default: pinmux {
63 stp {
64 lantiq,groups = "stp";
65 lantiq,function = "stp";
66 };
67 exin {
68 lantiq,groups = "exin1";
69 lantiq,function = "exin";
70 };
71 pci {
72 lantiq,groups = "gnt1";
73 lantiq,function = "pci";
74 };
75 conf_out {
76 lantiq,pins = "io4", "io5", "io6"; /* stp */
77 lantiq,open-drain;
78 lantiq,pull = <0>;
79 };
80 };
81 };
82
83 etop@E180000 {
84 compatible = "lantiq,etop-xway";
85 reg = <0xE180000 0x40000>;
86 interrupt-parent = <&icu0>;
87 interrupts = <73 78>;
88 phy-mode = "rmii";
89 mac-address = [ 00 11 22 33 44 55 ];
90 };
91
92 stp0: stp@E100BB0 {
93 #gpio-cells = <2>;
94 compatible = "lantiq,gpio-stp-xway";
95 gpio-controller;
96 reg = <0xE100BB0 0x40>;
97
98 lantiq,shadow = <0xfff>;
99 lantiq,groups = <0x3>;
100 };
101
102 pci@E105400 {
103 lantiq,bus-clock = <33333333>;
104 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
105 interrupt-map = <
106 0x7000 0 0 1 &icu0 29 1 // slot 14, irq 29
107 >;
108 gpios-reset = <&gpio 21 0>;
109 req-mask = <0x1>; /* GNT1 */
110 };
111
112 };
113};
diff --git a/arch/mips/lantiq/prom.c b/arch/mips/lantiq/prom.c
index cd568921f191..413ed53a4ae1 100644
--- a/arch/mips/lantiq/prom.c
+++ b/arch/mips/lantiq/prom.c
@@ -8,6 +8,7 @@
8 8
9#include <linux/export.h> 9#include <linux/export.h>
10#include <linux/clk.h> 10#include <linux/clk.h>
11#include <linux/of_platform.h>
11#include <asm/bootinfo.h> 12#include <asm/bootinfo.h>
12#include <asm/time.h> 13#include <asm/time.h>
13 14
@@ -16,13 +17,15 @@
16#include "prom.h" 17#include "prom.h"
17#include "clk.h" 18#include "clk.h"
18 19
19static struct ltq_soc_info soc_info; 20/* access to the ebu needs to be locked between different drivers */
21DEFINE_SPINLOCK(ebu_lock);
22EXPORT_SYMBOL_GPL(ebu_lock);
20 23
21unsigned int ltq_get_cpu_ver(void) 24/*
22{ 25 * this struct is filled by the soc specific detection code and holds
23 return soc_info.rev; 26 * information about the specific soc type, revision and name
24} 27 */
25EXPORT_SYMBOL(ltq_get_cpu_ver); 28static struct ltq_soc_info soc_info;
26 29
27unsigned int ltq_get_soc_type(void) 30unsigned int ltq_get_soc_type(void)
28{ 31{
@@ -57,16 +60,28 @@ static void __init prom_init_cmdline(void)
57 } 60 }
58} 61}
59 62
60void __init prom_init(void) 63void __init plat_mem_setup(void)
61{ 64{
62 struct clk *clk; 65 ioport_resource.start = IOPORT_RESOURCE_START;
66 ioport_resource.end = IOPORT_RESOURCE_END;
67 iomem_resource.start = IOMEM_RESOURCE_START;
68 iomem_resource.end = IOMEM_RESOURCE_END;
69
70 set_io_port_base((unsigned long) KSEG1);
71
72 /*
73 * Load the builtin devicetree. This causes the chosen node to be
74 * parsed resulting in our memory appearing
75 */
76 __dt_setup_arch(&__dtb_start);
77}
63 78
79void __init prom_init(void)
80{
81 /* call the soc specific detetcion code and get it to fill soc_info */
64 ltq_soc_detect(&soc_info); 82 ltq_soc_detect(&soc_info);
65 clk_init(); 83 snprintf(soc_info.sys_type, LTQ_SYS_TYPE_LEN - 1, "%s rev %s",
66 clk = clk_get(0, "cpu"); 84 soc_info.name, soc_info.rev_type);
67 snprintf(soc_info.sys_type, LTQ_SYS_TYPE_LEN - 1, "%s rev1.%d",
68 soc_info.name, soc_info.rev);
69 clk_put(clk);
70 soc_info.sys_type[LTQ_SYS_TYPE_LEN - 1] = '\0'; 85 soc_info.sys_type[LTQ_SYS_TYPE_LEN - 1] = '\0';
71 pr_info("SoC: %s\n", soc_info.sys_type); 86 pr_info("SoC: %s\n", soc_info.sys_type);
72 prom_init_cmdline(); 87 prom_init_cmdline();
@@ -76,3 +91,19 @@ void __init prom_init(void)
76 panic("failed to register_vsmp_smp_ops()"); 91 panic("failed to register_vsmp_smp_ops()");
77#endif 92#endif
78} 93}
94
95int __init plat_of_setup(void)
96{
97 static struct of_device_id of_ids[3];
98
99 if (!of_have_populated_dt())
100 panic("device tree not present");
101
102 strncpy(of_ids[0].compatible, soc_info.compatible,
103 sizeof(of_ids[0].compatible));
104 strncpy(of_ids[1].compatible, "simple-bus",
105 sizeof(of_ids[1].compatible));
106 return of_platform_bus_probe(NULL, of_ids, NULL);
107}
108
109arch_initcall(plat_of_setup);
diff --git a/arch/mips/lantiq/prom.h b/arch/mips/lantiq/prom.h
index f7c2a7984db7..a3fa1a2bfaae 100644
--- a/arch/mips/lantiq/prom.h
+++ b/arch/mips/lantiq/prom.h
@@ -26,4 +26,6 @@ struct ltq_soc_info {
26extern void ltq_soc_detect(struct ltq_soc_info *i); 26extern void ltq_soc_detect(struct ltq_soc_info *i);
27extern void ltq_soc_init(void); 27extern void ltq_soc_init(void);
28 28
29extern struct boot_param_header __dtb_start;
30
29#endif 31#endif
diff --git a/arch/mips/lantiq/setup.c b/arch/mips/lantiq/setup.c
deleted file mode 100644
index f1c605ab8081..000000000000
--- a/arch/mips/lantiq/setup.c
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
5 *
6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7 */
8
9#include <linux/kernel.h>
10#include <linux/export.h>
11#include <linux/io.h>
12#include <linux/ioport.h>
13#include <asm/bootinfo.h>
14
15#include <lantiq_soc.h>
16
17#include "prom.h"
18
19void __init plat_mem_setup(void)
20{
21 /* assume 16M as default incase uboot fails to pass proper ramsize */
22 unsigned long memsize = 16;
23 char **envp = (char **) KSEG1ADDR(fw_arg2);
24
25 ioport_resource.start = IOPORT_RESOURCE_START;
26 ioport_resource.end = IOPORT_RESOURCE_END;
27 iomem_resource.start = IOMEM_RESOURCE_START;
28 iomem_resource.end = IOMEM_RESOURCE_END;
29
30 set_io_port_base((unsigned long) KSEG1);
31
32 while (*envp) {
33 char *e = (char *)KSEG1ADDR(*envp);
34 if (!strncmp(e, "memsize=", 8)) {
35 e += 8;
36 if (strict_strtoul(e, 0, &memsize))
37 pr_warn("bad memsize specified\n");
38 }
39 envp++;
40 }
41 memsize *= 1024 * 1024;
42 add_memory_region(0x00000000, memsize, BOOT_MEM_RAM);
43}
diff --git a/arch/mips/lantiq/xway/ebu.c b/arch/mips/lantiq/xway/ebu.c
index 862e3e830680..419b47b70f32 100644
--- a/arch/mips/lantiq/xway/ebu.c
+++ b/arch/mips/lantiq/xway/ebu.c
@@ -14,10 +14,6 @@
14 14
15#include <lantiq_soc.h> 15#include <lantiq_soc.h>
16 16
17/* all access to the ebu must be locked */
18DEFINE_SPINLOCK(ebu_lock);
19EXPORT_SYMBOL_GPL(ebu_lock);
20
21static struct resource ltq_ebu_resource = { 17static struct resource ltq_ebu_resource = {
22 .name = "ebu", 18 .name = "ebu",
23 .start = LTQ_EBU_BASE_ADDR, 19 .start = LTQ_EBU_BASE_ADDR,
diff --git a/arch/mips/lantiq/xway/reset.c b/arch/mips/lantiq/xway/reset.c
index 3327211746ac..22c55f73aa9d 100644
--- a/arch/mips/lantiq/xway/reset.c
+++ b/arch/mips/lantiq/xway/reset.c
@@ -37,13 +37,6 @@
37#define RCU_BOOT_SEL_SHIFT 26 37#define RCU_BOOT_SEL_SHIFT 26
38#define RCU_BOOT_SEL_MASK 0x7 38#define RCU_BOOT_SEL_MASK 0x7
39 39
40static struct resource ltq_rcu_resource = {
41 .name = "rcu",
42 .start = LTQ_RCU_BASE_ADDR,
43 .end = LTQ_RCU_BASE_ADDR + LTQ_RCU_SIZE - 1,
44 .flags = IORESOURCE_MEM,
45};
46
47/* remapped base addr of the reset control unit */ 40/* remapped base addr of the reset control unit */
48static void __iomem *ltq_rcu_membase; 41static void __iomem *ltq_rcu_membase;
49 42
@@ -91,17 +84,21 @@ static void ltq_machine_power_off(void)
91 84
92static int __init mips_reboot_setup(void) 85static int __init mips_reboot_setup(void)
93{ 86{
94 /* insert and request the memory region */ 87 struct resource res;
95 if (insert_resource(&iomem_resource, &ltq_rcu_resource) < 0) 88 struct device_node *np =
96 panic("Failed to insert rcu memory"); 89 of_find_compatible_node(NULL, NULL, "lantiq,rcu-xway");
90
91 /* check if all the reset register range is available */
92 if (!np)
93 panic("Failed to load reset resources from devicetree");
94
95 if (of_address_to_resource(np, 0, &res))
96 panic("Failed to get rcu memory range");
97 97
98 if (request_mem_region(ltq_rcu_resource.start, 98 if (request_mem_region(res.start, resource_size(&res), res.name) < 0)
99 resource_size(&ltq_rcu_resource), "rcu") < 0) 99 pr_err("Failed to request rcu memory");
100 panic("Failed to request rcu memory");
101 100
102 /* remap rcu register range */ 101 ltq_rcu_membase = ioremap_nocache(res.start, resource_size(&res));
103 ltq_rcu_membase = ioremap_nocache(ltq_rcu_resource.start,
104 resource_size(&ltq_rcu_resource));
105 if (!ltq_rcu_membase) 102 if (!ltq_rcu_membase)
106 panic("Failed to remap core memory"); 103 panic("Failed to remap core memory");
107 104