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authorOlof Johansson <olof@lixom.net>2013-01-16 22:58:08 -0500
committerOlof Johansson <olof@lixom.net>2013-01-16 22:58:58 -0500
commit5046e385b4426e229a6beb4bce480762af91a6fc (patch)
tree65b4bff2c913a18840b3c58892853d51b942ac43 /arch/mips
parenta73b59c51ab288d81b515b504790267f594884b8 (diff)
parentb86dc0d8c12bbb9fed3f392c284bdc7114ce00c1 (diff)
Merge branch 'v3.8-samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
From Kukjin Kim: That branch fixes build error for S3C24XX/S3C64xx. And corrects dw-mshc properties on EXYNOS5 DT and fixes IRQ mapping on Cragganmore board. * 'v3.8-samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: S3C64XX: Fix up IRQ mapping for balblair on Cragganmore ARM: dts: correct the dw-mshc timing properties as per binding ARM: S3C64XX: Fix build error with CONFIG_S3C_DEV_FB disabled + Linux 3.8-rc3 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kconfig4
-rw-r--r--arch/mips/alchemy/common/time.c25
-rw-r--r--arch/mips/cavium-octeon/serial.c2
-rw-r--r--arch/mips/include/asm/page.h9
-rw-r--r--arch/mips/include/asm/pci.h4
-rw-r--r--arch/mips/include/asm/thread_info.h9
-rw-r--r--arch/mips/include/uapi/asm/unistd.h15
-rw-r--r--arch/mips/kernel/asm-offsets.c3
-rw-r--r--arch/mips/kernel/genex.S5
-rw-r--r--arch/mips/kernel/head.S1
-rw-r--r--arch/mips/kernel/octeon_switch.S1
-rw-r--r--arch/mips/kernel/perf_event_mipsxx.c38
-rw-r--r--arch/mips/kernel/r2300_switch.S1
-rw-r--r--arch/mips/kernel/r4k_switch.S1
-rw-r--r--arch/mips/kernel/relocate_kernel.S3
-rw-r--r--arch/mips/kernel/scall32-o32.S1
-rw-r--r--arch/mips/kernel/scall64-64.S1
-rw-r--r--arch/mips/kernel/scall64-n32.S1
-rw-r--r--arch/mips/kernel/scall64-o32.S1
-rw-r--r--arch/mips/kernel/smp.c2
-rw-r--r--arch/mips/kernel/vmlinux.lds.S3
-rw-r--r--arch/mips/lantiq/xway/dma.c2
-rw-r--r--arch/mips/lantiq/xway/gptu.c2
-rw-r--r--arch/mips/lantiq/xway/xrx200_phy_fw.c2
-rw-r--r--arch/mips/mm/ioremap.c6
-rw-r--r--arch/mips/mm/tlbex-fault.S1
-rw-r--r--arch/mips/mm/tlbex.c16
-rw-r--r--arch/mips/mti-sead3/sead3-i2c-drv.c6
-rw-r--r--arch/mips/mti-sead3/sead3-pic32-i2c-drv.c8
-rw-r--r--arch/mips/pci/fixup-cobalt.c8
-rw-r--r--arch/mips/pci/fixup-emma2rh.c4
-rw-r--r--arch/mips/pci/fixup-fuloong2e.c12
-rw-r--r--arch/mips/pci/fixup-lemote2f.c12
-rw-r--r--arch/mips/pci/fixup-malta.c10
-rw-r--r--arch/mips/pci/fixup-rc32434.c6
-rw-r--r--arch/mips/pci/fixup-sb1250.c6
-rw-r--r--arch/mips/pci/ops-bcm63xx.c2
-rw-r--r--arch/mips/pci/ops-tx4927.c6
-rw-r--r--arch/mips/pci/pci-alchemy.c2
-rw-r--r--arch/mips/pci/pci-ip27.c4
-rw-r--r--arch/mips/pci/pci-lantiq.c4
-rw-r--r--arch/mips/pci/pci.c9
-rw-r--r--arch/mips/power/hibernate.S3
-rw-r--r--arch/mips/sni/setup.c2
-rw-r--r--arch/mips/txx9/generic/pci.c11
45 files changed, 105 insertions, 169 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index b7dc39c6c849..2ac626ab9d43 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -39,8 +39,8 @@ config MIPS
39 select GENERIC_CLOCKEVENTS 39 select GENERIC_CLOCKEVENTS
40 select GENERIC_CMOS_UPDATE 40 select GENERIC_CMOS_UPDATE
41 select HAVE_MOD_ARCH_SPECIFIC 41 select HAVE_MOD_ARCH_SPECIFIC
42 select MODULES_USE_ELF_REL 42 select MODULES_USE_ELF_REL if MODULES
43 select MODULES_USE_ELF_RELA if 64BIT 43 select MODULES_USE_ELF_RELA if MODULES && 64BIT
44 44
45menu "Machine selection" 45menu "Machine selection"
46 46
diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c
index a7193ae13a5d..b67930d19325 100644
--- a/arch/mips/alchemy/common/time.c
+++ b/arch/mips/alchemy/common/time.c
@@ -53,7 +53,7 @@ static struct clocksource au1x_counter1_clocksource = {
53 .read = au1x_counter1_read, 53 .read = au1x_counter1_read,
54 .mask = CLOCKSOURCE_MASK(32), 54 .mask = CLOCKSOURCE_MASK(32),
55 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 55 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
56 .rating = 100, 56 .rating = 1500,
57}; 57};
58 58
59static int au1x_rtcmatch2_set_next_event(unsigned long delta, 59static int au1x_rtcmatch2_set_next_event(unsigned long delta,
@@ -84,7 +84,7 @@ static irqreturn_t au1x_rtcmatch2_irq(int irq, void *dev_id)
84static struct clock_event_device au1x_rtcmatch2_clockdev = { 84static struct clock_event_device au1x_rtcmatch2_clockdev = {
85 .name = "rtcmatch2", 85 .name = "rtcmatch2",
86 .features = CLOCK_EVT_FEAT_ONESHOT, 86 .features = CLOCK_EVT_FEAT_ONESHOT,
87 .rating = 100, 87 .rating = 1500,
88 .set_next_event = au1x_rtcmatch2_set_next_event, 88 .set_next_event = au1x_rtcmatch2_set_next_event,
89 .set_mode = au1x_rtcmatch2_set_mode, 89 .set_mode = au1x_rtcmatch2_set_mode,
90 .cpumask = cpu_all_mask, 90 .cpumask = cpu_all_mask,
@@ -158,20 +158,6 @@ cntr_err:
158 return -1; 158 return -1;
159} 159}
160 160
161static void __init alchemy_setup_c0timer(void)
162{
163 /*
164 * MIPS kernel assigns 'au1k_wait' to 'cpu_wait' before this
165 * function is called. Because the Alchemy counters are unusable
166 * the C0 timekeeping code is installed and use of the 'wait'
167 * instruction must be prohibited, which is done most easily by
168 * assigning NULL to cpu_wait.
169 */
170 cpu_wait = NULL;
171 r4k_clockevent_init();
172 init_r4k_clocksource();
173}
174
175static int alchemy_m2inttab[] __initdata = { 161static int alchemy_m2inttab[] __initdata = {
176 AU1000_RTC_MATCH2_INT, 162 AU1000_RTC_MATCH2_INT,
177 AU1500_RTC_MATCH2_INT, 163 AU1500_RTC_MATCH2_INT,
@@ -186,8 +172,7 @@ void __init plat_time_init(void)
186 int t; 172 int t;
187 173
188 t = alchemy_get_cputype(); 174 t = alchemy_get_cputype();
189 if (t == ALCHEMY_CPU_UNKNOWN) 175 if (t == ALCHEMY_CPU_UNKNOWN ||
190 alchemy_setup_c0timer(); 176 alchemy_time_init(alchemy_m2inttab[t]))
191 else if (alchemy_time_init(alchemy_m2inttab[t])) 177 cpu_wait = NULL; /* wait doesn't work with r4k timer */
192 alchemy_setup_c0timer();
193} 178}
diff --git a/arch/mips/cavium-octeon/serial.c b/arch/mips/cavium-octeon/serial.c
index 569f41bdcc46..f393f65f3923 100644
--- a/arch/mips/cavium-octeon/serial.c
+++ b/arch/mips/cavium-octeon/serial.c
@@ -43,7 +43,7 @@ void octeon_serial_out(struct uart_port *up, int offset, int value)
43 cvmx_write_csr((uint64_t)(up->membase + (offset << 3)), (u8)value); 43 cvmx_write_csr((uint64_t)(up->membase + (offset << 3)), (u8)value);
44} 44}
45 45
46static int __devinit octeon_serial_probe(struct platform_device *pdev) 46static int octeon_serial_probe(struct platform_device *pdev)
47{ 47{
48 int irq, res; 48 int irq, res;
49 struct resource *res_mem; 49 struct resource *res_mem;
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index 31ab10f02bad..dbaec94046da 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -45,8 +45,6 @@
45#define HUGETLB_PAGE_ORDER ({BUILD_BUG(); 0; }) 45#define HUGETLB_PAGE_ORDER ({BUILD_BUG(); 0; })
46#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */ 46#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
47 47
48#ifndef __ASSEMBLY__
49
50#include <linux/pfn.h> 48#include <linux/pfn.h>
51#include <asm/io.h> 49#include <asm/io.h>
52 50
@@ -139,8 +137,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
139 */ 137 */
140#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t))) 138#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t)))
141 139
142#endif /* !__ASSEMBLY__ */
143
144/* 140/*
145 * __pa()/__va() should be used only during mem init. 141 * __pa()/__va() should be used only during mem init.
146 */ 142 */
@@ -202,7 +198,10 @@ typedef struct { unsigned long pgprot; } pgprot_t;
202#endif 198#endif
203 199
204#define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(virt_to_phys(kaddr))) 200#define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(virt_to_phys(kaddr)))
205#define virt_addr_valid(kaddr) pfn_valid(PFN_DOWN(virt_to_phys(kaddr))) 201
202extern int __virt_addr_valid(const volatile void *kaddr);
203#define virt_addr_valid(kaddr) \
204 __virt_addr_valid((const volatile void *) (kaddr))
206 205
207#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 206#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
208 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) 207 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index 90bf3b3fce19..d69ea743272b 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -145,7 +145,7 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
145extern char * (*pcibios_plat_setup)(char *str); 145extern char * (*pcibios_plat_setup)(char *str);
146 146
147/* this function parses memory ranges from a device node */ 147/* this function parses memory ranges from a device node */
148extern void __devinit pci_load_of_ranges(struct pci_controller *hose, 148extern void pci_load_of_ranges(struct pci_controller *hose,
149 struct device_node *node); 149 struct device_node *node);
150 150
151#endif /* _ASM_PCI_H */ 151#endif /* _ASM_PCI_H */
diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h
index 18806a52061c..b2050b9e64b1 100644
--- a/arch/mips/include/asm/thread_info.h
+++ b/arch/mips/include/asm/thread_info.h
@@ -29,10 +29,11 @@ struct thread_info {
29 __u32 cpu; /* current CPU */ 29 __u32 cpu; /* current CPU */
30 int preempt_count; /* 0 => preemptable, <0 => BUG */ 30 int preempt_count; /* 0 => preemptable, <0 => BUG */
31 31
32 mm_segment_t addr_limit; /* thread address space: 32 mm_segment_t addr_limit; /*
33 0-0xBFFFFFFF for user-thead 33 * thread address space limit:
34 0-0xFFFFFFFF for kernel-thread 34 * 0x7fffffff for user-thead
35 */ 35 * 0xffffffff for kernel-thread
36 */
36 struct restart_block restart_block; 37 struct restart_block restart_block;
37 struct pt_regs *regs; 38 struct pt_regs *regs;
38}; 39};
diff --git a/arch/mips/include/uapi/asm/unistd.h b/arch/mips/include/uapi/asm/unistd.h
index cc98a9dcb01b..0eebf3c3e03c 100644
--- a/arch/mips/include/uapi/asm/unistd.h
+++ b/arch/mips/include/uapi/asm/unistd.h
@@ -368,16 +368,17 @@
368#define __NR_process_vm_readv (__NR_Linux + 345) 368#define __NR_process_vm_readv (__NR_Linux + 345)
369#define __NR_process_vm_writev (__NR_Linux + 346) 369#define __NR_process_vm_writev (__NR_Linux + 346)
370#define __NR_kcmp (__NR_Linux + 347) 370#define __NR_kcmp (__NR_Linux + 347)
371#define __NR_finit_module (__NR_Linux + 348)
371 372
372/* 373/*
373 * Offset of the last Linux o32 flavoured syscall 374 * Offset of the last Linux o32 flavoured syscall
374 */ 375 */
375#define __NR_Linux_syscalls 347 376#define __NR_Linux_syscalls 348
376 377
377#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 378#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
378 379
379#define __NR_O32_Linux 4000 380#define __NR_O32_Linux 4000
380#define __NR_O32_Linux_syscalls 347 381#define __NR_O32_Linux_syscalls 348
381 382
382#if _MIPS_SIM == _MIPS_SIM_ABI64 383#if _MIPS_SIM == _MIPS_SIM_ABI64
383 384
@@ -692,16 +693,17 @@
692#define __NR_process_vm_readv (__NR_Linux + 304) 693#define __NR_process_vm_readv (__NR_Linux + 304)
693#define __NR_process_vm_writev (__NR_Linux + 305) 694#define __NR_process_vm_writev (__NR_Linux + 305)
694#define __NR_kcmp (__NR_Linux + 306) 695#define __NR_kcmp (__NR_Linux + 306)
696#define __NR_finit_module (__NR_Linux + 307)
695 697
696/* 698/*
697 * Offset of the last Linux 64-bit flavoured syscall 699 * Offset of the last Linux 64-bit flavoured syscall
698 */ 700 */
699#define __NR_Linux_syscalls 306 701#define __NR_Linux_syscalls 307
700 702
701#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ 703#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
702 704
703#define __NR_64_Linux 5000 705#define __NR_64_Linux 5000
704#define __NR_64_Linux_syscalls 306 706#define __NR_64_Linux_syscalls 307
705 707
706#if _MIPS_SIM == _MIPS_SIM_NABI32 708#if _MIPS_SIM == _MIPS_SIM_NABI32
707 709
@@ -1021,15 +1023,16 @@
1021#define __NR_process_vm_readv (__NR_Linux + 309) 1023#define __NR_process_vm_readv (__NR_Linux + 309)
1022#define __NR_process_vm_writev (__NR_Linux + 310) 1024#define __NR_process_vm_writev (__NR_Linux + 310)
1023#define __NR_kcmp (__NR_Linux + 311) 1025#define __NR_kcmp (__NR_Linux + 311)
1026#define __NR_finit_module (__NR_Linux + 312)
1024 1027
1025/* 1028/*
1026 * Offset of the last N32 flavoured syscall 1029 * Offset of the last N32 flavoured syscall
1027 */ 1030 */
1028#define __NR_Linux_syscalls 311 1031#define __NR_Linux_syscalls 312
1029 1032
1030#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 1033#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
1031 1034
1032#define __NR_N32_Linux 6000 1035#define __NR_N32_Linux 6000
1033#define __NR_N32_Linux_syscalls 311 1036#define __NR_N32_Linux_syscalls 312
1034 1037
1035#endif /* _UAPI_ASM_UNISTD_H */ 1038#endif /* _UAPI_ASM_UNISTD_H */
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 9690998d4ef3..50285b2c7ffe 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -200,6 +200,9 @@ void output_mm_defines(void)
200 DEFINE(_PTRS_PER_PMD, PTRS_PER_PMD); 200 DEFINE(_PTRS_PER_PMD, PTRS_PER_PMD);
201 DEFINE(_PTRS_PER_PTE, PTRS_PER_PTE); 201 DEFINE(_PTRS_PER_PTE, PTRS_PER_PTE);
202 BLANK(); 202 BLANK();
203 DEFINE(_PAGE_SHIFT, PAGE_SHIFT);
204 DEFINE(_PAGE_SIZE, PAGE_SIZE);
205 BLANK();
203} 206}
204 207
205#ifdef CONFIG_32BIT 208#ifdef CONFIG_32BIT
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index 8882e5766f27..8a0096d62812 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -19,7 +19,6 @@
19#include <asm/mipsregs.h> 19#include <asm/mipsregs.h>
20#include <asm/stackframe.h> 20#include <asm/stackframe.h>
21#include <asm/war.h> 21#include <asm/war.h>
22#include <asm/page.h>
23#include <asm/thread_info.h> 22#include <asm/thread_info.h>
24 23
25#define PANIC_PIC(msg) \ 24#define PANIC_PIC(msg) \
@@ -483,8 +482,8 @@ NESTED(nmi_handler, PT_SIZE, sp)
483 MFC0 k1, CP0_ENTRYHI 482 MFC0 k1, CP0_ENTRYHI
484 andi k1, 0xff /* ASID_MASK */ 483 andi k1, 0xff /* ASID_MASK */
485 MFC0 k0, CP0_EPC 484 MFC0 k0, CP0_EPC
486 PTR_SRL k0, PAGE_SHIFT + 1 485 PTR_SRL k0, _PAGE_SHIFT + 1
487 PTR_SLL k0, PAGE_SHIFT + 1 486 PTR_SLL k0, _PAGE_SHIFT + 1
488 or k1, k0 487 or k1, k0
489 MTC0 k1, CP0_ENTRYHI 488 MTC0 k1, CP0_ENTRYHI
490 mtc0_tlbw_hazard 489 mtc0_tlbw_hazard
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index ea695d9605e9..fcf97312f328 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -21,7 +21,6 @@
21#include <asm/asmmacro.h> 21#include <asm/asmmacro.h>
22#include <asm/irqflags.h> 22#include <asm/irqflags.h>
23#include <asm/regdef.h> 23#include <asm/regdef.h>
24#include <asm/page.h>
25#include <asm/pgtable-bits.h> 24#include <asm/pgtable-bits.h>
26#include <asm/mipsregs.h> 25#include <asm/mipsregs.h>
27#include <asm/stackframe.h> 26#include <asm/stackframe.h>
diff --git a/arch/mips/kernel/octeon_switch.S b/arch/mips/kernel/octeon_switch.S
index 0441f54b2a6a..207f1341578b 100644
--- a/arch/mips/kernel/octeon_switch.S
+++ b/arch/mips/kernel/octeon_switch.S
@@ -15,7 +15,6 @@
15#include <asm/fpregdef.h> 15#include <asm/fpregdef.h>
16#include <asm/mipsregs.h> 16#include <asm/mipsregs.h>
17#include <asm/asm-offsets.h> 17#include <asm/asm-offsets.h>
18#include <asm/page.h>
19#include <asm/pgtable-bits.h> 18#include <asm/pgtable-bits.h>
20#include <asm/regdef.h> 19#include <asm/regdef.h>
21#include <asm/stackframe.h> 20#include <asm/stackframe.h>
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index b14c14d90fc2..d9c81c5a6c90 100644
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -847,7 +847,6 @@ static const struct mips_perf_event xlp_event_map[PERF_COUNT_HW_MAX] = {
847 [PERF_COUNT_HW_CACHE_MISSES] = { 0x07, CNTR_ALL }, /* PAPI_L1_ICM */ 847 [PERF_COUNT_HW_CACHE_MISSES] = { 0x07, CNTR_ALL }, /* PAPI_L1_ICM */
848 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = { 0x1b, CNTR_ALL }, /* PAPI_BR_CN */ 848 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = { 0x1b, CNTR_ALL }, /* PAPI_BR_CN */
849 [PERF_COUNT_HW_BRANCH_MISSES] = { 0x1c, CNTR_ALL }, /* PAPI_BR_MSP */ 849 [PERF_COUNT_HW_BRANCH_MISSES] = { 0x1c, CNTR_ALL }, /* PAPI_BR_MSP */
850 [PERF_COUNT_HW_BUS_CYCLES] = { UNSUPPORTED_PERF_EVENT_ID },
851}; 850};
852 851
853/* 24K/34K/1004K cores can share the same cache event map. */ 852/* 24K/34K/1004K cores can share the same cache event map. */
@@ -1115,24 +1114,12 @@ static const struct mips_perf_event xlp_cache_map
1115 [C(RESULT_ACCESS)] = { 0x2f, CNTR_ALL }, /* PAPI_L1_DCW */ 1114 [C(RESULT_ACCESS)] = { 0x2f, CNTR_ALL }, /* PAPI_L1_DCW */
1116 [C(RESULT_MISS)] = { 0x2e, CNTR_ALL }, /* PAPI_L1_STM */ 1115 [C(RESULT_MISS)] = { 0x2e, CNTR_ALL }, /* PAPI_L1_STM */
1117 }, 1116 },
1118 [C(OP_PREFETCH)] = {
1119 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1120 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
1121 },
1122}, 1117},
1123[C(L1I)] = { 1118[C(L1I)] = {
1124 [C(OP_READ)] = { 1119 [C(OP_READ)] = {
1125 [C(RESULT_ACCESS)] = { 0x04, CNTR_ALL }, /* PAPI_L1_ICA */ 1120 [C(RESULT_ACCESS)] = { 0x04, CNTR_ALL }, /* PAPI_L1_ICA */
1126 [C(RESULT_MISS)] = { 0x07, CNTR_ALL }, /* PAPI_L1_ICM */ 1121 [C(RESULT_MISS)] = { 0x07, CNTR_ALL }, /* PAPI_L1_ICM */
1127 }, 1122 },
1128 [C(OP_WRITE)] = {
1129 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1130 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
1131 },
1132 [C(OP_PREFETCH)] = {
1133 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1134 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
1135 },
1136}, 1123},
1137[C(LL)] = { 1124[C(LL)] = {
1138 [C(OP_READ)] = { 1125 [C(OP_READ)] = {
@@ -1143,10 +1130,6 @@ static const struct mips_perf_event xlp_cache_map
1143 [C(RESULT_ACCESS)] = { 0x34, CNTR_ALL }, /* PAPI_L2_DCA */ 1130 [C(RESULT_ACCESS)] = { 0x34, CNTR_ALL }, /* PAPI_L2_DCA */
1144 [C(RESULT_MISS)] = { 0x36, CNTR_ALL }, /* PAPI_L2_DCM */ 1131 [C(RESULT_MISS)] = { 0x36, CNTR_ALL }, /* PAPI_L2_DCM */
1145 }, 1132 },
1146 [C(OP_PREFETCH)] = {
1147 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1148 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
1149 },
1150}, 1133},
1151[C(DTLB)] = { 1134[C(DTLB)] = {
1152 /* 1135 /*
@@ -1154,45 +1137,24 @@ static const struct mips_perf_event xlp_cache_map
1154 * read and write. 1137 * read and write.
1155 */ 1138 */
1156 [C(OP_READ)] = { 1139 [C(OP_READ)] = {
1157 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1158 [C(RESULT_MISS)] = { 0x2d, CNTR_ALL }, /* PAPI_TLB_DM */ 1140 [C(RESULT_MISS)] = { 0x2d, CNTR_ALL }, /* PAPI_TLB_DM */
1159 }, 1141 },
1160 [C(OP_WRITE)] = { 1142 [C(OP_WRITE)] = {
1161 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1162 [C(RESULT_MISS)] = { 0x2d, CNTR_ALL }, /* PAPI_TLB_DM */ 1143 [C(RESULT_MISS)] = { 0x2d, CNTR_ALL }, /* PAPI_TLB_DM */
1163 }, 1144 },
1164 [C(OP_PREFETCH)] = {
1165 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1166 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
1167 },
1168}, 1145},
1169[C(ITLB)] = { 1146[C(ITLB)] = {
1170 [C(OP_READ)] = { 1147 [C(OP_READ)] = {
1171 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1172 [C(RESULT_MISS)] = { 0x08, CNTR_ALL }, /* PAPI_TLB_IM */ 1148 [C(RESULT_MISS)] = { 0x08, CNTR_ALL }, /* PAPI_TLB_IM */
1173 }, 1149 },
1174 [C(OP_WRITE)] = { 1150 [C(OP_WRITE)] = {
1175 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1176 [C(RESULT_MISS)] = { 0x08, CNTR_ALL }, /* PAPI_TLB_IM */ 1151 [C(RESULT_MISS)] = { 0x08, CNTR_ALL }, /* PAPI_TLB_IM */
1177 }, 1152 },
1178 [C(OP_PREFETCH)] = {
1179 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1180 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
1181 },
1182}, 1153},
1183[C(BPU)] = { 1154[C(BPU)] = {
1184 [C(OP_READ)] = { 1155 [C(OP_READ)] = {
1185 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1186 [C(RESULT_MISS)] = { 0x25, CNTR_ALL }, 1156 [C(RESULT_MISS)] = { 0x25, CNTR_ALL },
1187 }, 1157 },
1188 [C(OP_WRITE)] = {
1189 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1190 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
1191 },
1192 [C(OP_PREFETCH)] = {
1193 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
1194 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
1195 },
1196}, 1158},
1197}; 1159};
1198 1160
diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S
index 9c51be5a163a..8d32d5a6b460 100644
--- a/arch/mips/kernel/r2300_switch.S
+++ b/arch/mips/kernel/r2300_switch.S
@@ -15,7 +15,6 @@
15#include <asm/fpregdef.h> 15#include <asm/fpregdef.h>
16#include <asm/mipsregs.h> 16#include <asm/mipsregs.h>
17#include <asm/asm-offsets.h> 17#include <asm/asm-offsets.h>
18#include <asm/page.h>
19#include <asm/regdef.h> 18#include <asm/regdef.h>
20#include <asm/stackframe.h> 19#include <asm/stackframe.h>
21#include <asm/thread_info.h> 20#include <asm/thread_info.h>
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index 42d2a3938420..8decdfacb448 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -15,7 +15,6 @@
15#include <asm/fpregdef.h> 15#include <asm/fpregdef.h>
16#include <asm/mipsregs.h> 16#include <asm/mipsregs.h>
17#include <asm/asm-offsets.h> 17#include <asm/asm-offsets.h>
18#include <asm/page.h>
19#include <asm/pgtable-bits.h> 18#include <asm/pgtable-bits.h>
20#include <asm/regdef.h> 19#include <asm/regdef.h>
21#include <asm/stackframe.h> 20#include <asm/stackframe.h>
diff --git a/arch/mips/kernel/relocate_kernel.S b/arch/mips/kernel/relocate_kernel.S
index e4142c5f7c2b..804ebb2c34a6 100644
--- a/arch/mips/kernel/relocate_kernel.S
+++ b/arch/mips/kernel/relocate_kernel.S
@@ -9,7 +9,6 @@
9#include <asm/asm.h> 9#include <asm/asm.h>
10#include <asm/asmmacro.h> 10#include <asm/asmmacro.h>
11#include <asm/regdef.h> 11#include <asm/regdef.h>
12#include <asm/page.h>
13#include <asm/mipsregs.h> 12#include <asm/mipsregs.h>
14#include <asm/stackframe.h> 13#include <asm/stackframe.h>
15#include <asm/addrspace.h> 14#include <asm/addrspace.h>
@@ -50,7 +49,7 @@ process_entry:
50 and s3, s2, 0x8 49 and s3, s2, 0x8
51 beq s3, zero, process_entry 50 beq s3, zero, process_entry
52 and s2, s2, ~0x8 51 and s2, s2, ~0x8
53 li s6, (1 << PAGE_SHIFT) / SZREG 52 li s6, (1 << _PAGE_SHIFT) / SZREG
54 53
55copy_word: 54copy_word:
56 /* copy page word by word */ 55 /* copy page word by word */
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 374f66e05f3d..d20a4bc9ed05 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -583,6 +583,7 @@ einval: li v0, -ENOSYS
583 sys sys_process_vm_readv 6 /* 4345 */ 583 sys sys_process_vm_readv 6 /* 4345 */
584 sys sys_process_vm_writev 6 584 sys sys_process_vm_writev 6
585 sys sys_kcmp 5 585 sys sys_kcmp 5
586 sys sys_finit_module 3
586 .endm 587 .endm
587 588
588 /* We pre-compute the number of _instruction_ bytes needed to 589 /* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 169de6a6d916..b64f642da073 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -422,4 +422,5 @@ sys_call_table:
422 PTR sys_process_vm_readv 422 PTR sys_process_vm_readv
423 PTR sys_process_vm_writev /* 5305 */ 423 PTR sys_process_vm_writev /* 5305 */
424 PTR sys_kcmp 424 PTR sys_kcmp
425 PTR sys_finit_module
425 .size sys_call_table,.-sys_call_table 426 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index ad3de9668da9..c29ac197f446 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -416,4 +416,5 @@ EXPORT(sysn32_call_table)
416 PTR compat_sys_process_vm_readv 416 PTR compat_sys_process_vm_readv
417 PTR compat_sys_process_vm_writev /* 6310 */ 417 PTR compat_sys_process_vm_writev /* 6310 */
418 PTR sys_kcmp 418 PTR sys_kcmp
419 PTR sys_finit_module
419 .size sysn32_call_table,.-sysn32_call_table 420 .size sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 9601be6afa3d..cf3e75e46650 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -540,4 +540,5 @@ sys_call_table:
540 PTR compat_sys_process_vm_readv /* 4345 */ 540 PTR compat_sys_process_vm_readv /* 4345 */
541 PTR compat_sys_process_vm_writev 541 PTR compat_sys_process_vm_writev
542 PTR sys_kcmp 542 PTR sys_kcmp
543 PTR sys_finit_module
543 .size sys_call_table,.-sys_call_table 544 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 2e6374a589ec..66bf4e22d9b9 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -188,7 +188,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
188} 188}
189 189
190/* preload SMP state for boot cpu */ 190/* preload SMP state for boot cpu */
191void __devinit smp_prepare_boot_cpu(void) 191void smp_prepare_boot_cpu(void)
192{ 192{
193 set_cpu_possible(0, true); 193 set_cpu_possible(0, true);
194 set_cpu_online(0, true); 194 set_cpu_online(0, true);
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index 007ccbe1e264..0a4336b803e9 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -1,7 +1,8 @@
1#include <asm/asm-offsets.h> 1#include <asm/asm-offsets.h>
2#include <asm/page.h>
3#include <asm/thread_info.h> 2#include <asm/thread_info.h>
4 3
4#define PAGE_SIZE _PAGE_SIZE
5
5/* 6/*
6 * Put .bss..swapper_pg_dir as the first thing in .bss. This will 7 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
7 * ensure that it has .bss alignment (64K). 8 * ensure that it has .bss alignment (64K).
diff --git a/arch/mips/lantiq/xway/dma.c b/arch/mips/lantiq/xway/dma.c
index 6453962ac898..e44a1866653f 100644
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -210,7 +210,7 @@ ltq_dma_init_port(int p)
210} 210}
211EXPORT_SYMBOL_GPL(ltq_dma_init_port); 211EXPORT_SYMBOL_GPL(ltq_dma_init_port);
212 212
213static int __devinit 213static int
214ltq_dma_init(struct platform_device *pdev) 214ltq_dma_init(struct platform_device *pdev)
215{ 215{
216 struct clk *clk; 216 struct clk *clk;
diff --git a/arch/mips/lantiq/xway/gptu.c b/arch/mips/lantiq/xway/gptu.c
index cbb56fc022bc..e30b1ed1b936 100644
--- a/arch/mips/lantiq/xway/gptu.c
+++ b/arch/mips/lantiq/xway/gptu.c
@@ -133,7 +133,7 @@ static inline void clkdev_add_gptu(struct device *dev, const char *con,
133 clkdev_add(&clk->cl); 133 clkdev_add(&clk->cl);
134} 134}
135 135
136static int __devinit gptu_probe(struct platform_device *pdev) 136static int gptu_probe(struct platform_device *pdev)
137{ 137{
138 struct clk *clk; 138 struct clk *clk;
139 struct resource *res; 139 struct resource *res;
diff --git a/arch/mips/lantiq/xway/xrx200_phy_fw.c b/arch/mips/lantiq/xway/xrx200_phy_fw.c
index fe808bf5366d..d4d9d31f152e 100644
--- a/arch/mips/lantiq/xway/xrx200_phy_fw.c
+++ b/arch/mips/lantiq/xway/xrx200_phy_fw.c
@@ -54,7 +54,7 @@ static dma_addr_t xway_gphy_load(struct platform_device *pdev)
54 return dev_addr; 54 return dev_addr;
55} 55}
56 56
57static int __devinit xway_phy_fw_probe(struct platform_device *pdev) 57static int xway_phy_fw_probe(struct platform_device *pdev)
58{ 58{
59 dma_addr_t fw_addr; 59 dma_addr_t fw_addr;
60 struct property *pp; 60 struct property *pp;
diff --git a/arch/mips/mm/ioremap.c b/arch/mips/mm/ioremap.c
index cacfd31e8ec9..7657fd21cd3f 100644
--- a/arch/mips/mm/ioremap.c
+++ b/arch/mips/mm/ioremap.c
@@ -190,3 +190,9 @@ void __iounmap(const volatile void __iomem *addr)
190 190
191EXPORT_SYMBOL(__ioremap); 191EXPORT_SYMBOL(__ioremap);
192EXPORT_SYMBOL(__iounmap); 192EXPORT_SYMBOL(__iounmap);
193
194int __virt_addr_valid(const volatile void *kaddr)
195{
196 return pfn_valid(PFN_DOWN(virt_to_phys(kaddr)));
197}
198EXPORT_SYMBOL_GPL(__virt_addr_valid);
diff --git a/arch/mips/mm/tlbex-fault.S b/arch/mips/mm/tlbex-fault.S
index e99eaa1fbedc..318855eb5f80 100644
--- a/arch/mips/mm/tlbex-fault.S
+++ b/arch/mips/mm/tlbex-fault.S
@@ -7,7 +7,6 @@
7 * Copyright (C) 1999 Silicon Graphics, Inc. 7 * Copyright (C) 1999 Silicon Graphics, Inc.
8 */ 8 */
9#include <asm/mipsregs.h> 9#include <asm/mipsregs.h>
10#include <asm/page.h>
11#include <asm/regdef.h> 10#include <asm/regdef.h>
12#include <asm/stackframe.h> 11#include <asm/stackframe.h>
13 12
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 05613355627b..1c8ac49ec72c 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -976,13 +976,6 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
976#endif 976#endif
977 uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */ 977 uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
978 uasm_i_lw(p, ptr, uasm_rel_lo(pgdc), ptr); 978 uasm_i_lw(p, ptr, uasm_rel_lo(pgdc), ptr);
979
980 if (cpu_has_mips_r2) {
981 uasm_i_ext(p, tmp, tmp, PGDIR_SHIFT, (32 - PGDIR_SHIFT));
982 uasm_i_ins(p, ptr, tmp, PGD_T_LOG2, (32 - PGDIR_SHIFT));
983 return;
984 }
985
986 uasm_i_srl(p, tmp, tmp, PGDIR_SHIFT); /* get pgd only bits */ 979 uasm_i_srl(p, tmp, tmp, PGDIR_SHIFT); /* get pgd only bits */
987 uasm_i_sll(p, tmp, tmp, PGD_T_LOG2); 980 uasm_i_sll(p, tmp, tmp, PGD_T_LOG2);
988 uasm_i_addu(p, ptr, ptr, tmp); /* add in pgd offset */ 981 uasm_i_addu(p, ptr, ptr, tmp); /* add in pgd offset */
@@ -1018,15 +1011,6 @@ static void __cpuinit build_adjust_context(u32 **p, unsigned int ctx)
1018 1011
1019static void __cpuinit build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr) 1012static void __cpuinit build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr)
1020{ 1013{
1021 if (cpu_has_mips_r2) {
1022 /* PTE ptr offset is obtained from BadVAddr */
1023 UASM_i_MFC0(p, tmp, C0_BADVADDR);
1024 UASM_i_LW(p, ptr, 0, ptr);
1025 uasm_i_ext(p, tmp, tmp, PAGE_SHIFT+1, PGDIR_SHIFT-PAGE_SHIFT-1);
1026 uasm_i_ins(p, ptr, tmp, PTE_T_LOG2+1, PGDIR_SHIFT-PAGE_SHIFT-1);
1027 return;
1028 }
1029
1030 /* 1014 /*
1031 * Bug workaround for the Nevada. It seems as if under certain 1015 * Bug workaround for the Nevada. It seems as if under certain
1032 * circumstances the move from cp0_context might produce a 1016 * circumstances the move from cp0_context might produce a
diff --git a/arch/mips/mti-sead3/sead3-i2c-drv.c b/arch/mips/mti-sead3/sead3-i2c-drv.c
index 0375ee66bca3..7aa2225e75b9 100644
--- a/arch/mips/mti-sead3/sead3-i2c-drv.c
+++ b/arch/mips/mti-sead3/sead3-i2c-drv.c
@@ -297,7 +297,7 @@ static void sead3_i2c_platform_setup(struct pic32_i2c_platform_data *priv)
297 priv->base + PIC32_I2CxSTATCLR); 297 priv->base + PIC32_I2CxSTATCLR);
298} 298}
299 299
300static int __devinit sead3_i2c_platform_probe(struct platform_device *pdev) 300static int sead3_i2c_platform_probe(struct platform_device *pdev)
301{ 301{
302 struct pic32_i2c_platform_data *priv; 302 struct pic32_i2c_platform_data *priv;
303 struct resource *r; 303 struct resource *r;
@@ -345,7 +345,7 @@ out:
345 return ret; 345 return ret;
346} 346}
347 347
348static int __devexit sead3_i2c_platform_remove(struct platform_device *pdev) 348static int sead3_i2c_platform_remove(struct platform_device *pdev)
349{ 349{
350 struct pic32_i2c_platform_data *priv = platform_get_drvdata(pdev); 350 struct pic32_i2c_platform_data *priv = platform_get_drvdata(pdev);
351 351
@@ -383,7 +383,7 @@ static struct platform_driver sead3_i2c_platform_driver = {
383 .owner = THIS_MODULE, 383 .owner = THIS_MODULE,
384 }, 384 },
385 .probe = sead3_i2c_platform_probe, 385 .probe = sead3_i2c_platform_probe,
386 .remove = __devexit_p(sead3_i2c_platform_remove), 386 .remove = sead3_i2c_platform_remove,
387 .suspend = sead3_i2c_platform_suspend, 387 .suspend = sead3_i2c_platform_suspend,
388 .resume = sead3_i2c_platform_resume, 388 .resume = sead3_i2c_platform_resume,
389}; 389};
diff --git a/arch/mips/mti-sead3/sead3-pic32-i2c-drv.c b/arch/mips/mti-sead3/sead3-pic32-i2c-drv.c
index 46509b0a620d..514675ed0cde 100644
--- a/arch/mips/mti-sead3/sead3-pic32-i2c-drv.c
+++ b/arch/mips/mti-sead3/sead3-pic32-i2c-drv.c
@@ -304,8 +304,7 @@ static void i2c_platform_disable(struct i2c_platform_data *priv)
304 pr_debug("i2c_platform_disable\n"); 304 pr_debug("i2c_platform_disable\n");
305} 305}
306 306
307static int __devinit 307static int i2c_platform_probe(struct platform_device *pdev)
308i2c_platform_probe(struct platform_device *pdev)
309{ 308{
310 struct i2c_platform_data *priv; 309 struct i2c_platform_data *priv;
311 struct resource *r; 310 struct resource *r;
@@ -362,8 +361,7 @@ out:
362 return ret; 361 return ret;
363} 362}
364 363
365static int __devexit 364static int i2c_platform_remove(struct platform_device *pdev)
366i2c_platform_remove(struct platform_device *pdev)
367{ 365{
368 struct i2c_platform_data *priv = platform_get_drvdata(pdev); 366 struct i2c_platform_data *priv = platform_get_drvdata(pdev);
369 367
@@ -408,7 +406,7 @@ static struct platform_driver i2c_platform_driver = {
408 .owner = THIS_MODULE, 406 .owner = THIS_MODULE,
409 }, 407 },
410 .probe = i2c_platform_probe, 408 .probe = i2c_platform_probe,
411 .remove = __devexit_p(i2c_platform_remove), 409 .remove = i2c_platform_remove,
412 .suspend = i2c_platform_suspend, 410 .suspend = i2c_platform_suspend,
413 .resume = i2c_platform_resume, 411 .resume = i2c_platform_resume,
414}; 412};
diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c
index 3e7ce65d776c..9553b14002dd 100644
--- a/arch/mips/pci/fixup-cobalt.c
+++ b/arch/mips/pci/fixup-cobalt.c
@@ -37,7 +37,7 @@
37#define VIA_COBALT_BRD_ID_REG 0x94 37#define VIA_COBALT_BRD_ID_REG 0x94
38#define VIA_COBALT_BRD_REG_to_ID(reg) ((unsigned char)(reg) >> 4) 38#define VIA_COBALT_BRD_REG_to_ID(reg) ((unsigned char)(reg) >> 4)
39 39
40static void __devinit qube_raq_galileo_early_fixup(struct pci_dev *dev) 40static void qube_raq_galileo_early_fixup(struct pci_dev *dev)
41{ 41{
42 if (dev->devfn == PCI_DEVFN(0, 0) && 42 if (dev->devfn == PCI_DEVFN(0, 0) &&
43 (dev->class >> 8) == PCI_CLASS_MEMORY_OTHER) { 43 (dev->class >> 8) == PCI_CLASS_MEMORY_OTHER) {
@@ -51,7 +51,7 @@ static void __devinit qube_raq_galileo_early_fixup(struct pci_dev *dev)
51DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_GT64111, 51DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_GT64111,
52 qube_raq_galileo_early_fixup); 52 qube_raq_galileo_early_fixup);
53 53
54static void __devinit qube_raq_via_bmIDE_fixup(struct pci_dev *dev) 54static void qube_raq_via_bmIDE_fixup(struct pci_dev *dev)
55{ 55{
56 unsigned short cfgword; 56 unsigned short cfgword;
57 unsigned char lt; 57 unsigned char lt;
@@ -74,7 +74,7 @@ static void __devinit qube_raq_via_bmIDE_fixup(struct pci_dev *dev)
74DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, 74DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1,
75 qube_raq_via_bmIDE_fixup); 75 qube_raq_via_bmIDE_fixup);
76 76
77static void __devinit qube_raq_galileo_fixup(struct pci_dev *dev) 77static void qube_raq_galileo_fixup(struct pci_dev *dev)
78{ 78{
79 if (dev->devfn != PCI_DEVFN(0, 0)) 79 if (dev->devfn != PCI_DEVFN(0, 0))
80 return; 80 return;
@@ -129,7 +129,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_GT64111,
129 129
130int cobalt_board_id; 130int cobalt_board_id;
131 131
132static void __devinit qube_raq_via_board_id_fixup(struct pci_dev *dev) 132static void qube_raq_via_board_id_fixup(struct pci_dev *dev)
133{ 133{
134 u8 id; 134 u8 id;
135 int retval; 135 int retval;
diff --git a/arch/mips/pci/fixup-emma2rh.c b/arch/mips/pci/fixup-emma2rh.c
index 0d9ccf4dfc5a..beaec32b02e5 100644
--- a/arch/mips/pci/fixup-emma2rh.c
+++ b/arch/mips/pci/fixup-emma2rh.c
@@ -52,7 +52,7 @@ static unsigned char irq_map[][5] __initdata = {
52 MARKEINS_PCI_IRQ_INTA, MARKEINS_PCI_IRQ_INTB,}, 52 MARKEINS_PCI_IRQ_INTA, MARKEINS_PCI_IRQ_INTB,},
53}; 53};
54 54
55static void __devinit nec_usb_controller_fixup(struct pci_dev *dev) 55static void nec_usb_controller_fixup(struct pci_dev *dev)
56{ 56{
57 if (PCI_SLOT(dev->devfn) == EMMA2RH_USB_SLOT) 57 if (PCI_SLOT(dev->devfn) == EMMA2RH_USB_SLOT)
58 /* on board USB controller configuration */ 58 /* on board USB controller configuration */
@@ -67,7 +67,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
67 * if it is the host bridge by marking it as such. These resources are of 67 * if it is the host bridge by marking it as such. These resources are of
68 * no consequence to the PCI layer (they are handled elsewhere). 68 * no consequence to the PCI layer (they are handled elsewhere).
69 */ 69 */
70static void __devinit emma2rh_pci_host_fixup(struct pci_dev *dev) 70static void emma2rh_pci_host_fixup(struct pci_dev *dev)
71{ 71{
72 int i; 72 int i;
73 73
diff --git a/arch/mips/pci/fixup-fuloong2e.c b/arch/mips/pci/fixup-fuloong2e.c
index 0857ab8c3919..63ab4a042cd6 100644
--- a/arch/mips/pci/fixup-fuloong2e.c
+++ b/arch/mips/pci/fixup-fuloong2e.c
@@ -48,7 +48,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
48 return 0; 48 return 0;
49} 49}
50 50
51static void __devinit loongson2e_nec_fixup(struct pci_dev *pdev) 51static void loongson2e_nec_fixup(struct pci_dev *pdev)
52{ 52{
53 unsigned int val; 53 unsigned int val;
54 54
@@ -60,7 +60,7 @@ static void __devinit loongson2e_nec_fixup(struct pci_dev *pdev)
60 pci_write_config_dword(pdev, 0xe4, 1 << 5); 60 pci_write_config_dword(pdev, 0xe4, 1 << 5);
61} 61}
62 62
63static void __devinit loongson2e_686b_func0_fixup(struct pci_dev *pdev) 63static void loongson2e_686b_func0_fixup(struct pci_dev *pdev)
64{ 64{
65 unsigned char c; 65 unsigned char c;
66 66
@@ -135,7 +135,7 @@ static void __devinit loongson2e_686b_func0_fixup(struct pci_dev *pdev)
135 printk(KERN_INFO"via686b fix: ISA bridge done\n"); 135 printk(KERN_INFO"via686b fix: ISA bridge done\n");
136} 136}
137 137
138static void __devinit loongson2e_686b_func1_fixup(struct pci_dev *pdev) 138static void loongson2e_686b_func1_fixup(struct pci_dev *pdev)
139{ 139{
140 printk(KERN_INFO"via686b fix: IDE\n"); 140 printk(KERN_INFO"via686b fix: IDE\n");
141 141
@@ -168,19 +168,19 @@ static void __devinit loongson2e_686b_func1_fixup(struct pci_dev *pdev)
168 printk(KERN_INFO"via686b fix: IDE done\n"); 168 printk(KERN_INFO"via686b fix: IDE done\n");
169} 169}
170 170
171static void __devinit loongson2e_686b_func2_fixup(struct pci_dev *pdev) 171static void loongson2e_686b_func2_fixup(struct pci_dev *pdev)
172{ 172{
173 /* irq routing */ 173 /* irq routing */
174 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 10); 174 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 10);
175} 175}
176 176
177static void __devinit loongson2e_686b_func3_fixup(struct pci_dev *pdev) 177static void loongson2e_686b_func3_fixup(struct pci_dev *pdev)
178{ 178{
179 /* irq routing */ 179 /* irq routing */
180 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 11); 180 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 11);
181} 181}
182 182
183static void __devinit loongson2e_686b_func5_fixup(struct pci_dev *pdev) 183static void loongson2e_686b_func5_fixup(struct pci_dev *pdev)
184{ 184{
185 unsigned int val; 185 unsigned int val;
186 unsigned char c; 186 unsigned char c;
diff --git a/arch/mips/pci/fixup-lemote2f.c b/arch/mips/pci/fixup-lemote2f.c
index a7b917dcf604..519daaebb5da 100644
--- a/arch/mips/pci/fixup-lemote2f.c
+++ b/arch/mips/pci/fixup-lemote2f.c
@@ -96,21 +96,21 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
96} 96}
97 97
98/* CS5536 SPEC. fixup */ 98/* CS5536 SPEC. fixup */
99static void __devinit loongson_cs5536_isa_fixup(struct pci_dev *pdev) 99static void loongson_cs5536_isa_fixup(struct pci_dev *pdev)
100{ 100{
101 /* the uart1 and uart2 interrupt in PIC is enabled as default */ 101 /* the uart1 and uart2 interrupt in PIC is enabled as default */
102 pci_write_config_dword(pdev, PCI_UART1_INT_REG, 1); 102 pci_write_config_dword(pdev, PCI_UART1_INT_REG, 1);
103 pci_write_config_dword(pdev, PCI_UART2_INT_REG, 1); 103 pci_write_config_dword(pdev, PCI_UART2_INT_REG, 1);
104} 104}
105 105
106static void __devinit loongson_cs5536_ide_fixup(struct pci_dev *pdev) 106static void loongson_cs5536_ide_fixup(struct pci_dev *pdev)
107{ 107{
108 /* setting the mutex pin as IDE function */ 108 /* setting the mutex pin as IDE function */
109 pci_write_config_dword(pdev, PCI_IDE_CFG_REG, 109 pci_write_config_dword(pdev, PCI_IDE_CFG_REG,
110 CS5536_IDE_FLASH_SIGNATURE); 110 CS5536_IDE_FLASH_SIGNATURE);
111} 111}
112 112
113static void __devinit loongson_cs5536_acc_fixup(struct pci_dev *pdev) 113static void loongson_cs5536_acc_fixup(struct pci_dev *pdev)
114{ 114{
115 /* enable the AUDIO interrupt in PIC */ 115 /* enable the AUDIO interrupt in PIC */
116 pci_write_config_dword(pdev, PCI_ACC_INT_REG, 1); 116 pci_write_config_dword(pdev, PCI_ACC_INT_REG, 1);
@@ -118,14 +118,14 @@ static void __devinit loongson_cs5536_acc_fixup(struct pci_dev *pdev)
118 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xc0); 118 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xc0);
119} 119}
120 120
121static void __devinit loongson_cs5536_ohci_fixup(struct pci_dev *pdev) 121static void loongson_cs5536_ohci_fixup(struct pci_dev *pdev)
122{ 122{
123 /* enable the OHCI interrupt in PIC */ 123 /* enable the OHCI interrupt in PIC */
124 /* THE OHCI, EHCI, UDC, OTG are shared with interrupt in PIC */ 124 /* THE OHCI, EHCI, UDC, OTG are shared with interrupt in PIC */
125 pci_write_config_dword(pdev, PCI_OHCI_INT_REG, 1); 125 pci_write_config_dword(pdev, PCI_OHCI_INT_REG, 1);
126} 126}
127 127
128static void __devinit loongson_cs5536_ehci_fixup(struct pci_dev *pdev) 128static void loongson_cs5536_ehci_fixup(struct pci_dev *pdev)
129{ 129{
130 u32 hi, lo; 130 u32 hi, lo;
131 131
@@ -137,7 +137,7 @@ static void __devinit loongson_cs5536_ehci_fixup(struct pci_dev *pdev)
137 pci_write_config_dword(pdev, PCI_EHCI_FLADJ_REG, 0x2000); 137 pci_write_config_dword(pdev, PCI_EHCI_FLADJ_REG, 0x2000);
138} 138}
139 139
140static void __devinit loongson_nec_fixup(struct pci_dev *pdev) 140static void loongson_nec_fixup(struct pci_dev *pdev)
141{ 141{
142 unsigned int val; 142 unsigned int val;
143 143
diff --git a/arch/mips/pci/fixup-malta.c b/arch/mips/pci/fixup-malta.c
index 9a1a2244522a..75d03f6be3bd 100644
--- a/arch/mips/pci/fixup-malta.c
+++ b/arch/mips/pci/fixup-malta.c
@@ -8,7 +8,7 @@
8#define PCID 4 8#define PCID 4
9 9
10/* This table is filled in by interrogating the PIIX4 chip */ 10/* This table is filled in by interrogating the PIIX4 chip */
11static char pci_irq[5] __devinitdata = { 11static char pci_irq[5] = {
12}; 12};
13 13
14static char irq_tab[][5] __initdata = { 14static char irq_tab[][5] __initdata = {
@@ -50,10 +50,10 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
50 return 0; 50 return 0;
51} 51}
52 52
53static void __devinit malta_piix_func0_fixup(struct pci_dev *pdev) 53static void malta_piix_func0_fixup(struct pci_dev *pdev)
54{ 54{
55 unsigned char reg_val; 55 unsigned char reg_val;
56 static int piixirqmap[16] __devinitdata = { /* PIIX PIRQC[A:D] irq mappings */ 56 static int piixirqmap[16] = { /* PIIX PIRQC[A:D] irq mappings */
57 0, 0, 0, 3, 57 0, 0, 0, 3,
58 4, 5, 6, 7, 58 4, 5, 6, 7,
59 0, 9, 10, 11, 59 0, 9, 10, 11,
@@ -84,7 +84,7 @@ static void __devinit malta_piix_func0_fixup(struct pci_dev *pdev)
84DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0, 84DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0,
85 malta_piix_func0_fixup); 85 malta_piix_func0_fixup);
86 86
87static void __devinit malta_piix_func1_fixup(struct pci_dev *pdev) 87static void malta_piix_func1_fixup(struct pci_dev *pdev)
88{ 88{
89 unsigned char reg_val; 89 unsigned char reg_val;
90 90
@@ -104,7 +104,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB,
104 malta_piix_func1_fixup); 104 malta_piix_func1_fixup);
105 105
106/* Enable PCI 2.1 compatibility in PIIX4 */ 106/* Enable PCI 2.1 compatibility in PIIX4 */
107static void __devinit quirk_dlcsetup(struct pci_dev *dev) 107static void quirk_dlcsetup(struct pci_dev *dev)
108{ 108{
109 u8 odlc, ndlc; 109 u8 odlc, ndlc;
110 110
diff --git a/arch/mips/pci/fixup-rc32434.c b/arch/mips/pci/fixup-rc32434.c
index 76bb1be99d43..d0f6ecbf35f7 100644
--- a/arch/mips/pci/fixup-rc32434.c
+++ b/arch/mips/pci/fixup-rc32434.c
@@ -32,12 +32,12 @@
32#include <asm/mach-rc32434/rc32434.h> 32#include <asm/mach-rc32434/rc32434.h>
33#include <asm/mach-rc32434/irq.h> 33#include <asm/mach-rc32434/irq.h>
34 34
35static int __devinitdata irq_map[2][12] = { 35static int irq_map[2][12] = {
36 {0, 0, 2, 3, 2, 3, 0, 0, 0, 0, 0, 1}, 36 {0, 0, 2, 3, 2, 3, 0, 0, 0, 0, 0, 1},
37 {0, 0, 1, 3, 0, 2, 1, 3, 0, 2, 1, 3} 37 {0, 0, 1, 3, 0, 2, 1, 3, 0, 2, 1, 3}
38}; 38};
39 39
40int __devinit pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 40int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
41{ 41{
42 int irq = 0; 42 int irq = 0;
43 43
@@ -47,7 +47,7 @@ int __devinit pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
47 return irq + GROUP4_IRQ_BASE + 4; 47 return irq + GROUP4_IRQ_BASE + 4;
48} 48}
49 49
50static void __devinit rc32434_pci_early_fixup(struct pci_dev *dev) 50static void rc32434_pci_early_fixup(struct pci_dev *dev)
51{ 51{
52 if (PCI_SLOT(dev->devfn) == 6 && dev->bus->number == 0) { 52 if (PCI_SLOT(dev->devfn) == 6 && dev->bus->number == 0) {
53 /* disable prefetched memory range */ 53 /* disable prefetched memory range */
diff --git a/arch/mips/pci/fixup-sb1250.c b/arch/mips/pci/fixup-sb1250.c
index d02900a72916..1441becdcb6c 100644
--- a/arch/mips/pci/fixup-sb1250.c
+++ b/arch/mips/pci/fixup-sb1250.c
@@ -15,7 +15,7 @@
15 * Set the BCM1250, etc. PCI host bridge's TRDY timeout 15 * Set the BCM1250, etc. PCI host bridge's TRDY timeout
16 * to the finite max. 16 * to the finite max.
17 */ 17 */
18static void __devinit quirk_sb1250_pci(struct pci_dev *dev) 18static void quirk_sb1250_pci(struct pci_dev *dev)
19{ 19{
20 pci_write_config_byte(dev, 0x40, 0xff); 20 pci_write_config_byte(dev, 0x40, 0xff);
21} 21}
@@ -25,7 +25,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIBYTE, PCI_DEVICE_ID_BCM1250_PCI,
25/* 25/*
26 * The BCM1250, etc. PCI/HT bridge reports as a host bridge. 26 * The BCM1250, etc. PCI/HT bridge reports as a host bridge.
27 */ 27 */
28static void __devinit quirk_sb1250_ht(struct pci_dev *dev) 28static void quirk_sb1250_ht(struct pci_dev *dev)
29{ 29{
30 dev->class = PCI_CLASS_BRIDGE_PCI << 8; 30 dev->class = PCI_CLASS_BRIDGE_PCI << 8;
31} 31}
@@ -35,7 +35,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIBYTE, PCI_DEVICE_ID_BCM1250_HT,
35/* 35/*
36 * Set the SP1011 HT/PCI bridge's TRDY timeout to the finite max. 36 * Set the SP1011 HT/PCI bridge's TRDY timeout to the finite max.
37 */ 37 */
38static void __devinit quirk_sp1011(struct pci_dev *dev) 38static void quirk_sp1011(struct pci_dev *dev)
39{ 39{
40 pci_write_config_byte(dev, 0x64, 0xff); 40 pci_write_config_byte(dev, 0x64, 0xff);
41} 41}
diff --git a/arch/mips/pci/ops-bcm63xx.c b/arch/mips/pci/ops-bcm63xx.c
index 65c7bd100486..4a156629e958 100644
--- a/arch/mips/pci/ops-bcm63xx.c
+++ b/arch/mips/pci/ops-bcm63xx.c
@@ -411,7 +411,7 @@ struct pci_ops bcm63xx_cb_ops = {
411 * only one IO window, so it cannot be shared by PCI and cardbus, use 411 * only one IO window, so it cannot be shared by PCI and cardbus, use
412 * fixup to choose and detect unhandled configuration 412 * fixup to choose and detect unhandled configuration
413 */ 413 */
414static void __devinit bcm63xx_fixup(struct pci_dev *dev) 414static void bcm63xx_fixup(struct pci_dev *dev)
415{ 415{
416 static int io_window = -1; 416 static int io_window = -1;
417 int i, found, new_io_window; 417 int i, found, new_io_window;
diff --git a/arch/mips/pci/ops-tx4927.c b/arch/mips/pci/ops-tx4927.c
index bc13e29d2bb3..0d69d6f4ea44 100644
--- a/arch/mips/pci/ops-tx4927.c
+++ b/arch/mips/pci/ops-tx4927.c
@@ -191,13 +191,13 @@ static struct {
191 u8 trdyto; 191 u8 trdyto;
192 u8 retryto; 192 u8 retryto;
193 u16 gbwc; 193 u16 gbwc;
194} tx4927_pci_opts __devinitdata = { 194} tx4927_pci_opts = {
195 .trdyto = 0, 195 .trdyto = 0,
196 .retryto = 0, 196 .retryto = 0,
197 .gbwc = 0xfe0, /* 4064 GBUSCLK for CCFG.GTOT=0b11 */ 197 .gbwc = 0xfe0, /* 4064 GBUSCLK for CCFG.GTOT=0b11 */
198}; 198};
199 199
200char *__devinit tx4927_pcibios_setup(char *str) 200char *tx4927_pcibios_setup(char *str)
201{ 201{
202 unsigned long val; 202 unsigned long val;
203 203
@@ -495,7 +495,7 @@ irqreturn_t tx4927_pcierr_interrupt(int irq, void *dev_id)
495} 495}
496 496
497#ifdef CONFIG_TOSHIBA_FPCIB0 497#ifdef CONFIG_TOSHIBA_FPCIB0
498static void __devinit tx4927_quirk_slc90e66_bridge(struct pci_dev *dev) 498static void tx4927_quirk_slc90e66_bridge(struct pci_dev *dev)
499{ 499{
500 struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(dev->bus); 500 struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(dev->bus);
501 501
diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c
index ec125bed721c..c4ea6cc55f94 100644
--- a/arch/mips/pci/pci-alchemy.c
+++ b/arch/mips/pci/pci-alchemy.c
@@ -356,7 +356,7 @@ static struct syscore_ops alchemy_pci_pmops = {
356 .resume = alchemy_pci_resume, 356 .resume = alchemy_pci_resume,
357}; 357};
358 358
359static int __devinit alchemy_pci_probe(struct platform_device *pdev) 359static int alchemy_pci_probe(struct platform_device *pdev)
360{ 360{
361 struct alchemy_pci_platdata *pd = pdev->dev.platform_data; 361 struct alchemy_pci_platdata *pd = pdev->dev.platform_data;
362 struct alchemy_pci_context *ctx; 362 struct alchemy_pci_context *ctx;
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
index fdc24440294c..7f4f49b09b5b 100644
--- a/arch/mips/pci/pci-ip27.c
+++ b/arch/mips/pci/pci-ip27.c
@@ -143,7 +143,7 @@ int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid)
143 * A given PCI device, in general, should be able to intr any of the cpus 143 * A given PCI device, in general, should be able to intr any of the cpus
144 * on any one of the hubs connected to its xbow. 144 * on any one of the hubs connected to its xbow.
145 */ 145 */
146int __devinit pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 146int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
147{ 147{
148 return 0; 148 return 0;
149} 149}
@@ -212,7 +212,7 @@ static inline void pci_enable_swapping(struct pci_dev *dev)
212 bridge->b_widget.w_tflush; /* Flush */ 212 bridge->b_widget.w_tflush; /* Flush */
213} 213}
214 214
215static void __devinit pci_fixup_ioc3(struct pci_dev *d) 215static void pci_fixup_ioc3(struct pci_dev *d)
216{ 216{
217 pci_disable_swapping(d); 217 pci_disable_swapping(d);
218} 218}
diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
index 075d87acd12a..95681789b51e 100644
--- a/arch/mips/pci/pci-lantiq.c
+++ b/arch/mips/pci/pci-lantiq.c
@@ -95,7 +95,7 @@ static inline u32 ltq_calc_bar11mask(void)
95 return bar11mask; 95 return bar11mask;
96} 96}
97 97
98static int __devinit ltq_pci_startup(struct platform_device *pdev) 98static int ltq_pci_startup(struct platform_device *pdev)
99{ 99{
100 struct device_node *node = pdev->dev.of_node; 100 struct device_node *node = pdev->dev.of_node;
101 const __be32 *req_mask, *bus_clk; 101 const __be32 *req_mask, *bus_clk;
@@ -201,7 +201,7 @@ static int __devinit ltq_pci_startup(struct platform_device *pdev)
201 return 0; 201 return 0;
202} 202}
203 203
204static int __devinit ltq_pci_probe(struct platform_device *pdev) 204static int ltq_pci_probe(struct platform_device *pdev)
205{ 205{
206 struct resource *res_cfg, *res_bridge; 206 struct resource *res_cfg, *res_bridge;
207 207
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 4040416e0603..a1843448fad3 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -76,7 +76,7 @@ pcibios_align_resource(void *data, const struct resource *res,
76 return start; 76 return start;
77} 77}
78 78
79static void __devinit pcibios_scanbus(struct pci_controller *hose) 79static void pcibios_scanbus(struct pci_controller *hose)
80{ 80{
81 static int next_busno; 81 static int next_busno;
82 static int need_domain_info; 82 static int need_domain_info;
@@ -120,8 +120,7 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose)
120} 120}
121 121
122#ifdef CONFIG_OF 122#ifdef CONFIG_OF
123void __devinit pci_load_of_ranges(struct pci_controller *hose, 123void pci_load_of_ranges(struct pci_controller *hose, struct device_node *node)
124 struct device_node *node)
125{ 124{
126 const __be32 *ranges; 125 const __be32 *ranges;
127 int rlen; 126 int rlen;
@@ -174,7 +173,7 @@ void __devinit pci_load_of_ranges(struct pci_controller *hose,
174 173
175static DEFINE_MUTEX(pci_scan_mutex); 174static DEFINE_MUTEX(pci_scan_mutex);
176 175
177void __devinit register_pci_controller(struct pci_controller *hose) 176void register_pci_controller(struct pci_controller *hose)
178{ 177{
179 if (request_resource(&iomem_resource, hose->mem_resource) < 0) 178 if (request_resource(&iomem_resource, hose->mem_resource) < 0)
180 goto out; 179 goto out;
@@ -303,7 +302,7 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
303 return pcibios_plat_dev_init(dev); 302 return pcibios_plat_dev_init(dev);
304} 303}
305 304
306void __devinit pcibios_fixup_bus(struct pci_bus *bus) 305void pcibios_fixup_bus(struct pci_bus *bus)
307{ 306{
308 struct pci_dev *dev = bus->self; 307 struct pci_dev *dev = bus->self;
309 308
diff --git a/arch/mips/power/hibernate.S b/arch/mips/power/hibernate.S
index f8a751c03282..61e2558a2dcb 100644
--- a/arch/mips/power/hibernate.S
+++ b/arch/mips/power/hibernate.S
@@ -8,7 +8,6 @@
8 * Wu Zhangjin <wuzhangjin@gmail.com> 8 * Wu Zhangjin <wuzhangjin@gmail.com>
9 */ 9 */
10#include <asm/asm-offsets.h> 10#include <asm/asm-offsets.h>
11#include <asm/page.h>
12#include <asm/regdef.h> 11#include <asm/regdef.h>
13#include <asm/asm.h> 12#include <asm/asm.h>
14 13
@@ -35,7 +34,7 @@ LEAF(swsusp_arch_resume)
350: 340:
36 PTR_L t1, PBE_ADDRESS(t0) /* source */ 35 PTR_L t1, PBE_ADDRESS(t0) /* source */
37 PTR_L t2, PBE_ORIG_ADDRESS(t0) /* destination */ 36 PTR_L t2, PBE_ORIG_ADDRESS(t0) /* destination */
38 PTR_ADDU t3, t1, PAGE_SIZE 37 PTR_ADDU t3, t1, _PAGE_SIZE
391: 381:
40 REG_L t8, (t1) 39 REG_L t8, (t1)
41 REG_S t8, (t2) 40 REG_S t8, (t2)
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index d6c7bd4b5ab0..2e9c283b8e68 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -236,7 +236,7 @@ void __init plat_mem_setup(void)
236#include <video/vga.h> 236#include <video/vga.h>
237#include <video/cirrus.h> 237#include <video/cirrus.h>
238 238
239static void __devinit quirk_cirrus_ram_size(struct pci_dev *dev) 239static void quirk_cirrus_ram_size(struct pci_dev *dev)
240{ 240{
241 u16 cmd; 241 u16 cmd;
242 242
diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c
index b14ee53581a9..ce8f8b9b930c 100644
--- a/arch/mips/txx9/generic/pci.c
+++ b/arch/mips/txx9/generic/pci.c
@@ -256,8 +256,7 @@ static irqreturn_t i8259_interrupt(int irq, void *dev_id)
256 return IRQ_HANDLED; 256 return IRQ_HANDLED;
257} 257}
258 258
259static int __devinit 259static int txx9_i8259_irq_setup(int irq)
260txx9_i8259_irq_setup(int irq)
261{ 260{
262 int err; 261 int err;
263 262
@@ -269,7 +268,7 @@ txx9_i8259_irq_setup(int irq)
269 return err; 268 return err;
270} 269}
271 270
272static void __devinit quirk_slc90e66_bridge(struct pci_dev *dev) 271static void quirk_slc90e66_bridge(struct pci_dev *dev)
273{ 272{
274 int irq; /* PCI/ISA Bridge interrupt */ 273 int irq; /* PCI/ISA Bridge interrupt */
275 u8 reg_64; 274 u8 reg_64;
@@ -304,7 +303,7 @@ static void __devinit quirk_slc90e66_bridge(struct pci_dev *dev)
304 smsc_fdc37m81x_config_end(); 303 smsc_fdc37m81x_config_end();
305} 304}
306 305
307static void __devinit quirk_slc90e66_ide(struct pci_dev *dev) 306static void quirk_slc90e66_ide(struct pci_dev *dev)
308{ 307{
309 unsigned char dat; 308 unsigned char dat;
310 int regs[2] = {0x41, 0x43}; 309 int regs[2] = {0x41, 0x43};
@@ -339,7 +338,7 @@ static void __devinit quirk_slc90e66_ide(struct pci_dev *dev)
339} 338}
340#endif /* CONFIG_TOSHIBA_FPCIB0 */ 339#endif /* CONFIG_TOSHIBA_FPCIB0 */
341 340
342static void __devinit tc35815_fixup(struct pci_dev *dev) 341static void tc35815_fixup(struct pci_dev *dev)
343{ 342{
344 /* This device may have PM registers but not they are not supported. */ 343 /* This device may have PM registers but not they are not supported. */
345 if (dev->pm_cap) { 344 if (dev->pm_cap) {
@@ -348,7 +347,7 @@ static void __devinit tc35815_fixup(struct pci_dev *dev)
348 } 347 }
349} 348}
350 349
351static void __devinit final_fixup(struct pci_dev *dev) 350static void final_fixup(struct pci_dev *dev)
352{ 351{
353 unsigned char bist; 352 unsigned char bist;
354 353
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-10 21:10:35 -0500