diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2011-03-23 17:09:08 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2011-03-25 13:45:18 -0400 |
commit | 8fcc34e5ce0a94157349db5a060fbd3656100c6b (patch) | |
tree | 44a6094946a5062c7c83062afb57658a7583e8a1 /arch/mips | |
parent | d7881fbdf866d7d0fc3fd65805b47a837217ba2b (diff) |
MIPS: PNX83xx: Convert to new irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2198/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/pnx833x/common/interrupts.c | 98 |
1 files changed, 16 insertions, 82 deletions
diff --git a/arch/mips/pnx833x/common/interrupts.c b/arch/mips/pnx833x/common/interrupts.c index 941916f8aaff..b226bcb0a2f4 100644 --- a/arch/mips/pnx833x/common/interrupts.c +++ b/arch/mips/pnx833x/common/interrupts.c | |||
@@ -152,10 +152,6 @@ static inline void pnx833x_hard_disable_pic_irq(unsigned int irq) | |||
152 | PNX833X_PIC_INT_REG(irq) = 0; | 152 | PNX833X_PIC_INT_REG(irq) = 0; |
153 | } | 153 | } |
154 | 154 | ||
155 | static int irqflags[PNX833X_PIC_NUM_IRQ]; /* initialized by zeroes */ | ||
156 | #define IRQFLAG_STARTED 1 | ||
157 | #define IRQFLAG_DISABLED 2 | ||
158 | |||
159 | static DEFINE_RAW_SPINLOCK(pnx833x_irq_lock); | 155 | static DEFINE_RAW_SPINLOCK(pnx833x_irq_lock); |
160 | 156 | ||
161 | static unsigned int pnx833x_startup_pic_irq(unsigned int irq) | 157 | static unsigned int pnx833x_startup_pic_irq(unsigned int irq) |
@@ -164,108 +160,54 @@ static unsigned int pnx833x_startup_pic_irq(unsigned int irq) | |||
164 | unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; | 160 | unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; |
165 | 161 | ||
166 | raw_spin_lock_irqsave(&pnx833x_irq_lock, flags); | 162 | raw_spin_lock_irqsave(&pnx833x_irq_lock, flags); |
167 | |||
168 | irqflags[pic_irq] = IRQFLAG_STARTED; /* started, not disabled */ | ||
169 | pnx833x_hard_enable_pic_irq(pic_irq); | 163 | pnx833x_hard_enable_pic_irq(pic_irq); |
170 | |||
171 | raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags); | 164 | raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags); |
172 | return 0; | 165 | return 0; |
173 | } | 166 | } |
174 | 167 | ||
175 | static void pnx833x_shutdown_pic_irq(unsigned int irq) | 168 | static void pnx833x_enable_pic_irq(struct irq_data *d) |
176 | { | ||
177 | unsigned long flags; | ||
178 | unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; | ||
179 | |||
180 | raw_spin_lock_irqsave(&pnx833x_irq_lock, flags); | ||
181 | |||
182 | irqflags[pic_irq] = 0; /* not started */ | ||
183 | pnx833x_hard_disable_pic_irq(pic_irq); | ||
184 | |||
185 | raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags); | ||
186 | } | ||
187 | |||
188 | static void pnx833x_enable_pic_irq(unsigned int irq) | ||
189 | { | 169 | { |
190 | unsigned long flags; | 170 | unsigned long flags; |
191 | unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; | 171 | unsigned int pic_irq = d->irq - PNX833X_PIC_IRQ_BASE; |
192 | 172 | ||
193 | raw_spin_lock_irqsave(&pnx833x_irq_lock, flags); | 173 | raw_spin_lock_irqsave(&pnx833x_irq_lock, flags); |
194 | 174 | pnx833x_hard_enable_pic_irq(pic_irq); | |
195 | irqflags[pic_irq] &= ~IRQFLAG_DISABLED; | ||
196 | if (irqflags[pic_irq] == IRQFLAG_STARTED) | ||
197 | pnx833x_hard_enable_pic_irq(pic_irq); | ||
198 | |||
199 | raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags); | 175 | raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags); |
200 | } | 176 | } |
201 | 177 | ||
202 | static void pnx833x_disable_pic_irq(unsigned int irq) | 178 | static void pnx833x_disable_pic_irq(struct irq_data *d) |
203 | { | 179 | { |
204 | unsigned long flags; | 180 | unsigned long flags; |
205 | unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; | 181 | unsigned int pic_irq = d->irq - PNX833X_PIC_IRQ_BASE; |
206 | 182 | ||
207 | raw_spin_lock_irqsave(&pnx833x_irq_lock, flags); | 183 | raw_spin_lock_irqsave(&pnx833x_irq_lock, flags); |
208 | |||
209 | irqflags[pic_irq] |= IRQFLAG_DISABLED; | ||
210 | pnx833x_hard_disable_pic_irq(pic_irq); | 184 | pnx833x_hard_disable_pic_irq(pic_irq); |
211 | |||
212 | raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags); | 185 | raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags); |
213 | } | 186 | } |
214 | 187 | ||
215 | static void pnx833x_ack_pic_irq(unsigned int irq) | ||
216 | { | ||
217 | } | ||
218 | |||
219 | static void pnx833x_end_pic_irq(unsigned int irq) | ||
220 | { | ||
221 | } | ||
222 | |||
223 | static DEFINE_RAW_SPINLOCK(pnx833x_gpio_pnx833x_irq_lock); | 188 | static DEFINE_RAW_SPINLOCK(pnx833x_gpio_pnx833x_irq_lock); |
224 | 189 | ||
225 | static unsigned int pnx833x_startup_gpio_irq(unsigned int irq) | 190 | static void pnx833x_enable_gpio_irq(struct irq_data *d) |
226 | { | ||
227 | int pin = irq - PNX833X_GPIO_IRQ_BASE; | ||
228 | unsigned long flags; | ||
229 | raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags); | ||
230 | pnx833x_gpio_enable_irq(pin); | ||
231 | raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags); | ||
232 | return 0; | ||
233 | } | ||
234 | |||
235 | static void pnx833x_enable_gpio_irq(unsigned int irq) | ||
236 | { | 191 | { |
237 | int pin = irq - PNX833X_GPIO_IRQ_BASE; | 192 | int pin = d->irq - PNX833X_GPIO_IRQ_BASE; |
238 | unsigned long flags; | 193 | unsigned long flags; |
239 | raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags); | 194 | raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags); |
240 | pnx833x_gpio_enable_irq(pin); | 195 | pnx833x_gpio_enable_irq(pin); |
241 | raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags); | 196 | raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags); |
242 | } | 197 | } |
243 | 198 | ||
244 | static void pnx833x_disable_gpio_irq(unsigned int irq) | 199 | static void pnx833x_disable_gpio_irq(struct irq_data *d) |
245 | { | 200 | { |
246 | int pin = irq - PNX833X_GPIO_IRQ_BASE; | 201 | int pin = d->irq - PNX833X_GPIO_IRQ_BASE; |
247 | unsigned long flags; | 202 | unsigned long flags; |
248 | raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags); | 203 | raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags); |
249 | pnx833x_gpio_disable_irq(pin); | 204 | pnx833x_gpio_disable_irq(pin); |
250 | raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags); | 205 | raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags); |
251 | } | 206 | } |
252 | 207 | ||
253 | static void pnx833x_ack_gpio_irq(unsigned int irq) | 208 | static int pnx833x_set_type_gpio_irq(struct irq_data *d, unsigned int flow_type) |
254 | { | ||
255 | } | ||
256 | |||
257 | static void pnx833x_end_gpio_irq(unsigned int irq) | ||
258 | { | ||
259 | int pin = irq - PNX833X_GPIO_IRQ_BASE; | ||
260 | unsigned long flags; | ||
261 | raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags); | ||
262 | pnx833x_gpio_clear_irq(pin); | ||
263 | raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags); | ||
264 | } | ||
265 | |||
266 | static int pnx833x_set_type_gpio_irq(unsigned int irq, unsigned int flow_type) | ||
267 | { | 209 | { |
268 | int pin = irq - PNX833X_GPIO_IRQ_BASE; | 210 | int pin = d->irq - PNX833X_GPIO_IRQ_BASE; |
269 | int gpio_mode; | 211 | int gpio_mode; |
270 | 212 | ||
271 | switch (flow_type) { | 213 | switch (flow_type) { |
@@ -296,23 +238,15 @@ static int pnx833x_set_type_gpio_irq(unsigned int irq, unsigned int flow_type) | |||
296 | 238 | ||
297 | static struct irq_chip pnx833x_pic_irq_type = { | 239 | static struct irq_chip pnx833x_pic_irq_type = { |
298 | .name = "PNX-PIC", | 240 | .name = "PNX-PIC", |
299 | .startup = pnx833x_startup_pic_irq, | 241 | .irq_enable = pnx833x_enable_pic_irq, |
300 | .shutdown = pnx833x_shutdown_pic_irq, | 242 | .irq_disable = pnx833x_disable_pic_irq, |
301 | .enable = pnx833x_enable_pic_irq, | ||
302 | .disable = pnx833x_disable_pic_irq, | ||
303 | .ack = pnx833x_ack_pic_irq, | ||
304 | .end = pnx833x_end_pic_irq | ||
305 | }; | 243 | }; |
306 | 244 | ||
307 | static struct irq_chip pnx833x_gpio_irq_type = { | 245 | static struct irq_chip pnx833x_gpio_irq_type = { |
308 | .name = "PNX-GPIO", | 246 | .name = "PNX-GPIO", |
309 | .startup = pnx833x_startup_gpio_irq, | 247 | .irq_enable = pnx833x_enable_gpio_irq, |
310 | .shutdown = pnx833x_disable_gpio_irq, | 248 | .irq_disable = pnx833x_disable_gpio_irq, |
311 | .enable = pnx833x_enable_gpio_irq, | 249 | .irq_set_type = pnx833x_set_type_gpio_irq, |
312 | .disable = pnx833x_disable_gpio_irq, | ||
313 | .ack = pnx833x_ack_gpio_irq, | ||
314 | .end = pnx833x_end_gpio_irq, | ||
315 | .set_type = pnx833x_set_type_gpio_irq | ||
316 | }; | 250 | }; |
317 | 251 | ||
318 | void __init arch_init_irq(void) | 252 | void __init arch_init_irq(void) |