diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2006-10-07 14:44:33 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-10-07 21:38:28 -0400 |
commit | 937a801576f954bd030d7c4a5a94571710d87c0b (patch) | |
tree | 48d3440f765b56cf32a89b4b8193dd033d8227a8 /arch/mips/vr41xx | |
parent | 31aa36658a123263a9a69896e348b9600e050679 (diff) |
[MIPS] Complete fixes after removal of pt_regs argument to int handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/vr41xx')
-rw-r--r-- | arch/mips/vr41xx/common/icu.c | 2 | ||||
-rw-r--r-- | arch/mips/vr41xx/common/irq.c | 32 |
2 files changed, 17 insertions, 17 deletions
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index 7a5c31d58378..c215c0d39fae 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c | |||
@@ -635,7 +635,7 @@ int vr41xx_set_intassign(unsigned int irq, unsigned char intassign) | |||
635 | 635 | ||
636 | EXPORT_SYMBOL(vr41xx_set_intassign); | 636 | EXPORT_SYMBOL(vr41xx_set_intassign); |
637 | 637 | ||
638 | static int icu_get_irq(unsigned int irq, struct pt_regs *regs) | 638 | static int icu_get_irq(unsigned int irq) |
639 | { | 639 | { |
640 | uint16_t pend1, pend2; | 640 | uint16_t pend1, pend2; |
641 | uint16_t mask1, mask2; | 641 | uint16_t mask1, mask2; |
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c index 4733c5344467..397ba94cd7ec 100644 --- a/arch/mips/vr41xx/common/irq.c +++ b/arch/mips/vr41xx/common/irq.c | |||
@@ -25,7 +25,7 @@ | |||
25 | #include <asm/vr41xx/irq.h> | 25 | #include <asm/vr41xx/irq.h> |
26 | 26 | ||
27 | typedef struct irq_cascade { | 27 | typedef struct irq_cascade { |
28 | int (*get_irq)(unsigned int, struct pt_regs *); | 28 | int (*get_irq)(unsigned int); |
29 | } irq_cascade_t; | 29 | } irq_cascade_t; |
30 | 30 | ||
31 | static irq_cascade_t irq_cascade[NR_IRQS] __cacheline_aligned; | 31 | static irq_cascade_t irq_cascade[NR_IRQS] __cacheline_aligned; |
@@ -36,7 +36,7 @@ static struct irqaction cascade_irqaction = { | |||
36 | .name = "cascade", | 36 | .name = "cascade", |
37 | }; | 37 | }; |
38 | 38 | ||
39 | int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int, struct pt_regs *)) | 39 | int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int)) |
40 | { | 40 | { |
41 | int retval = 0; | 41 | int retval = 0; |
42 | 42 | ||
@@ -59,7 +59,7 @@ int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int, struct pt_regs *) | |||
59 | 59 | ||
60 | EXPORT_SYMBOL_GPL(cascade_irq); | 60 | EXPORT_SYMBOL_GPL(cascade_irq); |
61 | 61 | ||
62 | static void irq_dispatch(unsigned int irq, struct pt_regs *regs) | 62 | static void irq_dispatch(unsigned int irq) |
63 | { | 63 | { |
64 | irq_cascade_t *cascade; | 64 | irq_cascade_t *cascade; |
65 | struct irq_desc *desc; | 65 | struct irq_desc *desc; |
@@ -74,39 +74,39 @@ static void irq_dispatch(unsigned int irq, struct pt_regs *regs) | |||
74 | unsigned int source_irq = irq; | 74 | unsigned int source_irq = irq; |
75 | desc = irq_desc + source_irq; | 75 | desc = irq_desc + source_irq; |
76 | desc->chip->ack(source_irq); | 76 | desc->chip->ack(source_irq); |
77 | irq = cascade->get_irq(irq, regs); | 77 | irq = cascade->get_irq(irq); |
78 | if (irq < 0) | 78 | if (irq < 0) |
79 | atomic_inc(&irq_err_count); | 79 | atomic_inc(&irq_err_count); |
80 | else | 80 | else |
81 | irq_dispatch(irq, regs); | 81 | irq_dispatch(irq); |
82 | desc->chip->end(source_irq); | 82 | desc->chip->end(source_irq); |
83 | } else | 83 | } else |
84 | do_IRQ(irq, regs); | 84 | do_IRQ(irq); |
85 | } | 85 | } |
86 | 86 | ||
87 | asmlinkage void plat_irq_dispatch(struct pt_regs *regs) | 87 | asmlinkage void plat_irq_dispatch(void) |
88 | { | 88 | { |
89 | unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; | 89 | unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; |
90 | 90 | ||
91 | if (pending & CAUSEF_IP7) | 91 | if (pending & CAUSEF_IP7) |
92 | do_IRQ(7, regs); | 92 | do_IRQ(7); |
93 | else if (pending & 0x7800) { | 93 | else if (pending & 0x7800) { |
94 | if (pending & CAUSEF_IP3) | 94 | if (pending & CAUSEF_IP3) |
95 | irq_dispatch(3, regs); | 95 | irq_dispatch(3); |
96 | else if (pending & CAUSEF_IP4) | 96 | else if (pending & CAUSEF_IP4) |
97 | irq_dispatch(4, regs); | 97 | irq_dispatch(4); |
98 | else if (pending & CAUSEF_IP5) | 98 | else if (pending & CAUSEF_IP5) |
99 | irq_dispatch(5, regs); | 99 | irq_dispatch(5); |
100 | else if (pending & CAUSEF_IP6) | 100 | else if (pending & CAUSEF_IP6) |
101 | irq_dispatch(6, regs); | 101 | irq_dispatch(6); |
102 | } else if (pending & CAUSEF_IP2) | 102 | } else if (pending & CAUSEF_IP2) |
103 | irq_dispatch(2, regs); | 103 | irq_dispatch(2); |
104 | else if (pending & CAUSEF_IP0) | 104 | else if (pending & CAUSEF_IP0) |
105 | do_IRQ(0, regs); | 105 | do_IRQ(0); |
106 | else if (pending & CAUSEF_IP1) | 106 | else if (pending & CAUSEF_IP1) |
107 | do_IRQ(1, regs); | 107 | do_IRQ(1); |
108 | else | 108 | else |
109 | spurious_interrupt(regs); | 109 | spurious_interrupt(); |
110 | } | 110 | } |
111 | 111 | ||
112 | void __init arch_init_irq(void) | 112 | void __init arch_init_irq(void) |