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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2006-11-13 11:13:18 -0500
committerRalf Baechle <ralf@linux-mips.org>2006-11-29 20:14:46 -0500
commit1417836e81c0ab8f5a0bfeafa90d3eaa41b2a067 (patch)
tree0274893cb78ca2e1bb85c3eee0c07a85e0b83d04 /arch/mips/vr41xx
parent1603b5aca4f15b34848fb5594d0c7b6333b99144 (diff)
[MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq
Further incorporation of generic irq framework. Replacing __do_IRQ() by proper flow handler would make the irq handling path a bit simpler and faster. * use generic_handle_irq() instead of __do_IRQ(). * use handle_level_irq for obvious level-type irq chips. * use handle_percpu_irq for irqs marked as IRQ_PER_CPU. * setup .eoi routine for irq chips possibly used with handle_percpu_irq. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/vr41xx')
-rw-r--r--arch/mips/vr41xx/common/icu.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c
index 33d70a6547ad..54b92a74c7ac 100644
--- a/arch/mips/vr41xx/common/icu.c
+++ b/arch/mips/vr41xx/common/icu.c
@@ -701,10 +701,12 @@ static int __init vr41xx_icu_init(void)
701 icu2_write(MGIUINTHREG, 0xffff); 701 icu2_write(MGIUINTHREG, 0xffff);
702 702
703 for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) 703 for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++)
704 set_irq_chip(i, &sysint1_irq_type); 704 set_irq_chip_and_handler(i, &sysint1_irq_type,
705 handle_level_irq);
705 706
706 for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) 707 for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++)
707 set_irq_chip(i, &sysint2_irq_type); 708 set_irq_chip_and_handler(i, &sysint2_irq_type,
709 handle_level_irq);
708 710
709 cascade_irq(INT0_IRQ, icu_get_irq); 711 cascade_irq(INT0_IRQ, icu_get_irq);
710 cascade_irq(INT1_IRQ, icu_get_irq); 712 cascade_irq(INT1_IRQ, icu_get_irq);