diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2006-11-01 12:08:36 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-11-29 20:14:46 -0500 |
commit | 1603b5aca4f15b34848fb5594d0c7b6333b99144 (patch) | |
tree | 79272aa41d6510b7256df62e287676885c3960cf /arch/mips/vr41xx | |
parent | c87b6ebaea034c0e0ce86127870cf1511a307b64 (diff) |
[MIPS] IRQ cleanups
This is a big irq cleanup patch.
* Use set_irq_chip() to register irq_chip.
* Initialize .mask, .unmask, .mask_ack field. Functions for these
method are already exist in most case.
* Do not initialize .startup, .shutdown, .enable, .disable fields if
default routines provided by irq_chip_set_defaults() were suitable.
* Remove redundant irq_desc initializations.
* Remove unnecessary local_irq_save/local_irq_restore, spin_lock.
With this cleanup, it would be easy to switch to slightly lightwait
irq flow handlers (handle_level_irq(), etc.) instead of __do_IRQ().
Though whole this patch is quite large, changes in each irq_chip are
not quite simple. Please review and test on your platform. Thanks.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/vr41xx')
-rw-r--r-- | arch/mips/vr41xx/common/icu.c | 46 | ||||
-rw-r--r-- | arch/mips/vr41xx/nec-cmbvr4133/irq.c | 20 |
2 files changed, 16 insertions, 50 deletions
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index c215c0d39fae..33d70a6547ad 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c | |||
@@ -417,14 +417,7 @@ void vr41xx_disable_bcuint(void) | |||
417 | 417 | ||
418 | EXPORT_SYMBOL(vr41xx_disable_bcuint); | 418 | EXPORT_SYMBOL(vr41xx_disable_bcuint); |
419 | 419 | ||
420 | static unsigned int startup_sysint1_irq(unsigned int irq) | 420 | static void disable_sysint1_irq(unsigned int irq) |
421 | { | ||
422 | icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); | ||
423 | |||
424 | return 0; /* never anything pending */ | ||
425 | } | ||
426 | |||
427 | static void shutdown_sysint1_irq(unsigned int irq) | ||
428 | { | 421 | { |
429 | icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); | 422 | icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); |
430 | } | 423 | } |
@@ -434,9 +427,6 @@ static void enable_sysint1_irq(unsigned int irq) | |||
434 | icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); | 427 | icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); |
435 | } | 428 | } |
436 | 429 | ||
437 | #define disable_sysint1_irq shutdown_sysint1_irq | ||
438 | #define ack_sysint1_irq shutdown_sysint1_irq | ||
439 | |||
440 | static void end_sysint1_irq(unsigned int irq) | 430 | static void end_sysint1_irq(unsigned int irq) |
441 | { | 431 | { |
442 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | 432 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) |
@@ -445,22 +435,14 @@ static void end_sysint1_irq(unsigned int irq) | |||
445 | 435 | ||
446 | static struct irq_chip sysint1_irq_type = { | 436 | static struct irq_chip sysint1_irq_type = { |
447 | .typename = "SYSINT1", | 437 | .typename = "SYSINT1", |
448 | .startup = startup_sysint1_irq, | 438 | .ack = disable_sysint1_irq, |
449 | .shutdown = shutdown_sysint1_irq, | 439 | .mask = disable_sysint1_irq, |
450 | .enable = enable_sysint1_irq, | 440 | .mask_ack = disable_sysint1_irq, |
451 | .disable = disable_sysint1_irq, | 441 | .unmask = enable_sysint1_irq, |
452 | .ack = ack_sysint1_irq, | ||
453 | .end = end_sysint1_irq, | 442 | .end = end_sysint1_irq, |
454 | }; | 443 | }; |
455 | 444 | ||
456 | static unsigned int startup_sysint2_irq(unsigned int irq) | 445 | static void disable_sysint2_irq(unsigned int irq) |
457 | { | ||
458 | icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); | ||
459 | |||
460 | return 0; /* never anything pending */ | ||
461 | } | ||
462 | |||
463 | static void shutdown_sysint2_irq(unsigned int irq) | ||
464 | { | 446 | { |
465 | icu2_clear(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); | 447 | icu2_clear(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); |
466 | } | 448 | } |
@@ -470,9 +452,6 @@ static void enable_sysint2_irq(unsigned int irq) | |||
470 | icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); | 452 | icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); |
471 | } | 453 | } |
472 | 454 | ||
473 | #define disable_sysint2_irq shutdown_sysint2_irq | ||
474 | #define ack_sysint2_irq shutdown_sysint2_irq | ||
475 | |||
476 | static void end_sysint2_irq(unsigned int irq) | 455 | static void end_sysint2_irq(unsigned int irq) |
477 | { | 456 | { |
478 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | 457 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) |
@@ -481,11 +460,10 @@ static void end_sysint2_irq(unsigned int irq) | |||
481 | 460 | ||
482 | static struct irq_chip sysint2_irq_type = { | 461 | static struct irq_chip sysint2_irq_type = { |
483 | .typename = "SYSINT2", | 462 | .typename = "SYSINT2", |
484 | .startup = startup_sysint2_irq, | 463 | .ack = disable_sysint2_irq, |
485 | .shutdown = shutdown_sysint2_irq, | 464 | .mask = disable_sysint2_irq, |
486 | .enable = enable_sysint2_irq, | 465 | .mask_ack = disable_sysint2_irq, |
487 | .disable = disable_sysint2_irq, | 466 | .unmask = enable_sysint2_irq, |
488 | .ack = ack_sysint2_irq, | ||
489 | .end = end_sysint2_irq, | 467 | .end = end_sysint2_irq, |
490 | }; | 468 | }; |
491 | 469 | ||
@@ -723,10 +701,10 @@ static int __init vr41xx_icu_init(void) | |||
723 | icu2_write(MGIUINTHREG, 0xffff); | 701 | icu2_write(MGIUINTHREG, 0xffff); |
724 | 702 | ||
725 | for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) | 703 | for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) |
726 | irq_desc[i].chip = &sysint1_irq_type; | 704 | set_irq_chip(i, &sysint1_irq_type); |
727 | 705 | ||
728 | for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) | 706 | for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) |
729 | irq_desc[i].chip = &sysint2_irq_type; | 707 | set_irq_chip(i, &sysint2_irq_type); |
730 | 708 | ||
731 | cascade_irq(INT0_IRQ, icu_get_irq); | 709 | cascade_irq(INT0_IRQ, icu_get_irq); |
732 | cascade_irq(INT1_IRQ, icu_get_irq); | 710 | cascade_irq(INT1_IRQ, icu_get_irq); |
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/irq.c b/arch/mips/vr41xx/nec-cmbvr4133/irq.c index 2483487344c2..a039bb7251ff 100644 --- a/arch/mips/vr41xx/nec-cmbvr4133/irq.c +++ b/arch/mips/vr41xx/nec-cmbvr4133/irq.c | |||
@@ -30,17 +30,6 @@ extern void init_8259A(int hoge); | |||
30 | 30 | ||
31 | extern int vr4133_rockhopper; | 31 | extern int vr4133_rockhopper; |
32 | 32 | ||
33 | static unsigned int startup_i8259_irq(unsigned int irq) | ||
34 | { | ||
35 | enable_8259A_irq(irq - I8259_IRQ_BASE); | ||
36 | return 0; | ||
37 | } | ||
38 | |||
39 | static void shutdown_i8259_irq(unsigned int irq) | ||
40 | { | ||
41 | disable_8259A_irq(irq - I8259_IRQ_BASE); | ||
42 | } | ||
43 | |||
44 | static void enable_i8259_irq(unsigned int irq) | 33 | static void enable_i8259_irq(unsigned int irq) |
45 | { | 34 | { |
46 | enable_8259A_irq(irq - I8259_IRQ_BASE); | 35 | enable_8259A_irq(irq - I8259_IRQ_BASE); |
@@ -64,11 +53,10 @@ static void end_i8259_irq(unsigned int irq) | |||
64 | 53 | ||
65 | static struct irq_chip i8259_irq_type = { | 54 | static struct irq_chip i8259_irq_type = { |
66 | .typename = "XT-PIC", | 55 | .typename = "XT-PIC", |
67 | .startup = startup_i8259_irq, | ||
68 | .shutdown = shutdown_i8259_irq, | ||
69 | .enable = enable_i8259_irq, | ||
70 | .disable = disable_i8259_irq, | ||
71 | .ack = ack_i8259_irq, | 56 | .ack = ack_i8259_irq, |
57 | .mask = disable_i8259_irq, | ||
58 | .mask_ack = ack_i8259_irq, | ||
59 | .unmask = enable_i8259_irq, | ||
72 | .end = end_i8259_irq, | 60 | .end = end_i8259_irq, |
73 | }; | 61 | }; |
74 | 62 | ||
@@ -104,7 +92,7 @@ void __init rockhopper_init_irq(void) | |||
104 | } | 92 | } |
105 | 93 | ||
106 | for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++) | 94 | for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++) |
107 | irq_desc[i].chip = &i8259_irq_type; | 95 | set_irq_chip(i, &i8259_irq_type); |
108 | 96 | ||
109 | setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade); | 97 | setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade); |
110 | 98 | ||