diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2006-07-02 09:41:42 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-07-13 16:25:58 -0400 |
commit | 94dee171df34b7955cd647da4c40ba67d55a7671 (patch) | |
tree | 4f4cb8c8d5e37a7bc33457ffff5caff85376037f /arch/mips/vr41xx/common | |
parent | e1e80b4d24eddd1a76cd386e25164cf159661bd6 (diff) |
[MIPS] Eleminate interrupt migration helper use.
> #define hw_interrupt_type irq_chip
> typedef struct irq_chip hw_irq_controller;
> #define no_irq_type no_irq_chip
> typedef struct irq_desc irq_desc_t;
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/vr41xx/common')
-rw-r--r-- | arch/mips/vr41xx/common/icu.c | 44 | ||||
-rw-r--r-- | arch/mips/vr41xx/common/irq.c | 2 | ||||
-rw-r--r-- | arch/mips/vr41xx/common/vrc4173.c | 14 |
3 files changed, 30 insertions, 30 deletions
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index b9323302cc4e..3cc5a4959275 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c | |||
@@ -152,7 +152,7 @@ static inline uint16_t icu2_clear(uint8_t offset, uint16_t clear) | |||
152 | 152 | ||
153 | void vr41xx_enable_piuint(uint16_t mask) | 153 | void vr41xx_enable_piuint(uint16_t mask) |
154 | { | 154 | { |
155 | irq_desc_t *desc = irq_desc + PIU_IRQ; | 155 | struct irq_desc *desc = irq_desc + PIU_IRQ; |
156 | unsigned long flags; | 156 | unsigned long flags; |
157 | 157 | ||
158 | if (current_cpu_data.cputype == CPU_VR4111 || | 158 | if (current_cpu_data.cputype == CPU_VR4111 || |
@@ -167,7 +167,7 @@ EXPORT_SYMBOL(vr41xx_enable_piuint); | |||
167 | 167 | ||
168 | void vr41xx_disable_piuint(uint16_t mask) | 168 | void vr41xx_disable_piuint(uint16_t mask) |
169 | { | 169 | { |
170 | irq_desc_t *desc = irq_desc + PIU_IRQ; | 170 | struct irq_desc *desc = irq_desc + PIU_IRQ; |
171 | unsigned long flags; | 171 | unsigned long flags; |
172 | 172 | ||
173 | if (current_cpu_data.cputype == CPU_VR4111 || | 173 | if (current_cpu_data.cputype == CPU_VR4111 || |
@@ -182,7 +182,7 @@ EXPORT_SYMBOL(vr41xx_disable_piuint); | |||
182 | 182 | ||
183 | void vr41xx_enable_aiuint(uint16_t mask) | 183 | void vr41xx_enable_aiuint(uint16_t mask) |
184 | { | 184 | { |
185 | irq_desc_t *desc = irq_desc + AIU_IRQ; | 185 | struct irq_desc *desc = irq_desc + AIU_IRQ; |
186 | unsigned long flags; | 186 | unsigned long flags; |
187 | 187 | ||
188 | if (current_cpu_data.cputype == CPU_VR4111 || | 188 | if (current_cpu_data.cputype == CPU_VR4111 || |
@@ -197,7 +197,7 @@ EXPORT_SYMBOL(vr41xx_enable_aiuint); | |||
197 | 197 | ||
198 | void vr41xx_disable_aiuint(uint16_t mask) | 198 | void vr41xx_disable_aiuint(uint16_t mask) |
199 | { | 199 | { |
200 | irq_desc_t *desc = irq_desc + AIU_IRQ; | 200 | struct irq_desc *desc = irq_desc + AIU_IRQ; |
201 | unsigned long flags; | 201 | unsigned long flags; |
202 | 202 | ||
203 | if (current_cpu_data.cputype == CPU_VR4111 || | 203 | if (current_cpu_data.cputype == CPU_VR4111 || |
@@ -212,7 +212,7 @@ EXPORT_SYMBOL(vr41xx_disable_aiuint); | |||
212 | 212 | ||
213 | void vr41xx_enable_kiuint(uint16_t mask) | 213 | void vr41xx_enable_kiuint(uint16_t mask) |
214 | { | 214 | { |
215 | irq_desc_t *desc = irq_desc + KIU_IRQ; | 215 | struct irq_desc *desc = irq_desc + KIU_IRQ; |
216 | unsigned long flags; | 216 | unsigned long flags; |
217 | 217 | ||
218 | if (current_cpu_data.cputype == CPU_VR4111 || | 218 | if (current_cpu_data.cputype == CPU_VR4111 || |
@@ -227,7 +227,7 @@ EXPORT_SYMBOL(vr41xx_enable_kiuint); | |||
227 | 227 | ||
228 | void vr41xx_disable_kiuint(uint16_t mask) | 228 | void vr41xx_disable_kiuint(uint16_t mask) |
229 | { | 229 | { |
230 | irq_desc_t *desc = irq_desc + KIU_IRQ; | 230 | struct irq_desc *desc = irq_desc + KIU_IRQ; |
231 | unsigned long flags; | 231 | unsigned long flags; |
232 | 232 | ||
233 | if (current_cpu_data.cputype == CPU_VR4111 || | 233 | if (current_cpu_data.cputype == CPU_VR4111 || |
@@ -242,7 +242,7 @@ EXPORT_SYMBOL(vr41xx_disable_kiuint); | |||
242 | 242 | ||
243 | void vr41xx_enable_dsiuint(uint16_t mask) | 243 | void vr41xx_enable_dsiuint(uint16_t mask) |
244 | { | 244 | { |
245 | irq_desc_t *desc = irq_desc + DSIU_IRQ; | 245 | struct irq_desc *desc = irq_desc + DSIU_IRQ; |
246 | unsigned long flags; | 246 | unsigned long flags; |
247 | 247 | ||
248 | spin_lock_irqsave(&desc->lock, flags); | 248 | spin_lock_irqsave(&desc->lock, flags); |
@@ -254,7 +254,7 @@ EXPORT_SYMBOL(vr41xx_enable_dsiuint); | |||
254 | 254 | ||
255 | void vr41xx_disable_dsiuint(uint16_t mask) | 255 | void vr41xx_disable_dsiuint(uint16_t mask) |
256 | { | 256 | { |
257 | irq_desc_t *desc = irq_desc + DSIU_IRQ; | 257 | struct irq_desc *desc = irq_desc + DSIU_IRQ; |
258 | unsigned long flags; | 258 | unsigned long flags; |
259 | 259 | ||
260 | spin_lock_irqsave(&desc->lock, flags); | 260 | spin_lock_irqsave(&desc->lock, flags); |
@@ -266,7 +266,7 @@ EXPORT_SYMBOL(vr41xx_disable_dsiuint); | |||
266 | 266 | ||
267 | void vr41xx_enable_firint(uint16_t mask) | 267 | void vr41xx_enable_firint(uint16_t mask) |
268 | { | 268 | { |
269 | irq_desc_t *desc = irq_desc + FIR_IRQ; | 269 | struct irq_desc *desc = irq_desc + FIR_IRQ; |
270 | unsigned long flags; | 270 | unsigned long flags; |
271 | 271 | ||
272 | spin_lock_irqsave(&desc->lock, flags); | 272 | spin_lock_irqsave(&desc->lock, flags); |
@@ -278,7 +278,7 @@ EXPORT_SYMBOL(vr41xx_enable_firint); | |||
278 | 278 | ||
279 | void vr41xx_disable_firint(uint16_t mask) | 279 | void vr41xx_disable_firint(uint16_t mask) |
280 | { | 280 | { |
281 | irq_desc_t *desc = irq_desc + FIR_IRQ; | 281 | struct irq_desc *desc = irq_desc + FIR_IRQ; |
282 | unsigned long flags; | 282 | unsigned long flags; |
283 | 283 | ||
284 | spin_lock_irqsave(&desc->lock, flags); | 284 | spin_lock_irqsave(&desc->lock, flags); |
@@ -290,7 +290,7 @@ EXPORT_SYMBOL(vr41xx_disable_firint); | |||
290 | 290 | ||
291 | void vr41xx_enable_pciint(void) | 291 | void vr41xx_enable_pciint(void) |
292 | { | 292 | { |
293 | irq_desc_t *desc = irq_desc + PCI_IRQ; | 293 | struct irq_desc *desc = irq_desc + PCI_IRQ; |
294 | unsigned long flags; | 294 | unsigned long flags; |
295 | 295 | ||
296 | if (current_cpu_data.cputype == CPU_VR4122 || | 296 | if (current_cpu_data.cputype == CPU_VR4122 || |
@@ -306,7 +306,7 @@ EXPORT_SYMBOL(vr41xx_enable_pciint); | |||
306 | 306 | ||
307 | void vr41xx_disable_pciint(void) | 307 | void vr41xx_disable_pciint(void) |
308 | { | 308 | { |
309 | irq_desc_t *desc = irq_desc + PCI_IRQ; | 309 | struct irq_desc *desc = irq_desc + PCI_IRQ; |
310 | unsigned long flags; | 310 | unsigned long flags; |
311 | 311 | ||
312 | if (current_cpu_data.cputype == CPU_VR4122 || | 312 | if (current_cpu_data.cputype == CPU_VR4122 || |
@@ -322,7 +322,7 @@ EXPORT_SYMBOL(vr41xx_disable_pciint); | |||
322 | 322 | ||
323 | void vr41xx_enable_scuint(void) | 323 | void vr41xx_enable_scuint(void) |
324 | { | 324 | { |
325 | irq_desc_t *desc = irq_desc + SCU_IRQ; | 325 | struct irq_desc *desc = irq_desc + SCU_IRQ; |
326 | unsigned long flags; | 326 | unsigned long flags; |
327 | 327 | ||
328 | if (current_cpu_data.cputype == CPU_VR4122 || | 328 | if (current_cpu_data.cputype == CPU_VR4122 || |
@@ -338,7 +338,7 @@ EXPORT_SYMBOL(vr41xx_enable_scuint); | |||
338 | 338 | ||
339 | void vr41xx_disable_scuint(void) | 339 | void vr41xx_disable_scuint(void) |
340 | { | 340 | { |
341 | irq_desc_t *desc = irq_desc + SCU_IRQ; | 341 | struct irq_desc *desc = irq_desc + SCU_IRQ; |
342 | unsigned long flags; | 342 | unsigned long flags; |
343 | 343 | ||
344 | if (current_cpu_data.cputype == CPU_VR4122 || | 344 | if (current_cpu_data.cputype == CPU_VR4122 || |
@@ -354,7 +354,7 @@ EXPORT_SYMBOL(vr41xx_disable_scuint); | |||
354 | 354 | ||
355 | void vr41xx_enable_csiint(uint16_t mask) | 355 | void vr41xx_enable_csiint(uint16_t mask) |
356 | { | 356 | { |
357 | irq_desc_t *desc = irq_desc + CSI_IRQ; | 357 | struct irq_desc *desc = irq_desc + CSI_IRQ; |
358 | unsigned long flags; | 358 | unsigned long flags; |
359 | 359 | ||
360 | if (current_cpu_data.cputype == CPU_VR4122 || | 360 | if (current_cpu_data.cputype == CPU_VR4122 || |
@@ -370,7 +370,7 @@ EXPORT_SYMBOL(vr41xx_enable_csiint); | |||
370 | 370 | ||
371 | void vr41xx_disable_csiint(uint16_t mask) | 371 | void vr41xx_disable_csiint(uint16_t mask) |
372 | { | 372 | { |
373 | irq_desc_t *desc = irq_desc + CSI_IRQ; | 373 | struct irq_desc *desc = irq_desc + CSI_IRQ; |
374 | unsigned long flags; | 374 | unsigned long flags; |
375 | 375 | ||
376 | if (current_cpu_data.cputype == CPU_VR4122 || | 376 | if (current_cpu_data.cputype == CPU_VR4122 || |
@@ -386,7 +386,7 @@ EXPORT_SYMBOL(vr41xx_disable_csiint); | |||
386 | 386 | ||
387 | void vr41xx_enable_bcuint(void) | 387 | void vr41xx_enable_bcuint(void) |
388 | { | 388 | { |
389 | irq_desc_t *desc = irq_desc + BCU_IRQ; | 389 | struct irq_desc *desc = irq_desc + BCU_IRQ; |
390 | unsigned long flags; | 390 | unsigned long flags; |
391 | 391 | ||
392 | if (current_cpu_data.cputype == CPU_VR4122 || | 392 | if (current_cpu_data.cputype == CPU_VR4122 || |
@@ -402,7 +402,7 @@ EXPORT_SYMBOL(vr41xx_enable_bcuint); | |||
402 | 402 | ||
403 | void vr41xx_disable_bcuint(void) | 403 | void vr41xx_disable_bcuint(void) |
404 | { | 404 | { |
405 | irq_desc_t *desc = irq_desc + BCU_IRQ; | 405 | struct irq_desc *desc = irq_desc + BCU_IRQ; |
406 | unsigned long flags; | 406 | unsigned long flags; |
407 | 407 | ||
408 | if (current_cpu_data.cputype == CPU_VR4122 || | 408 | if (current_cpu_data.cputype == CPU_VR4122 || |
@@ -442,7 +442,7 @@ static void end_sysint1_irq(unsigned int irq) | |||
442 | icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); | 442 | icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); |
443 | } | 443 | } |
444 | 444 | ||
445 | static struct hw_interrupt_type sysint1_irq_type = { | 445 | static struct irq_chip sysint1_irq_type = { |
446 | .typename = "SYSINT1", | 446 | .typename = "SYSINT1", |
447 | .startup = startup_sysint1_irq, | 447 | .startup = startup_sysint1_irq, |
448 | .shutdown = shutdown_sysint1_irq, | 448 | .shutdown = shutdown_sysint1_irq, |
@@ -478,7 +478,7 @@ static void end_sysint2_irq(unsigned int irq) | |||
478 | icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); | 478 | icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); |
479 | } | 479 | } |
480 | 480 | ||
481 | static struct hw_interrupt_type sysint2_irq_type = { | 481 | static struct irq_chip sysint2_irq_type = { |
482 | .typename = "SYSINT2", | 482 | .typename = "SYSINT2", |
483 | .startup = startup_sysint2_irq, | 483 | .startup = startup_sysint2_irq, |
484 | .shutdown = shutdown_sysint2_irq, | 484 | .shutdown = shutdown_sysint2_irq, |
@@ -490,7 +490,7 @@ static struct hw_interrupt_type sysint2_irq_type = { | |||
490 | 490 | ||
491 | static inline int set_sysint1_assign(unsigned int irq, unsigned char assign) | 491 | static inline int set_sysint1_assign(unsigned int irq, unsigned char assign) |
492 | { | 492 | { |
493 | irq_desc_t *desc = irq_desc + irq; | 493 | struct irq_desc *desc = irq_desc + irq; |
494 | uint16_t intassign0, intassign1; | 494 | uint16_t intassign0, intassign1; |
495 | unsigned int pin; | 495 | unsigned int pin; |
496 | 496 | ||
@@ -549,7 +549,7 @@ static inline int set_sysint1_assign(unsigned int irq, unsigned char assign) | |||
549 | 549 | ||
550 | static inline int set_sysint2_assign(unsigned int irq, unsigned char assign) | 550 | static inline int set_sysint2_assign(unsigned int irq, unsigned char assign) |
551 | { | 551 | { |
552 | irq_desc_t *desc = irq_desc + irq; | 552 | struct irq_desc *desc = irq_desc + irq; |
553 | uint16_t intassign2, intassign3; | 553 | uint16_t intassign2, intassign3; |
554 | unsigned int pin; | 554 | unsigned int pin; |
555 | 555 | ||
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c index 66aa50802deb..965f3d6312bd 100644 --- a/arch/mips/vr41xx/common/irq.c +++ b/arch/mips/vr41xx/common/irq.c | |||
@@ -62,7 +62,7 @@ EXPORT_SYMBOL_GPL(cascade_irq); | |||
62 | static void irq_dispatch(unsigned int irq, struct pt_regs *regs) | 62 | static void irq_dispatch(unsigned int irq, struct pt_regs *regs) |
63 | { | 63 | { |
64 | irq_cascade_t *cascade; | 64 | irq_cascade_t *cascade; |
65 | irq_desc_t *desc; | 65 | struct irq_desc *desc; |
66 | 66 | ||
67 | if (irq >= NR_IRQS) { | 67 | if (irq >= NR_IRQS) { |
68 | atomic_inc(&irq_err_count); | 68 | atomic_inc(&irq_err_count); |
diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c index 2d287b8893d9..4720a994dc19 100644 --- a/arch/mips/vr41xx/common/vrc4173.c +++ b/arch/mips/vr41xx/common/vrc4173.c | |||
@@ -321,7 +321,7 @@ static inline void vrc4173_giu_init(void) | |||
321 | 321 | ||
322 | void vrc4173_enable_piuint(uint16_t mask) | 322 | void vrc4173_enable_piuint(uint16_t mask) |
323 | { | 323 | { |
324 | irq_desc_t *desc = irq_desc + VRC4173_PIU_IRQ; | 324 | struct irq_desc *desc = irq_desc + VRC4173_PIU_IRQ; |
325 | unsigned long flags; | 325 | unsigned long flags; |
326 | uint16_t val; | 326 | uint16_t val; |
327 | 327 | ||
@@ -336,7 +336,7 @@ EXPORT_SYMBOL(vrc4173_enable_piuint); | |||
336 | 336 | ||
337 | void vrc4173_disable_piuint(uint16_t mask) | 337 | void vrc4173_disable_piuint(uint16_t mask) |
338 | { | 338 | { |
339 | irq_desc_t *desc = irq_desc + VRC4173_PIU_IRQ; | 339 | struct irq_desc *desc = irq_desc + VRC4173_PIU_IRQ; |
340 | unsigned long flags; | 340 | unsigned long flags; |
341 | uint16_t val; | 341 | uint16_t val; |
342 | 342 | ||
@@ -351,7 +351,7 @@ EXPORT_SYMBOL(vrc4173_disable_piuint); | |||
351 | 351 | ||
352 | void vrc4173_enable_aiuint(uint16_t mask) | 352 | void vrc4173_enable_aiuint(uint16_t mask) |
353 | { | 353 | { |
354 | irq_desc_t *desc = irq_desc + VRC4173_AIU_IRQ; | 354 | struct irq_desc *desc = irq_desc + VRC4173_AIU_IRQ; |
355 | unsigned long flags; | 355 | unsigned long flags; |
356 | uint16_t val; | 356 | uint16_t val; |
357 | 357 | ||
@@ -366,7 +366,7 @@ EXPORT_SYMBOL(vrc4173_enable_aiuint); | |||
366 | 366 | ||
367 | void vrc4173_disable_aiuint(uint16_t mask) | 367 | void vrc4173_disable_aiuint(uint16_t mask) |
368 | { | 368 | { |
369 | irq_desc_t *desc = irq_desc + VRC4173_AIU_IRQ; | 369 | struct irq_desc *desc = irq_desc + VRC4173_AIU_IRQ; |
370 | unsigned long flags; | 370 | unsigned long flags; |
371 | uint16_t val; | 371 | uint16_t val; |
372 | 372 | ||
@@ -381,7 +381,7 @@ EXPORT_SYMBOL(vrc4173_disable_aiuint); | |||
381 | 381 | ||
382 | void vrc4173_enable_kiuint(uint16_t mask) | 382 | void vrc4173_enable_kiuint(uint16_t mask) |
383 | { | 383 | { |
384 | irq_desc_t *desc = irq_desc + VRC4173_KIU_IRQ; | 384 | struct irq_desc *desc = irq_desc + VRC4173_KIU_IRQ; |
385 | unsigned long flags; | 385 | unsigned long flags; |
386 | uint16_t val; | 386 | uint16_t val; |
387 | 387 | ||
@@ -396,7 +396,7 @@ EXPORT_SYMBOL(vrc4173_enable_kiuint); | |||
396 | 396 | ||
397 | void vrc4173_disable_kiuint(uint16_t mask) | 397 | void vrc4173_disable_kiuint(uint16_t mask) |
398 | { | 398 | { |
399 | irq_desc_t *desc = irq_desc + VRC4173_KIU_IRQ; | 399 | struct irq_desc *desc = irq_desc + VRC4173_KIU_IRQ; |
400 | unsigned long flags; | 400 | unsigned long flags; |
401 | uint16_t val; | 401 | uint16_t val; |
402 | 402 | ||
@@ -442,7 +442,7 @@ static void end_vrc4173_irq(unsigned int irq) | |||
442 | enable_vrc4173_irq(irq); | 442 | enable_vrc4173_irq(irq); |
443 | } | 443 | } |
444 | 444 | ||
445 | static struct hw_interrupt_type vrc4173_irq_type = { | 445 | static struct irq_chip vrc4173_irq_type = { |
446 | .typename = "VRC4173", | 446 | .typename = "VRC4173", |
447 | .startup = startup_vrc4173_irq, | 447 | .startup = startup_vrc4173_irq, |
448 | .shutdown = shutdown_vrc4173_irq, | 448 | .shutdown = shutdown_vrc4173_irq, |