diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 18:46:15 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 18:46:15 -0400 |
commit | 10cc3529072d5415fb040018a8a99aa7a60190b6 (patch) | |
tree | fe07fb5112c9c34c2aecfac982155307bc168f07 /arch/mips/vr41xx/common/cmu.c | |
parent | aeffdbbaff133b0c3989e20af5baa091d3d0b409 (diff) |
[MIPS] Allow hardwiring of the CPU type to a single type for optimization.
This saves a few k on systems which only ever ship with a single CPU type.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/vr41xx/common/cmu.c')
-rw-r--r-- | arch/mips/vr41xx/common/cmu.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/mips/vr41xx/common/cmu.c b/arch/mips/vr41xx/common/cmu.c index 657c5133c933..ad0e8e3409d9 100644 --- a/arch/mips/vr41xx/common/cmu.c +++ b/arch/mips/vr41xx/common/cmu.c | |||
@@ -95,8 +95,8 @@ void vr41xx_supply_clock(vr41xx_clock_t clock) | |||
95 | cmuclkmsk |= MSKFIR | MSKFFIR; | 95 | cmuclkmsk |= MSKFIR | MSKFFIR; |
96 | break; | 96 | break; |
97 | case DSIU_CLOCK: | 97 | case DSIU_CLOCK: |
98 | if (current_cpu_data.cputype == CPU_VR4111 || | 98 | if (current_cpu_type() == CPU_VR4111 || |
99 | current_cpu_data.cputype == CPU_VR4121) | 99 | current_cpu_type() == CPU_VR4121) |
100 | cmuclkmsk |= MSKDSIU; | 100 | cmuclkmsk |= MSKDSIU; |
101 | else | 101 | else |
102 | cmuclkmsk |= MSKSIU | MSKDSIU; | 102 | cmuclkmsk |= MSKSIU | MSKDSIU; |
@@ -146,8 +146,8 @@ void vr41xx_mask_clock(vr41xx_clock_t clock) | |||
146 | cmuclkmsk &= ~MSKPIU; | 146 | cmuclkmsk &= ~MSKPIU; |
147 | break; | 147 | break; |
148 | case SIU_CLOCK: | 148 | case SIU_CLOCK: |
149 | if (current_cpu_data.cputype == CPU_VR4111 || | 149 | if (current_cpu_type() == CPU_VR4111 || |
150 | current_cpu_data.cputype == CPU_VR4121) { | 150 | current_cpu_type() == CPU_VR4121) { |
151 | cmuclkmsk &= ~(MSKSIU | MSKSSIU); | 151 | cmuclkmsk &= ~(MSKSIU | MSKSSIU); |
152 | } else { | 152 | } else { |
153 | if (cmuclkmsk & MSKDSIU) | 153 | if (cmuclkmsk & MSKDSIU) |
@@ -166,8 +166,8 @@ void vr41xx_mask_clock(vr41xx_clock_t clock) | |||
166 | cmuclkmsk &= ~(MSKFIR | MSKFFIR); | 166 | cmuclkmsk &= ~(MSKFIR | MSKFFIR); |
167 | break; | 167 | break; |
168 | case DSIU_CLOCK: | 168 | case DSIU_CLOCK: |
169 | if (current_cpu_data.cputype == CPU_VR4111 || | 169 | if (current_cpu_type() == CPU_VR4111 || |
170 | current_cpu_data.cputype == CPU_VR4121) { | 170 | current_cpu_type() == CPU_VR4121) { |
171 | cmuclkmsk &= ~MSKDSIU; | 171 | cmuclkmsk &= ~MSKDSIU; |
172 | } else { | 172 | } else { |
173 | if (cmuclkmsk & MSKSSIU) | 173 | if (cmuclkmsk & MSKSSIU) |
@@ -216,7 +216,7 @@ static int __init vr41xx_cmu_init(void) | |||
216 | { | 216 | { |
217 | unsigned long start, size; | 217 | unsigned long start, size; |
218 | 218 | ||
219 | switch (current_cpu_data.cputype) { | 219 | switch (current_cpu_type()) { |
220 | case CPU_VR4111: | 220 | case CPU_VR4111: |
221 | case CPU_VR4121: | 221 | case CPU_VR4121: |
222 | start = CMU_TYPE1_BASE; | 222 | start = CMU_TYPE1_BASE; |
@@ -246,7 +246,7 @@ static int __init vr41xx_cmu_init(void) | |||
246 | } | 246 | } |
247 | 247 | ||
248 | cmuclkmsk = cmu_read(CMUCLKMSK); | 248 | cmuclkmsk = cmu_read(CMUCLKMSK); |
249 | if (current_cpu_data.cputype == CPU_VR4133) | 249 | if (current_cpu_type() == CPU_VR4133) |
250 | cmuclkmsk2 = cmu_read(CMUCLKMSK2); | 250 | cmuclkmsk2 = cmu_read(CMUCLKMSK2); |
251 | 251 | ||
252 | spin_lock_init(&cmu_lock); | 252 | spin_lock_init(&cmu_lock); |