MIPS: TXx9: Raise priority of interrupts for errors, timers, SIO

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

2 files changed, 22 insertions, 0 deletions

diff --git a/arch/mips/txx9/generic/irq_tx4927.c b/arch/mips/txx9/generic/irq_tx4927.c
index cbea1fdde82b..ad2870def8f1 100644
--- a/arch/mips/txx9/generic/irq_tx4927.c
+++ b/arch/mips/txx9/generic/irq_tx4927.c
@@ -30,8 +30,19 @@
 
 void __init tx4927_irq_init(void)
 {
+        int i;
+
         mips_cpu_irq_init();
         txx9_irq_init(TX4927_IRC_REG & 0xfffffffffULL);
         set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT,
                                 handle_simple_irq);
+        /* raise priority for errors, timers, SIO */
+        txx9_irq_set_pri(TX4927_IR_ECCERR, 7);
+        txx9_irq_set_pri(TX4927_IR_WTOERR, 7);
+        txx9_irq_set_pri(TX4927_IR_PCIERR, 7);
+        txx9_irq_set_pri(TX4927_IR_PCIPME, 7);
+        for (i = 0; i < TX4927_NUM_IR_TMR; i++)
+                txx9_irq_set_pri(TX4927_IR_TMR(i), 6);
+        for (i = 0; i < TX4927_NUM_IR_SIO; i++)
+                txx9_irq_set_pri(TX4927_IR_SIO(i), 5);
 }
diff --git a/arch/mips/txx9/generic/irq_tx4938.c b/arch/mips/txx9/generic/irq_tx4938.c
index 6eac684bf190..025ae11359a8 100644
--- a/arch/mips/txx9/generic/irq_tx4938.c
+++ b/arch/mips/txx9/generic/irq_tx4938.c
@@ -18,8 +18,19 @@
 
 void __init tx4938_irq_init(void)
 {
+        int i;
+
         mips_cpu_irq_init();
         txx9_irq_init(TX4938_IRC_REG & 0xfffffffffULL);
         set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4938_IRC_INT,
                                 handle_simple_irq);
+        /* raise priority for errors, timers, SIO */
+        txx9_irq_set_pri(TX4938_IR_ECCERR, 7);
+        txx9_irq_set_pri(TX4938_IR_WTOERR, 7);
+        txx9_irq_set_pri(TX4938_IR_PCIERR, 7);
+        txx9_irq_set_pri(TX4938_IR_PCIPME, 7);
+        for (i = 0; i < TX4938_NUM_IR_TMR; i++)
+                txx9_irq_set_pri(TX4938_IR_TMR(i), 6);
+        for (i = 0; i < TX4938_NUM_IR_SIO; i++)
+                txx9_irq_set_pri(TX4938_IR_SIO(i), 5);
 }