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authorThomas Gleixner <tglx@linutronix.de>2011-03-27 09:19:28 -0400
committerThomas Gleixner <tglx@linutronix.de>2011-03-29 08:48:07 -0400
commite4ec7989b4e55d9275ebac66230b7dac6dcb1fae (patch)
treeb42cd789681bada83b0051899ed66c1c0e2bbea2 /arch/mips/txx9
parent9efbc3fba2cd7f703b55d72e5168ed4348930442 (diff)
MIPS: Convert the irq functions to the new names
Scripted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/mips/txx9')
-rw-r--r--arch/mips/txx9/generic/irq_tx4927.c2
-rw-r--r--arch/mips/txx9/generic/irq_tx4938.c2
-rw-r--r--arch/mips/txx9/generic/irq_tx4939.c6
-rw-r--r--arch/mips/txx9/jmr3927/irq.c5
-rw-r--r--arch/mips/txx9/rbtx4927/irq.c6
-rw-r--r--arch/mips/txx9/rbtx4938/irq.c6
-rw-r--r--arch/mips/txx9/rbtx4939/irq.c4
7 files changed, 16 insertions, 15 deletions
diff --git a/arch/mips/txx9/generic/irq_tx4927.c b/arch/mips/txx9/generic/irq_tx4927.c
index e1828e8bcaef..7e3ac5782da4 100644
--- a/arch/mips/txx9/generic/irq_tx4927.c
+++ b/arch/mips/txx9/generic/irq_tx4927.c
@@ -35,7 +35,7 @@ void __init tx4927_irq_init(void)
35 35
36 mips_cpu_irq_init(); 36 mips_cpu_irq_init();
37 txx9_irq_init(TX4927_IRC_REG & 0xfffffffffULL); 37 txx9_irq_init(TX4927_IRC_REG & 0xfffffffffULL);
38 set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT, 38 irq_set_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT,
39 handle_simple_irq); 39 handle_simple_irq);
40 /* raise priority for errors, timers, SIO */ 40 /* raise priority for errors, timers, SIO */
41 txx9_irq_set_pri(TX4927_IR_ECCERR, 7); 41 txx9_irq_set_pri(TX4927_IR_ECCERR, 7);
diff --git a/arch/mips/txx9/generic/irq_tx4938.c b/arch/mips/txx9/generic/irq_tx4938.c
index a6e6e805097a..aace85653329 100644
--- a/arch/mips/txx9/generic/irq_tx4938.c
+++ b/arch/mips/txx9/generic/irq_tx4938.c
@@ -23,7 +23,7 @@ void __init tx4938_irq_init(void)
23 23
24 mips_cpu_irq_init(); 24 mips_cpu_irq_init();
25 txx9_irq_init(TX4938_IRC_REG & 0xfffffffffULL); 25 txx9_irq_init(TX4938_IRC_REG & 0xfffffffffULL);
26 set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4938_IRC_INT, 26 irq_set_chained_handler(MIPS_CPU_IRQ_BASE + TX4938_IRC_INT,
27 handle_simple_irq); 27 handle_simple_irq);
28 /* raise priority for errors, timers, SIO */ 28 /* raise priority for errors, timers, SIO */
29 txx9_irq_set_pri(TX4938_IR_ECCERR, 7); 29 txx9_irq_set_pri(TX4938_IR_ECCERR, 7);
diff --git a/arch/mips/txx9/generic/irq_tx4939.c b/arch/mips/txx9/generic/irq_tx4939.c
index 93b6edbedd64..6b067dbd2ae1 100644
--- a/arch/mips/txx9/generic/irq_tx4939.c
+++ b/arch/mips/txx9/generic/irq_tx4939.c
@@ -176,8 +176,8 @@ void __init tx4939_irq_init(void)
176 for (i = 1; i < TX4939_NUM_IR; i++) { 176 for (i = 1; i < TX4939_NUM_IR; i++) {
177 tx4939irq[i].level = 4; /* middle level */ 177 tx4939irq[i].level = 4; /* middle level */
178 tx4939irq[i].mode = TXx9_IRCR_LOW; 178 tx4939irq[i].mode = TXx9_IRCR_LOW;
179 set_irq_chip_and_handler(TXX9_IRQ_BASE + i, 179 irq_set_chip_and_handler(TXX9_IRQ_BASE + i, &tx4939_irq_chip,
180 &tx4939_irq_chip, handle_level_irq); 180 handle_level_irq);
181 } 181 }
182 182
183 /* mask all IRC interrupts */ 183 /* mask all IRC interrupts */
@@ -193,7 +193,7 @@ void __init tx4939_irq_init(void)
193 __raw_writel(TXx9_IRCER_ICE, &tx4939_ircptr->den.r); 193 __raw_writel(TXx9_IRCER_ICE, &tx4939_ircptr->den.r);
194 __raw_writel(irc_elevel, &tx4939_ircptr->msk.r); 194 __raw_writel(irc_elevel, &tx4939_ircptr->msk.r);
195 195
196 set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4939_IRC_INT, 196 irq_set_chained_handler(MIPS_CPU_IRQ_BASE + TX4939_IRC_INT,
197 handle_simple_irq); 197 handle_simple_irq);
198 198
199 /* raise priority for errors, timers, sio */ 199 /* raise priority for errors, timers, sio */
diff --git a/arch/mips/txx9/jmr3927/irq.c b/arch/mips/txx9/jmr3927/irq.c
index 92a5c1b400f0..c22c859a2c49 100644
--- a/arch/mips/txx9/jmr3927/irq.c
+++ b/arch/mips/txx9/jmr3927/irq.c
@@ -120,8 +120,9 @@ void __init jmr3927_irq_setup(void)
120 120
121 tx3927_irq_init(); 121 tx3927_irq_init();
122 for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++) 122 for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++)
123 set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq); 123 irq_set_chip_and_handler(i, &jmr3927_irq_ioc,
124 handle_level_irq);
124 125
125 /* setup IOC interrupt 1 (PCI, MODEM) */ 126 /* setup IOC interrupt 1 (PCI, MODEM) */
126 set_irq_chained_handler(JMR3927_IRQ_IOCINT, handle_simple_irq); 127 irq_set_chained_handler(JMR3927_IRQ_IOCINT, handle_simple_irq);
127} 128}
diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c
index 7c0a048b307c..6c22c496090b 100644
--- a/arch/mips/txx9/rbtx4927/irq.c
+++ b/arch/mips/txx9/rbtx4927/irq.c
@@ -164,9 +164,9 @@ static void __init toshiba_rbtx4927_irq_ioc_init(void)
164 164
165 for (i = RBTX4927_IRQ_IOC; 165 for (i = RBTX4927_IRQ_IOC;
166 i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++) 166 i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++)
167 set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type, 167 irq_set_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
168 handle_level_irq); 168 handle_level_irq);
169 set_irq_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq); 169 irq_set_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq);
170} 170}
171 171
172static int rbtx4927_irq_dispatch(int pending) 172static int rbtx4927_irq_dispatch(int pending)
@@ -194,5 +194,5 @@ void __init rbtx4927_irq_setup(void)
194 tx4927_irq_init(); 194 tx4927_irq_init();
195 toshiba_rbtx4927_irq_ioc_init(); 195 toshiba_rbtx4927_irq_ioc_init();
196 /* Onboard 10M Ether: High Active */ 196 /* Onboard 10M Ether: High Active */
197 set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH); 197 irq_set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH);
198} 198}
diff --git a/arch/mips/txx9/rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c
index 2ec4fe1b1670..58cd7a9272cc 100644
--- a/arch/mips/txx9/rbtx4938/irq.c
+++ b/arch/mips/txx9/rbtx4938/irq.c
@@ -132,10 +132,10 @@ static void __init toshiba_rbtx4938_irq_ioc_init(void)
132 132
133 for (i = RBTX4938_IRQ_IOC; 133 for (i = RBTX4938_IRQ_IOC;
134 i < RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC; i++) 134 i < RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC; i++)
135 set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type, 135 irq_set_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type,
136 handle_level_irq); 136 handle_level_irq);
137 137
138 set_irq_chained_handler(RBTX4938_IRQ_IOCINT, handle_simple_irq); 138 irq_set_chained_handler(RBTX4938_IRQ_IOCINT, handle_simple_irq);
139} 139}
140 140
141void __init rbtx4938_irq_setup(void) 141void __init rbtx4938_irq_setup(void)
@@ -153,5 +153,5 @@ void __init rbtx4938_irq_setup(void)
153 tx4938_irq_init(); 153 tx4938_irq_init();
154 toshiba_rbtx4938_irq_ioc_init(); 154 toshiba_rbtx4938_irq_ioc_init();
155 /* Onboard 10M Ether: High Active */ 155 /* Onboard 10M Ether: High Active */
156 set_irq_type(RBTX4938_IRQ_ETHER, IRQF_TRIGGER_HIGH); 156 irq_set_irq_type(RBTX4938_IRQ_ETHER, IRQF_TRIGGER_HIGH);
157} 157}
diff --git a/arch/mips/txx9/rbtx4939/irq.c b/arch/mips/txx9/rbtx4939/irq.c
index 70074632fb99..69a80616f0c9 100644
--- a/arch/mips/txx9/rbtx4939/irq.c
+++ b/arch/mips/txx9/rbtx4939/irq.c
@@ -88,8 +88,8 @@ void __init rbtx4939_irq_setup(void)
88 tx4939_irq_init(); 88 tx4939_irq_init();
89 for (i = RBTX4939_IRQ_IOC; 89 for (i = RBTX4939_IRQ_IOC;
90 i < RBTX4939_IRQ_IOC + RBTX4939_NR_IRQ_IOC; i++) 90 i < RBTX4939_IRQ_IOC + RBTX4939_NR_IRQ_IOC; i++)
91 set_irq_chip_and_handler(i, &rbtx4939_ioc_irq_chip, 91 irq_set_chip_and_handler(i, &rbtx4939_ioc_irq_chip,
92 handle_level_irq); 92 handle_level_irq);
93 93
94 set_irq_chained_handler(RBTX4939_IRQ_IOCINT, handle_simple_irq); 94 irq_set_chained_handler(RBTX4939_IRQ_IOCINT, handle_simple_irq);
95} 95}