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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2008-07-23 11:25:19 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-07-30 16:54:39 -0400
commitf6727fb889c664be094fa041a0fdf0f1a1caefb6 (patch)
tree176b220f4cc39168f982eb90ab1fe7bba7a64da5 /arch/mips/txx9/jmr3927
parent683147254ef7e69ebbbe55280ba6a3c5ae2325d8 (diff)
[MIPS] TXx9: Make tx3927-specific code more independent
Make some TX3927 SoC specific code independent from board specific code. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/txx9/jmr3927')
-rw-r--r--arch/mips/txx9/jmr3927/irq.c43
-rw-r--r--arch/mips/txx9/jmr3927/setup.c136
2 files changed, 29 insertions, 150 deletions
diff --git a/arch/mips/txx9/jmr3927/irq.c b/arch/mips/txx9/jmr3927/irq.c
index f3b60233e99d..68f74368ddec 100644
--- a/arch/mips/txx9/jmr3927/irq.c
+++ b/arch/mips/txx9/jmr3927/irq.c
@@ -46,13 +46,6 @@
46#error JMR3927_IRQ_END > NR_IRQS 46#error JMR3927_IRQ_END > NR_IRQS
47#endif 47#endif
48 48
49static unsigned char irc_level[TX3927_NUM_IR] = {
50 5, 5, 5, 5, 5, 5, /* INT[5:0] */
51 7, 7, /* SIO */
52 5, 5, 5, 0, 0, /* DMA, PIO, PCI */
53 6, 6, 6 /* TMR */
54};
55
56/* 49/*
57 * CP0_STATUS is a thread's resource (saved/restored on context switch). 50 * CP0_STATUS is a thread's resource (saved/restored on context switch).
58 * So disable_irq/enable_irq MUST handle IOC/IRC registers. 51 * So disable_irq/enable_irq MUST handle IOC/IRC registers.
@@ -103,10 +96,18 @@ static int jmr3927_irq_dispatch(int pending)
103 return irq; 96 return irq;
104} 97}
105 98
106static void __init jmr3927_irq_init(void); 99static struct irq_chip jmr3927_irq_ioc = {
100 .name = "jmr3927_ioc",
101 .ack = mask_irq_ioc,
102 .mask = mask_irq_ioc,
103 .mask_ack = mask_irq_ioc,
104 .unmask = unmask_irq_ioc,
105};
107 106
108void __init jmr3927_irq_setup(void) 107void __init jmr3927_irq_setup(void)
109{ 108{
109 int i;
110
110 txx9_irq_dispatch = jmr3927_irq_dispatch; 111 txx9_irq_dispatch = jmr3927_irq_dispatch;
111 /* Now, interrupt control disabled, */ 112 /* Now, interrupt control disabled, */
112 /* all IRC interrupts are masked, */ 113 /* all IRC interrupts are masked, */
@@ -122,30 +123,10 @@ void __init jmr3927_irq_setup(void)
122 /* clear PCI Reset interrupts */ 123 /* clear PCI Reset interrupts */
123 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR); 124 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
124 125
125 jmr3927_irq_init(); 126 tx3927_irq_init();
127 for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++)
128 set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq);
126 129
127 /* setup IOC interrupt 1 (PCI, MODEM) */ 130 /* setup IOC interrupt 1 (PCI, MODEM) */
128 set_irq_chained_handler(JMR3927_IRQ_IOCINT, handle_simple_irq); 131 set_irq_chained_handler(JMR3927_IRQ_IOCINT, handle_simple_irq);
129
130 /* enable all CPU interrupt bits. */
131 set_c0_status(ST0_IM); /* IE bit is still 0. */
132}
133
134static struct irq_chip jmr3927_irq_ioc = {
135 .name = "jmr3927_ioc",
136 .ack = mask_irq_ioc,
137 .mask = mask_irq_ioc,
138 .mask_ack = mask_irq_ioc,
139 .unmask = unmask_irq_ioc,
140};
141
142static void __init jmr3927_irq_init(void)
143{
144 u32 i;
145
146 txx9_irq_init(TX3927_IRC_REG);
147 for (i = 0; i < TXx9_MAX_IR; i++)
148 txx9_irq_set_pri(i, irc_level[i]);
149 for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++)
150 set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq);
151} 132}
diff --git a/arch/mips/txx9/jmr3927/setup.c b/arch/mips/txx9/jmr3927/setup.c
index ae34e9a4a8ac..7378a835d4e3 100644
--- a/arch/mips/txx9/jmr3927/setup.c
+++ b/arch/mips/txx9/jmr3927/setup.c
@@ -34,20 +34,13 @@
34#include <linux/delay.h> 34#include <linux/delay.h>
35#include <linux/platform_device.h> 35#include <linux/platform_device.h>
36#include <linux/gpio.h> 36#include <linux/gpio.h>
37#ifdef CONFIG_SERIAL_TXX9
38#include <linux/serial_core.h>
39#endif
40#include <asm/txx9tmr.h>
41#include <asm/txx9pio.h>
42#include <asm/reboot.h> 37#include <asm/reboot.h>
38#include <asm/txx9pio.h>
43#include <asm/txx9/generic.h> 39#include <asm/txx9/generic.h>
44#include <asm/txx9/pci.h> 40#include <asm/txx9/pci.h>
45#include <asm/txx9/jmr3927.h> 41#include <asm/txx9/jmr3927.h>
46#include <asm/mipsregs.h> 42#include <asm/mipsregs.h>
47 43
48/* don't enable - see errata */
49static int jmr3927_ccfg_toeon;
50
51static void jmr3927_machine_restart(char *command) 44static void jmr3927_machine_restart(char *command)
52{ 45{
53 local_irq_disable(); 46 local_irq_disable();
@@ -65,10 +58,7 @@ static void jmr3927_machine_restart(char *command)
65 58
66static void __init jmr3927_time_init(void) 59static void __init jmr3927_time_init(void)
67{ 60{
68 txx9_clockevent_init(TX3927_TMR_REG(0), 61 tx3927_time_init(0, 1);
69 JMR3927_IRQ_IRC_TMR(0),
70 JMR3927_IMCLK);
71 txx9_clocksource_init(TX3927_TMR_REG(1), JMR3927_IMCLK);
72} 62}
73 63
74#define DO_WRITE_THROUGH 64#define DO_WRITE_THROUGH
@@ -118,34 +108,12 @@ static void __init jmr3927_mem_setup(void)
118 jmr3927_board_init(); 108 jmr3927_board_init();
119 109
120 argptr = prom_getcmdline(); 110 argptr = prom_getcmdline();
121
122 if ((argptr = strstr(argptr, "toeon")) != NULL)
123 jmr3927_ccfg_toeon = 1;
124 argptr = prom_getcmdline();
125 if ((argptr = strstr(argptr, "ip=")) == NULL) { 111 if ((argptr = strstr(argptr, "ip=")) == NULL) {
126 argptr = prom_getcmdline(); 112 argptr = prom_getcmdline();
127 strcat(argptr, " ip=bootp"); 113 strcat(argptr, " ip=bootp");
128 } 114 }
129 115
130#ifdef CONFIG_SERIAL_TXX9 116 tx3927_setup_serial(1 << 1); /* ch1: noCTS */
131 {
132 extern int early_serial_txx9_setup(struct uart_port *port);
133 int i;
134 struct uart_port req;
135 for(i = 0; i < 2; i++) {
136 memset(&req, 0, sizeof(req));
137 req.line = i;
138 req.iotype = UPIO_MEM;
139 req.membase = (unsigned char __iomem *)TX3927_SIO_REG(i);
140 req.mapbase = TX3927_SIO_REG(i);
141 req.irq = i == 0 ?
142 JMR3927_IRQ_IRC_SIO0 : JMR3927_IRQ_IRC_SIO1;
143 if (i == 0)
144 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
145 req.uartclk = JMR3927_IMCLK;
146 early_serial_txx9_setup(&req);
147 }
148 }
149#ifdef CONFIG_SERIAL_TXX9_CONSOLE 117#ifdef CONFIG_SERIAL_TXX9_CONSOLE
150 argptr = prom_getcmdline(); 118 argptr = prom_getcmdline();
151 if ((argptr = strstr(argptr, "console=")) == NULL) { 119 if ((argptr = strstr(argptr, "console=")) == NULL) {
@@ -153,11 +121,8 @@ static void __init jmr3927_mem_setup(void)
153 strcat(argptr, " console=ttyS1,115200"); 121 strcat(argptr, " console=ttyS1,115200");
154 } 122 }
155#endif 123#endif
156#endif
157} 124}
158 125
159static void tx3927_setup(void);
160
161static void __init jmr3927_pci_setup(void) 126static void __init jmr3927_pci_setup(void)
162{ 127{
163#ifdef CONFIG_PCI 128#ifdef CONFIG_PCI
@@ -184,27 +149,7 @@ static void __init jmr3927_pci_setup(void)
184 149
185static void __init jmr3927_board_init(void) 150static void __init jmr3927_board_init(void)
186{ 151{
187 tx3927_setup();
188 jmr3927_pci_setup();
189
190 /* SIO0 DTR on */
191 jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
192
193 jmr3927_led_set(0);
194
195 printk("JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n",
196 jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK,
197 jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK,
198 jmr3927_dipsw1(), jmr3927_dipsw2(),
199 jmr3927_dipsw3(), jmr3927_dipsw4());
200}
201
202static void __init tx3927_setup(void)
203{
204 int i;
205
206 txx9_cpu_clock = JMR3927_CORECLK; 152 txx9_cpu_clock = JMR3927_CORECLK;
207 txx9_gbus_clock = JMR3927_GBUSCLK;
208 /* SDRAMC are configured by PROM */ 153 /* SDRAMC are configured by PROM */
209 154
210 /* ROMC */ 155 /* ROMC */
@@ -213,74 +158,32 @@ static void __init tx3927_setup(void)
213 tx3927_romcptr->cr[3] = JMR3927_ROMCE3 | 0x0003f698; 158 tx3927_romcptr->cr[3] = JMR3927_ROMCE3 | 0x0003f698;
214 tx3927_romcptr->cr[5] = JMR3927_ROMCE5 | 0x0000f218; 159 tx3927_romcptr->cr[5] = JMR3927_ROMCE5 | 0x0000f218;
215 160
216 /* CCFG */
217 /* enable Timeout BusError */
218 if (jmr3927_ccfg_toeon)
219 tx3927_ccfgptr->ccfg |= TX3927_CCFG_TOE;
220
221 /* clear BusErrorOnWrite flag */
222 tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_BEOW;
223 /* Disable PCI snoop */
224 tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_PSNP;
225 /* do reset on watchdog */
226 tx3927_ccfgptr->ccfg |= TX3927_CCFG_WR;
227
228#ifdef DO_WRITE_THROUGH
229 /* Enable PCI SNOOP - with write through only */
230 tx3927_ccfgptr->ccfg |= TX3927_CCFG_PSNP;
231#endif
232
233 /* Pin selection */ 161 /* Pin selection */
234 tx3927_ccfgptr->pcfg &= ~TX3927_PCFG_SELALL; 162 tx3927_ccfgptr->pcfg &= ~TX3927_PCFG_SELALL;
235 tx3927_ccfgptr->pcfg |= 163 tx3927_ccfgptr->pcfg |=
236 TX3927_PCFG_SELSIOC(0) | TX3927_PCFG_SELSIO_ALL | 164 TX3927_PCFG_SELSIOC(0) | TX3927_PCFG_SELSIO_ALL |
237 (TX3927_PCFG_SELDMA_ALL & ~TX3927_PCFG_SELDMA(1)); 165 (TX3927_PCFG_SELDMA_ALL & ~TX3927_PCFG_SELDMA(1));
238 166
239 printk("TX3927 -- CRIR:%08lx CCFG:%08lx PCFG:%08lx\n", 167 tx3927_setup();
240 tx3927_ccfgptr->crir,
241 tx3927_ccfgptr->ccfg, tx3927_ccfgptr->pcfg);
242
243 /* TMR */
244 for (i = 0; i < TX3927_NR_TMR; i++)
245 txx9_tmr_init(TX3927_TMR_REG(i));
246
247 /* DMA */
248 tx3927_dmaptr->mcr = 0;
249 for (i = 0; i < ARRAY_SIZE(tx3927_dmaptr->ch); i++) {
250 /* reset channel */
251 tx3927_dmaptr->ch[i].ccr = TX3927_DMA_CCR_CHRST;
252 tx3927_dmaptr->ch[i].ccr = 0;
253 }
254 /* enable DMA */
255#ifdef __BIG_ENDIAN
256 tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN;
257#else
258 tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN | TX3927_DMA_MCR_LE;
259#endif
260 168
261 /* PIO */
262 /* PIO[15:12] connected to LEDs */ 169 /* PIO[15:12] connected to LEDs */
263 __raw_writel(0x0000f000, &tx3927_pioptr->dir); 170 __raw_writel(0x0000f000, &tx3927_pioptr->dir);
264 __raw_writel(0, &tx3927_pioptr->maskcpu);
265 __raw_writel(0, &tx3927_pioptr->maskext);
266 txx9_gpio_init(TX3927_PIO_REG, 0, 16);
267 gpio_request(11, "dipsw1"); 171 gpio_request(11, "dipsw1");
268 gpio_request(10, "dipsw2"); 172 gpio_request(10, "dipsw2");
269 {
270 unsigned int conf;
271 173
272 conf = read_c0_conf(); 174 jmr3927_pci_setup();
273 if (!(conf & TX39_CONF_ICE)) 175
274 printk("TX3927 I-Cache disabled.\n"); 176 /* SIO0 DTR on */
275 if (!(conf & TX39_CONF_DCE)) 177 jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
276 printk("TX3927 D-Cache disabled.\n"); 178
277 else if (!(conf & TX39_CONF_WBON)) 179 jmr3927_led_set(0);
278 printk("TX3927 D-Cache WriteThrough.\n"); 180
279 else if (!(conf & TX39_CONF_CWFON)) 181 printk(KERN_INFO
280 printk("TX3927 D-Cache WriteBack.\n"); 182 "JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n",
281 else 183 jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK,
282 printk("TX3927 D-Cache WriteBack (CWF) .\n"); 184 jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK,
283 } 185 jmr3927_dipsw1(), jmr3927_dipsw2(),
186 jmr3927_dipsw3(), jmr3927_dipsw4());
284} 187}
285 188
286/* This trick makes rtc-ds1742 driver usable as is. */ 189/* This trick makes rtc-ds1742 driver usable as is. */
@@ -308,11 +211,6 @@ static int __init jmr3927_rtc_init(void)
308 return IS_ERR(dev) ? PTR_ERR(dev) : 0; 211 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
309} 212}
310 213
311static void __init tx3927_wdt_init(void)
312{
313 txx9_wdt_init(TX3927_TMR_REG(2));
314}
315
316static void __init jmr3927_device_init(void) 214static void __init jmr3927_device_init(void)
317{ 215{
318 __swizzle_addr_b = jmr3927_swizzle_addr_b; 216 __swizzle_addr_b = jmr3927_swizzle_addr_b;