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authorLinus Torvalds <torvalds@linux-foundation.org>2008-10-11 12:19:02 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-10-11 12:19:02 -0400
commit835a1c092432b3293ba6c4dec45ee6869c6f61fd (patch)
treea48582e4e4de3a8924b700c5ccaae78cd299cd73 /arch/mips/txx9/generic/setup_tx3927.c
parentd3570a5a7b8d0604fa012129f92637dc1534f62c (diff)
parent9609e74093abd9f61fb1d20a8915a8ea87c77d5a (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (49 commits) MIPS: RB532: provide GPIO_BUILTIN_NR and irq_to_gpio/gpio_to_irq MIPS: Move ptrace prototypes to ptrace.h MIPS: Ptrace support for HARDWARE_WATCHPOINTS MIPS: Scheduler support for HARDWARE_WATCHPOINTS. MIPS: Watch exception handling for HARDWARE_WATCHPOINTS. MIPS: Probe watch registers and report configuration. MIPS: Add HARDWARE_WATCHPOINTS definitions and support code. MIPS: Add HARDWARE_WATCHPOINTS configure option. MIPS: Replace use of <asm-generic/uaccess.h> with native implementations. MIPS: TXx9: Add TX4939 ATA support (v2) MIPS: Rewrite spinlocks to ticket locks. MIPS: IP checksums: Optimize adjust of sum on buffers of odd alignment. MIPS: IP checksums: Remove unncessary .set pseudos MIPS: IP checksums: Remove unncessary folding of sum to 16 bit. MIPS: Move headfiles to new location below arch/mips/include MIPS: Alchemy: rename directory MIPS: Optimize get_user and put_user for 64-bit MIPS: TXx9: Implement prom_free_prom_memory MIPS: TXx9: Add RBTX4939 board support MIPS: TXx9: Add TX4939 SoC support ...
Diffstat (limited to 'arch/mips/txx9/generic/setup_tx3927.c')
-rw-r--r--arch/mips/txx9/generic/setup_tx3927.c37
1 files changed, 22 insertions, 15 deletions
diff --git a/arch/mips/txx9/generic/setup_tx3927.c b/arch/mips/txx9/generic/setup_tx3927.c
index 7bd963d37fc3..9505d58454c8 100644
--- a/arch/mips/txx9/generic/setup_tx3927.c
+++ b/arch/mips/txx9/generic/setup_tx3927.c
@@ -15,6 +15,7 @@
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/param.h> 16#include <linux/param.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/mtd/physmap.h>
18#include <asm/mipsregs.h> 19#include <asm/mipsregs.h>
19#include <asm/txx9irq.h> 20#include <asm/txx9irq.h>
20#include <asm/txx9tmr.h> 21#include <asm/txx9tmr.h>
@@ -32,11 +33,6 @@ void __init tx3927_setup(void)
32 int i; 33 int i;
33 unsigned int conf; 34 unsigned int conf;
34 35
35 /* don't enable - see errata */
36 txx9_ccfg_toeon = 0;
37 if (strstr(prom_getcmdline(), "toeon") != NULL)
38 txx9_ccfg_toeon = 1;
39
40 txx9_reg_res_init(TX3927_REV_PCODE(), TX3927_REG_BASE, 36 txx9_reg_res_init(TX3927_REV_PCODE(), TX3927_REG_BASE,
41 TX3927_REG_SIZE); 37 TX3927_REG_SIZE);
42 38
@@ -99,16 +95,14 @@ void __init tx3927_setup(void)
99 txx9_gpio_init(TX3927_PIO_REG, 0, 16); 95 txx9_gpio_init(TX3927_PIO_REG, 0, 16);
100 96
101 conf = read_c0_conf(); 97 conf = read_c0_conf();
102 if (!(conf & TX39_CONF_ICE)) 98 if (conf & TX39_CONF_DCE) {
103 printk(KERN_INFO "TX3927 I-Cache disabled.\n"); 99 if (!(conf & TX39_CONF_WBON))
104 if (!(conf & TX39_CONF_DCE)) 100 pr_info("TX3927 D-Cache WriteThrough.\n");
105 printk(KERN_INFO "TX3927 D-Cache disabled.\n"); 101 else if (!(conf & TX39_CONF_CWFON))
106 else if (!(conf & TX39_CONF_WBON)) 102 pr_info("TX3927 D-Cache WriteBack.\n");
107 printk(KERN_INFO "TX3927 D-Cache WriteThrough.\n"); 103 else
108 else if (!(conf & TX39_CONF_CWFON)) 104 pr_info("TX3927 D-Cache WriteBack (CWF) .\n");
109 printk(KERN_INFO "TX3927 D-Cache WriteBack.\n"); 105 }
110 else
111 printk(KERN_INFO "TX3927 D-Cache WriteBack (CWF) .\n");
112} 106}
113 107
114void __init tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr) 108void __init tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr)
@@ -128,3 +122,16 @@ void __init tx3927_sio_init(unsigned int sclk, unsigned int cts_mask)
128 TXX9_IRQ_BASE + TX3927_IR_SIO(i), 122 TXX9_IRQ_BASE + TX3927_IR_SIO(i),
129 i, sclk, (1 << i) & cts_mask); 123 i, sclk, (1 << i) & cts_mask);
130} 124}
125
126void __init tx3927_mtd_init(int ch)
127{
128 struct physmap_flash_data pdata = {
129 .width = TX3927_ROMC_WIDTH(ch) / 8,
130 };
131 unsigned long start = txx9_ce_res[ch].start;
132 unsigned long size = txx9_ce_res[ch].end - start + 1;
133
134 if (!(tx3927_romcptr->cr[ch] & 0x8))
135 return; /* disabled */
136 txx9_physmap_flash_init(ch, start, size, &pdata);
137}