aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/tx4938
diff options
context:
space:
mode:
authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2007-10-24 12:34:09 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-29 15:35:35 -0400
commit229f773ef4ee852ad7bfbe8e1238a2c35b2baa6f (patch)
tree44d9dd3f2be845140024883db13ab879b4ce1f2e /arch/mips/tx4938
parent22df3f53e33d55335e1ef43d4e6ead54b379b3a2 (diff)
[MIPS] txx9tmr clockevent/clocksource driver
Convert jmr3927_clock_event_device to more generic txx9tmr_clock_event_device which supports one-shot mode. The txx9tmr_clock_event_device can be used for TX49 too if the cp0 timer interrupt was not available. Convert jmr3927_hpt_read to txx9_clocksource driver which does not depends jiffies anymore. The txx9_clocksource itself can be used for TX49, but normally TX49 uses higher precision clocksource_mips. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/tx4938')
-rw-r--r--arch/mips/tx4938/toshiba_rbtx4938/setup.c19
1 files changed, 7 insertions, 12 deletions
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
index ceecaf498957..4a8152375efe 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
@@ -26,6 +26,7 @@
26#include <asm/reboot.h> 26#include <asm/reboot.h>
27#include <asm/irq.h> 27#include <asm/irq.h>
28#include <asm/time.h> 28#include <asm/time.h>
29#include <asm/txx9tmr.h>
29#include <asm/uaccess.h> 30#include <asm/uaccess.h>
30#include <asm/io.h> 31#include <asm/io.h>
31#include <asm/bootinfo.h> 32#include <asm/bootinfo.h>
@@ -773,15 +774,8 @@ void __init tx4938_board_setup(void)
773 } 774 }
774 775
775 /* TMR */ 776 /* TMR */
776 /* disable all timers */ 777 for (i = 0; i < TX4938_NR_TMR; i++)
777 for (i = 0; i < TX4938_NR_TMR; i++) { 778 txx9_tmr_init(TX4938_TMR_REG(i) & 0xfffffffffULL);
778 tx4938_tmrptr(i)->tcr = 0x00000020;
779 tx4938_tmrptr(i)->tisr = 0;
780 tx4938_tmrptr(i)->cpra = 0xffffffff;
781 tx4938_tmrptr(i)->itmr = 0;
782 tx4938_tmrptr(i)->ccdr = 0;
783 tx4938_tmrptr(i)->pgmr = 0;
784 }
785 779
786 /* enable DMA */ 780 /* enable DMA */
787 TX4938_WR64(0xff1fb150, TX4938_DMA_MCR_MSTEN); 781 TX4938_WR64(0xff1fb150, TX4938_DMA_MCR_MSTEN);
@@ -852,12 +846,13 @@ void tx4938_report_pcic_status(void)
852 846
853#endif /* CONFIG_PCI */ 847#endif /* CONFIG_PCI */
854 848
855/* We use onchip r4k counter or TMR timer as our system wide timer
856 * interrupt running at 100HZ. */
857
858void __init plat_time_init(void) 849void __init plat_time_init(void)
859{ 850{
860 mips_hpt_frequency = txx9_cpu_clock / 2; 851 mips_hpt_frequency = txx9_cpu_clock / 2;
852 if (tx4938_ccfgptr->ccfg & TX4938_CCFG_TINTDIS)
853 txx9_clockevent_init(TX4938_TMR_REG(0) & 0xfffffffffULL,
854 TXX9_IRQ_BASE + TX4938_IR_TMR(0),
855 txx9_gbus_clock / 2);
861} 856}
862 857
863void __init toshiba_rbtx4938_setup(void) 858void __init toshiba_rbtx4938_setup(void)