diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2006-11-01 12:08:36 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-11-29 20:14:46 -0500 |
commit | 1603b5aca4f15b34848fb5594d0c7b6333b99144 (patch) | |
tree | 79272aa41d6510b7256df62e287676885c3960cf /arch/mips/tx4938 | |
parent | c87b6ebaea034c0e0ce86127870cf1511a307b64 (diff) |
[MIPS] IRQ cleanups
This is a big irq cleanup patch.
* Use set_irq_chip() to register irq_chip.
* Initialize .mask, .unmask, .mask_ack field. Functions for these
method are already exist in most case.
* Do not initialize .startup, .shutdown, .enable, .disable fields if
default routines provided by irq_chip_set_defaults() were suitable.
* Remove redundant irq_desc initializations.
* Remove unnecessary local_irq_save/local_irq_restore, spin_lock.
With this cleanup, it would be easy to switch to slightly lightwait
irq flow handlers (handle_level_irq(), etc.) instead of __do_IRQ().
Though whole this patch is quite large, changes in each irq_chip are
not quite simple. Please review and test on your platform. Thanks.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/tx4938')
-rw-r--r-- | arch/mips/tx4938/common/irq.c | 113 | ||||
-rw-r--r-- | arch/mips/tx4938/toshiba_rbtx4938/irq.c | 53 |
2 files changed, 18 insertions, 148 deletions
diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c index 77fe2454f5b9..19c9ee9e3d0c 100644 --- a/arch/mips/tx4938/common/irq.c +++ b/arch/mips/tx4938/common/irq.c | |||
@@ -37,48 +37,36 @@ | |||
37 | /* Forwad definitions for all pic's */ | 37 | /* Forwad definitions for all pic's */ |
38 | /**********************************************************************************/ | 38 | /**********************************************************************************/ |
39 | 39 | ||
40 | static unsigned int tx4938_irq_cp0_startup(unsigned int irq); | ||
41 | static void tx4938_irq_cp0_shutdown(unsigned int irq); | ||
42 | static void tx4938_irq_cp0_enable(unsigned int irq); | 40 | static void tx4938_irq_cp0_enable(unsigned int irq); |
43 | static void tx4938_irq_cp0_disable(unsigned int irq); | 41 | static void tx4938_irq_cp0_disable(unsigned int irq); |
44 | static void tx4938_irq_cp0_mask_and_ack(unsigned int irq); | ||
45 | static void tx4938_irq_cp0_end(unsigned int irq); | 42 | static void tx4938_irq_cp0_end(unsigned int irq); |
46 | 43 | ||
47 | static unsigned int tx4938_irq_pic_startup(unsigned int irq); | ||
48 | static void tx4938_irq_pic_shutdown(unsigned int irq); | ||
49 | static void tx4938_irq_pic_enable(unsigned int irq); | 44 | static void tx4938_irq_pic_enable(unsigned int irq); |
50 | static void tx4938_irq_pic_disable(unsigned int irq); | 45 | static void tx4938_irq_pic_disable(unsigned int irq); |
51 | static void tx4938_irq_pic_mask_and_ack(unsigned int irq); | ||
52 | static void tx4938_irq_pic_end(unsigned int irq); | 46 | static void tx4938_irq_pic_end(unsigned int irq); |
53 | 47 | ||
54 | /**********************************************************************************/ | 48 | /**********************************************************************************/ |
55 | /* Kernel structs for all pic's */ | 49 | /* Kernel structs for all pic's */ |
56 | /**********************************************************************************/ | 50 | /**********************************************************************************/ |
57 | DEFINE_SPINLOCK(tx4938_cp0_lock); | ||
58 | DEFINE_SPINLOCK(tx4938_pic_lock); | ||
59 | 51 | ||
60 | #define TX4938_CP0_NAME "TX4938-CP0" | 52 | #define TX4938_CP0_NAME "TX4938-CP0" |
61 | static struct irq_chip tx4938_irq_cp0_type = { | 53 | static struct irq_chip tx4938_irq_cp0_type = { |
62 | .typename = TX4938_CP0_NAME, | 54 | .typename = TX4938_CP0_NAME, |
63 | .startup = tx4938_irq_cp0_startup, | 55 | .ack = tx4938_irq_cp0_disable, |
64 | .shutdown = tx4938_irq_cp0_shutdown, | 56 | .mask = tx4938_irq_cp0_disable, |
65 | .enable = tx4938_irq_cp0_enable, | 57 | .mask_ack = tx4938_irq_cp0_disable, |
66 | .disable = tx4938_irq_cp0_disable, | 58 | .unmask = tx4938_irq_cp0_enable, |
67 | .ack = tx4938_irq_cp0_mask_and_ack, | ||
68 | .end = tx4938_irq_cp0_end, | 59 | .end = tx4938_irq_cp0_end, |
69 | .set_affinity = NULL | ||
70 | }; | 60 | }; |
71 | 61 | ||
72 | #define TX4938_PIC_NAME "TX4938-PIC" | 62 | #define TX4938_PIC_NAME "TX4938-PIC" |
73 | static struct irq_chip tx4938_irq_pic_type = { | 63 | static struct irq_chip tx4938_irq_pic_type = { |
74 | .typename = TX4938_PIC_NAME, | 64 | .typename = TX4938_PIC_NAME, |
75 | .startup = tx4938_irq_pic_startup, | 65 | .ack = tx4938_irq_pic_disable, |
76 | .shutdown = tx4938_irq_pic_shutdown, | 66 | .mask = tx4938_irq_pic_disable, |
77 | .enable = tx4938_irq_pic_enable, | 67 | .mask_ack = tx4938_irq_pic_disable, |
78 | .disable = tx4938_irq_pic_disable, | 68 | .unmask = tx4938_irq_pic_enable, |
79 | .ack = tx4938_irq_pic_mask_and_ack, | ||
80 | .end = tx4938_irq_pic_end, | 69 | .end = tx4938_irq_pic_end, |
81 | .set_affinity = NULL | ||
82 | }; | 70 | }; |
83 | 71 | ||
84 | static struct irqaction tx4938_irq_pic_action = { | 72 | static struct irqaction tx4938_irq_pic_action = { |
@@ -99,56 +87,20 @@ tx4938_irq_cp0_init(void) | |||
99 | { | 87 | { |
100 | int i; | 88 | int i; |
101 | 89 | ||
102 | for (i = TX4938_IRQ_CP0_BEG; i <= TX4938_IRQ_CP0_END; i++) { | 90 | for (i = TX4938_IRQ_CP0_BEG; i <= TX4938_IRQ_CP0_END; i++) |
103 | irq_desc[i].status = IRQ_DISABLED; | 91 | set_irq_chip(i, &tx4938_irq_cp0_type); |
104 | irq_desc[i].action = 0; | ||
105 | irq_desc[i].depth = 1; | ||
106 | irq_desc[i].chip = &tx4938_irq_cp0_type; | ||
107 | } | ||
108 | } | ||
109 | |||
110 | static unsigned int | ||
111 | tx4938_irq_cp0_startup(unsigned int irq) | ||
112 | { | ||
113 | tx4938_irq_cp0_enable(irq); | ||
114 | |||
115 | return 0; | ||
116 | } | ||
117 | |||
118 | static void | ||
119 | tx4938_irq_cp0_shutdown(unsigned int irq) | ||
120 | { | ||
121 | tx4938_irq_cp0_disable(irq); | ||
122 | } | 92 | } |
123 | 93 | ||
124 | static void | 94 | static void |
125 | tx4938_irq_cp0_enable(unsigned int irq) | 95 | tx4938_irq_cp0_enable(unsigned int irq) |
126 | { | 96 | { |
127 | unsigned long flags; | ||
128 | |||
129 | spin_lock_irqsave(&tx4938_cp0_lock, flags); | ||
130 | |||
131 | set_c0_status(tx4938_irq_cp0_mask(irq)); | 97 | set_c0_status(tx4938_irq_cp0_mask(irq)); |
132 | |||
133 | spin_unlock_irqrestore(&tx4938_cp0_lock, flags); | ||
134 | } | 98 | } |
135 | 99 | ||
136 | static void | 100 | static void |
137 | tx4938_irq_cp0_disable(unsigned int irq) | 101 | tx4938_irq_cp0_disable(unsigned int irq) |
138 | { | 102 | { |
139 | unsigned long flags; | ||
140 | |||
141 | spin_lock_irqsave(&tx4938_cp0_lock, flags); | ||
142 | |||
143 | clear_c0_status(tx4938_irq_cp0_mask(irq)); | 103 | clear_c0_status(tx4938_irq_cp0_mask(irq)); |
144 | |||
145 | spin_unlock_irqrestore(&tx4938_cp0_lock, flags); | ||
146 | } | ||
147 | |||
148 | static void | ||
149 | tx4938_irq_cp0_mask_and_ack(unsigned int irq) | ||
150 | { | ||
151 | tx4938_irq_cp0_disable(irq); | ||
152 | } | 104 | } |
153 | 105 | ||
154 | static void | 106 | static void |
@@ -290,70 +242,29 @@ tx4938_irq_pic_modify(unsigned pic_reg, unsigned clr_bits, unsigned set_bits) | |||
290 | static void __init | 242 | static void __init |
291 | tx4938_irq_pic_init(void) | 243 | tx4938_irq_pic_init(void) |
292 | { | 244 | { |
293 | unsigned long flags; | ||
294 | int i; | 245 | int i; |
295 | 246 | ||
296 | for (i = TX4938_IRQ_PIC_BEG; i <= TX4938_IRQ_PIC_END; i++) { | 247 | for (i = TX4938_IRQ_PIC_BEG; i <= TX4938_IRQ_PIC_END; i++) |
297 | irq_desc[i].status = IRQ_DISABLED; | 248 | set_irq_chip(i, &tx4938_irq_pic_type); |
298 | irq_desc[i].action = 0; | ||
299 | irq_desc[i].depth = 2; | ||
300 | irq_desc[i].chip = &tx4938_irq_pic_type; | ||
301 | } | ||
302 | 249 | ||
303 | setup_irq(TX4938_IRQ_NEST_PIC_ON_CP0, &tx4938_irq_pic_action); | 250 | setup_irq(TX4938_IRQ_NEST_PIC_ON_CP0, &tx4938_irq_pic_action); |
304 | 251 | ||
305 | spin_lock_irqsave(&tx4938_pic_lock, flags); | ||
306 | |||
307 | TX4938_WR(0xff1ff640, 0x6); /* irq level mask -- only accept hightest */ | 252 | TX4938_WR(0xff1ff640, 0x6); /* irq level mask -- only accept hightest */ |
308 | TX4938_WR(0xff1ff600, TX4938_RD(0xff1ff600) | 0x1); /* irq enable */ | 253 | TX4938_WR(0xff1ff600, TX4938_RD(0xff1ff600) | 0x1); /* irq enable */ |
309 | |||
310 | spin_unlock_irqrestore(&tx4938_pic_lock, flags); | ||
311 | } | ||
312 | |||
313 | static unsigned int | ||
314 | tx4938_irq_pic_startup(unsigned int irq) | ||
315 | { | ||
316 | tx4938_irq_pic_enable(irq); | ||
317 | |||
318 | return 0; | ||
319 | } | ||
320 | |||
321 | static void | ||
322 | tx4938_irq_pic_shutdown(unsigned int irq) | ||
323 | { | ||
324 | tx4938_irq_pic_disable(irq); | ||
325 | } | 254 | } |
326 | 255 | ||
327 | static void | 256 | static void |
328 | tx4938_irq_pic_enable(unsigned int irq) | 257 | tx4938_irq_pic_enable(unsigned int irq) |
329 | { | 258 | { |
330 | unsigned long flags; | ||
331 | |||
332 | spin_lock_irqsave(&tx4938_pic_lock, flags); | ||
333 | |||
334 | tx4938_irq_pic_modify(tx4938_irq_pic_addr(irq), 0, | 259 | tx4938_irq_pic_modify(tx4938_irq_pic_addr(irq), 0, |
335 | tx4938_irq_pic_mask(irq)); | 260 | tx4938_irq_pic_mask(irq)); |
336 | |||
337 | spin_unlock_irqrestore(&tx4938_pic_lock, flags); | ||
338 | } | 261 | } |
339 | 262 | ||
340 | static void | 263 | static void |
341 | tx4938_irq_pic_disable(unsigned int irq) | 264 | tx4938_irq_pic_disable(unsigned int irq) |
342 | { | 265 | { |
343 | unsigned long flags; | ||
344 | |||
345 | spin_lock_irqsave(&tx4938_pic_lock, flags); | ||
346 | |||
347 | tx4938_irq_pic_modify(tx4938_irq_pic_addr(irq), | 266 | tx4938_irq_pic_modify(tx4938_irq_pic_addr(irq), |
348 | tx4938_irq_pic_mask(irq), 0); | 267 | tx4938_irq_pic_mask(irq), 0); |
349 | |||
350 | spin_unlock_irqrestore(&tx4938_pic_lock, flags); | ||
351 | } | ||
352 | |||
353 | static void | ||
354 | tx4938_irq_pic_mask_and_ack(unsigned int irq) | ||
355 | { | ||
356 | tx4938_irq_pic_disable(irq); | ||
357 | } | 268 | } |
358 | 269 | ||
359 | static void | 270 | static void |
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/irq.c b/arch/mips/tx4938/toshiba_rbtx4938/irq.c index 102e473c10a2..2735ffe9ec28 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/irq.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/irq.c | |||
@@ -87,25 +87,18 @@ IRQ Device | |||
87 | #include <linux/bootmem.h> | 87 | #include <linux/bootmem.h> |
88 | #include <asm/tx4938/rbtx4938.h> | 88 | #include <asm/tx4938/rbtx4938.h> |
89 | 89 | ||
90 | static unsigned int toshiba_rbtx4938_irq_ioc_startup(unsigned int irq); | ||
91 | static void toshiba_rbtx4938_irq_ioc_shutdown(unsigned int irq); | ||
92 | static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq); | 90 | static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq); |
93 | static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq); | 91 | static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq); |
94 | static void toshiba_rbtx4938_irq_ioc_mask_and_ack(unsigned int irq); | ||
95 | static void toshiba_rbtx4938_irq_ioc_end(unsigned int irq); | 92 | static void toshiba_rbtx4938_irq_ioc_end(unsigned int irq); |
96 | 93 | ||
97 | DEFINE_SPINLOCK(toshiba_rbtx4938_ioc_lock); | ||
98 | |||
99 | #define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC" | 94 | #define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC" |
100 | static struct irq_chip toshiba_rbtx4938_irq_ioc_type = { | 95 | static struct irq_chip toshiba_rbtx4938_irq_ioc_type = { |
101 | .typename = TOSHIBA_RBTX4938_IOC_NAME, | 96 | .typename = TOSHIBA_RBTX4938_IOC_NAME, |
102 | .startup = toshiba_rbtx4938_irq_ioc_startup, | 97 | .ack = toshiba_rbtx4938_irq_ioc_disable, |
103 | .shutdown = toshiba_rbtx4938_irq_ioc_shutdown, | 98 | .mask = toshiba_rbtx4938_irq_ioc_disable, |
104 | .enable = toshiba_rbtx4938_irq_ioc_enable, | 99 | .mask_ack = toshiba_rbtx4938_irq_ioc_disable, |
105 | .disable = toshiba_rbtx4938_irq_ioc_disable, | 100 | .unmask = toshiba_rbtx4938_irq_ioc_enable, |
106 | .ack = toshiba_rbtx4938_irq_ioc_mask_and_ack, | ||
107 | .end = toshiba_rbtx4938_irq_ioc_end, | 101 | .end = toshiba_rbtx4938_irq_ioc_end, |
108 | .set_affinity = NULL | ||
109 | }; | 102 | }; |
110 | 103 | ||
111 | #define TOSHIBA_RBTX4938_IOC_INTR_ENAB 0xb7f02000 | 104 | #define TOSHIBA_RBTX4938_IOC_INTR_ENAB 0xb7f02000 |
@@ -142,69 +135,35 @@ toshiba_rbtx4938_irq_ioc_init(void) | |||
142 | int i; | 135 | int i; |
143 | 136 | ||
144 | for (i = TOSHIBA_RBTX4938_IRQ_IOC_BEG; | 137 | for (i = TOSHIBA_RBTX4938_IRQ_IOC_BEG; |
145 | i <= TOSHIBA_RBTX4938_IRQ_IOC_END; i++) { | 138 | i <= TOSHIBA_RBTX4938_IRQ_IOC_END; i++) |
146 | irq_desc[i].status = IRQ_DISABLED; | 139 | set_irq_chip(i, &toshiba_rbtx4938_irq_ioc_type); |
147 | irq_desc[i].action = 0; | ||
148 | irq_desc[i].depth = 3; | ||
149 | irq_desc[i].chip = &toshiba_rbtx4938_irq_ioc_type; | ||
150 | } | ||
151 | 140 | ||
152 | setup_irq(RBTX4938_IRQ_IOCINT, | 141 | setup_irq(RBTX4938_IRQ_IOCINT, |
153 | &toshiba_rbtx4938_irq_ioc_action); | 142 | &toshiba_rbtx4938_irq_ioc_action); |
154 | } | 143 | } |
155 | 144 | ||
156 | static unsigned int | ||
157 | toshiba_rbtx4938_irq_ioc_startup(unsigned int irq) | ||
158 | { | ||
159 | toshiba_rbtx4938_irq_ioc_enable(irq); | ||
160 | |||
161 | return 0; | ||
162 | } | ||
163 | |||
164 | static void | ||
165 | toshiba_rbtx4938_irq_ioc_shutdown(unsigned int irq) | ||
166 | { | ||
167 | toshiba_rbtx4938_irq_ioc_disable(irq); | ||
168 | } | ||
169 | |||
170 | static void | 145 | static void |
171 | toshiba_rbtx4938_irq_ioc_enable(unsigned int irq) | 146 | toshiba_rbtx4938_irq_ioc_enable(unsigned int irq) |
172 | { | 147 | { |
173 | unsigned long flags; | ||
174 | volatile unsigned char v; | 148 | volatile unsigned char v; |
175 | 149 | ||
176 | spin_lock_irqsave(&toshiba_rbtx4938_ioc_lock, flags); | ||
177 | |||
178 | v = TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); | 150 | v = TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); |
179 | v |= (1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG)); | 151 | v |= (1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG)); |
180 | TX4938_WR08(TOSHIBA_RBTX4938_IOC_INTR_ENAB, v); | 152 | TX4938_WR08(TOSHIBA_RBTX4938_IOC_INTR_ENAB, v); |
181 | mmiowb(); | 153 | mmiowb(); |
182 | TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); | 154 | TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); |
183 | |||
184 | spin_unlock_irqrestore(&toshiba_rbtx4938_ioc_lock, flags); | ||
185 | } | 155 | } |
186 | 156 | ||
187 | static void | 157 | static void |
188 | toshiba_rbtx4938_irq_ioc_disable(unsigned int irq) | 158 | toshiba_rbtx4938_irq_ioc_disable(unsigned int irq) |
189 | { | 159 | { |
190 | unsigned long flags; | ||
191 | volatile unsigned char v; | 160 | volatile unsigned char v; |
192 | 161 | ||
193 | spin_lock_irqsave(&toshiba_rbtx4938_ioc_lock, flags); | ||
194 | |||
195 | v = TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); | 162 | v = TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); |
196 | v &= ~(1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG)); | 163 | v &= ~(1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG)); |
197 | TX4938_WR08(TOSHIBA_RBTX4938_IOC_INTR_ENAB, v); | 164 | TX4938_WR08(TOSHIBA_RBTX4938_IOC_INTR_ENAB, v); |
198 | mmiowb(); | 165 | mmiowb(); |
199 | TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); | 166 | TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); |
200 | |||
201 | spin_unlock_irqrestore(&toshiba_rbtx4938_ioc_lock, flags); | ||
202 | } | ||
203 | |||
204 | static void | ||
205 | toshiba_rbtx4938_irq_ioc_mask_and_ack(unsigned int irq) | ||
206 | { | ||
207 | toshiba_rbtx4938_irq_ioc_disable(irq); | ||
208 | } | 167 | } |
209 | 168 | ||
210 | static void | 169 | static void |