aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/tx4938/common
diff options
context:
space:
mode:
authorRalf Baechle <ralf@linux-mips.org>2006-10-07 14:44:33 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-10-07 21:38:28 -0400
commit937a801576f954bd030d7c4a5a94571710d87c0b (patch)
tree48d3440f765b56cf32a89b4b8193dd033d8227a8 /arch/mips/tx4938/common
parent31aa36658a123263a9a69896e348b9600e050679 (diff)
[MIPS] Complete fixes after removal of pt_regs argument to int handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/tx4938/common')
-rw-r--r--arch/mips/tx4938/common/irq.c46
1 files changed, 11 insertions, 35 deletions
diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c
index cbfb34221b59..b6024749b8f4 100644
--- a/arch/mips/tx4938/common/irq.c
+++ b/arch/mips/tx4938/common/irq.c
@@ -104,8 +104,6 @@ tx4938_irq_cp0_init(void)
104 irq_desc[i].depth = 1; 104 irq_desc[i].depth = 1;
105 irq_desc[i].chip = &tx4938_irq_cp0_type; 105 irq_desc[i].chip = &tx4938_irq_cp0_type;
106 } 106 }
107
108 return;
109} 107}
110 108
111static unsigned int 109static unsigned int
@@ -113,7 +111,7 @@ tx4938_irq_cp0_startup(unsigned int irq)
113{ 111{
114 tx4938_irq_cp0_enable(irq); 112 tx4938_irq_cp0_enable(irq);
115 113
116 return (0); 114 return 0;
117} 115}
118 116
119static void 117static void
@@ -144,16 +142,12 @@ tx4938_irq_cp0_disable(unsigned int irq)
144 clear_c0_status(tx4938_irq_cp0_mask(irq)); 142 clear_c0_status(tx4938_irq_cp0_mask(irq));
145 143
146 spin_unlock_irqrestore(&tx4938_cp0_lock, flags); 144 spin_unlock_irqrestore(&tx4938_cp0_lock, flags);
147
148 return;
149} 145}
150 146
151static void 147static void
152tx4938_irq_cp0_mask_and_ack(unsigned int irq) 148tx4938_irq_cp0_mask_and_ack(unsigned int irq)
153{ 149{
154 tx4938_irq_cp0_disable(irq); 150 tx4938_irq_cp0_disable(irq);
155
156 return;
157} 151}
158 152
159static void 153static void
@@ -162,8 +156,6 @@ tx4938_irq_cp0_end(unsigned int irq)
162 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { 156 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
163 tx4938_irq_cp0_enable(irq); 157 tx4938_irq_cp0_enable(irq);
164 } 158 }
165
166 return;
167} 159}
168 160
169/**********************************************************************************/ 161/**********************************************************************************/
@@ -227,7 +219,7 @@ tx4938_irq_pic_addr(int irq)
227 } 219 }
228 } 220 }
229 221
230 return (0); 222 return 0;
231} 223}
232 224
233u32 225u32
@@ -278,7 +270,7 @@ tx4938_irq_pic_mask(int irq)
278 return (0x00000007); 270 return (0x00000007);
279 } 271 }
280 } 272 }
281 return (0x00000000); 273 return 0x00000000;
282} 274}
283 275
284static void 276static void
@@ -292,8 +284,6 @@ tx4938_irq_pic_modify(unsigned pic_reg, unsigned clr_bits, unsigned set_bits)
292 TX4938_WR(pic_reg, val); 284 TX4938_WR(pic_reg, val);
293 mmiowb(); 285 mmiowb();
294 TX4938_RD(pic_reg); 286 TX4938_RD(pic_reg);
295
296 return;
297} 287}
298 288
299static void __init 289static void __init
@@ -317,8 +307,6 @@ tx4938_irq_pic_init(void)
317 TX4938_WR(0xff1ff600, TX4938_RD(0xff1ff600) | 0x1); /* irq enable */ 307 TX4938_WR(0xff1ff600, TX4938_RD(0xff1ff600) | 0x1); /* irq enable */
318 308
319 spin_unlock_irqrestore(&tx4938_pic_lock, flags); 309 spin_unlock_irqrestore(&tx4938_pic_lock, flags);
320
321 return;
322} 310}
323 311
324static unsigned int 312static unsigned int
@@ -326,15 +314,13 @@ tx4938_irq_pic_startup(unsigned int irq)
326{ 314{
327 tx4938_irq_pic_enable(irq); 315 tx4938_irq_pic_enable(irq);
328 316
329 return (0); 317 return 0;
330} 318}
331 319
332static void 320static void
333tx4938_irq_pic_shutdown(unsigned int irq) 321tx4938_irq_pic_shutdown(unsigned int irq)
334{ 322{
335 tx4938_irq_pic_disable(irq); 323 tx4938_irq_pic_disable(irq);
336
337 return;
338} 324}
339 325
340static void 326static void
@@ -348,8 +334,6 @@ tx4938_irq_pic_enable(unsigned int irq)
348 tx4938_irq_pic_mask(irq)); 334 tx4938_irq_pic_mask(irq));
349 335
350 spin_unlock_irqrestore(&tx4938_pic_lock, flags); 336 spin_unlock_irqrestore(&tx4938_pic_lock, flags);
351
352 return;
353} 337}
354 338
355static void 339static void
@@ -363,16 +347,12 @@ tx4938_irq_pic_disable(unsigned int irq)
363 tx4938_irq_pic_mask(irq), 0); 347 tx4938_irq_pic_mask(irq), 0);
364 348
365 spin_unlock_irqrestore(&tx4938_pic_lock, flags); 349 spin_unlock_irqrestore(&tx4938_pic_lock, flags);
366
367 return;
368} 350}
369 351
370static void 352static void
371tx4938_irq_pic_mask_and_ack(unsigned int irq) 353tx4938_irq_pic_mask_and_ack(unsigned int irq)
372{ 354{
373 tx4938_irq_pic_disable(irq); 355 tx4938_irq_pic_disable(irq);
374
375 return;
376} 356}
377 357
378static void 358static void
@@ -381,8 +361,6 @@ tx4938_irq_pic_end(unsigned int irq)
381 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { 361 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
382 tx4938_irq_pic_enable(irq); 362 tx4938_irq_pic_enable(irq);
383 } 363 }
384
385 return;
386} 364}
387 365
388/**********************************************************************************/ 366/**********************************************************************************/
@@ -394,8 +372,6 @@ tx4938_irq_init(void)
394{ 372{
395 tx4938_irq_cp0_init(); 373 tx4938_irq_cp0_init();
396 tx4938_irq_pic_init(); 374 tx4938_irq_pic_init();
397
398 return;
399} 375}
400 376
401int 377int
@@ -417,23 +393,23 @@ tx4938_irq_nested(void)
417 } 393 }
418 394
419 wbflush(); 395 wbflush();
420 return (sw_irq); 396 return sw_irq;
421} 397}
422 398
423asmlinkage void plat_irq_dispatch(struct pt_regs *regs) 399asmlinkage void plat_irq_dispatch(void)
424{ 400{
425 unsigned int pending = read_c0_cause() & read_c0_status(); 401 unsigned int pending = read_c0_cause() & read_c0_status();
426 402
427 if (pending & STATUSF_IP7) 403 if (pending & STATUSF_IP7)
428 do_IRQ(TX4938_IRQ_CPU_TIMER, regs); 404 do_IRQ(TX4938_IRQ_CPU_TIMER);
429 else if (pending & STATUSF_IP2) { 405 else if (pending & STATUSF_IP2) {
430 int irq = tx4938_irq_nested(); 406 int irq = tx4938_irq_nested();
431 if (irq) 407 if (irq)
432 do_IRQ(irq, regs); 408 do_IRQ(irq);
433 else 409 else
434 spurious_interrupt(regs); 410 spurious_interrupt();
435 } else if (pending & STATUSF_IP1) 411 } else if (pending & STATUSF_IP1)
436 do_IRQ(TX4938_IRQ_USER1, regs); 412 do_IRQ(TX4938_IRQ_USER1);
437 else if (pending & STATUSF_IP0) 413 else if (pending & STATUSF_IP0)
438 do_IRQ(TX4938_IRQ_USER0, regs); 414 do_IRQ(TX4938_IRQ_USER0);
439} 415}