diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2007-10-24 10:16:56 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2008-01-29 05:14:55 -0500 |
commit | 8b6c2324bf2b023e26d53052bbcddcbf2f2c97ee (patch) | |
tree | bcf2ffec2908d61e40efe902508236aa73fad872 /arch/mips/tx4927 | |
parent | 619b6e18fce20e4b2d0082cde989f37e1be7b3e1 (diff) |
[MIPS] cleanup tx39/tx49 setup code
Remove some unnecessary codes, includes and files.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/tx4927')
-rw-r--r-- | arch/mips/tx4927/common/Makefile | 2 | ||||
-rw-r--r-- | arch/mips/tx4927/common/tx4927_setup.c | 186 | ||||
-rw-r--r-- | arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c | 41 |
3 files changed, 5 insertions, 224 deletions
diff --git a/arch/mips/tx4927/common/Makefile b/arch/mips/tx4927/common/Makefile index 18375787e094..e4a5e464b376 100644 --- a/arch/mips/tx4927/common/Makefile +++ b/arch/mips/tx4927/common/Makefile | |||
@@ -6,7 +6,7 @@ | |||
6 | # unless it's something special (ie not a .c file). | 6 | # unless it's something special (ie not a .c file). |
7 | # | 7 | # |
8 | 8 | ||
9 | obj-y += tx4927_prom.o tx4927_setup.o tx4927_irq.o | 9 | obj-y += tx4927_prom.o tx4927_irq.o |
10 | 10 | ||
11 | obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o | 11 | obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o |
12 | obj-$(CONFIG_KGDB) += tx4927_dbgio.o | 12 | obj-$(CONFIG_KGDB) += tx4927_dbgio.o |
diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c deleted file mode 100644 index 36c5f200eb3d..000000000000 --- a/arch/mips/tx4927/common/tx4927_setup.c +++ /dev/null | |||
@@ -1,186 +0,0 @@ | |||
1 | /* | ||
2 | * Author: MontaVista Software, Inc. | ||
3 | * source@mvista.com | ||
4 | * | ||
5 | * Copyright 2001-2002 MontaVista Software Inc. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | * | ||
12 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
13 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
14 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | ||
15 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
16 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | ||
17 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS | ||
18 | * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
19 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR | ||
20 | * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE | ||
21 | * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License along | ||
24 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
25 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
26 | */ | ||
27 | #include <linux/errno.h> | ||
28 | #include <linux/init.h> | ||
29 | #include <linux/kernel_stat.h> | ||
30 | #include <linux/module.h> | ||
31 | #include <linux/signal.h> | ||
32 | #include <linux/sched.h> | ||
33 | #include <linux/types.h> | ||
34 | #include <linux/interrupt.h> | ||
35 | #include <linux/ioport.h> | ||
36 | #include <linux/timex.h> | ||
37 | #include <linux/slab.h> | ||
38 | #include <linux/random.h> | ||
39 | #include <linux/irq.h> | ||
40 | #include <linux/bitops.h> | ||
41 | #include <asm/bootinfo.h> | ||
42 | #include <asm/io.h> | ||
43 | #include <asm/irq.h> | ||
44 | #include <asm/mipsregs.h> | ||
45 | #include <asm/system.h> | ||
46 | #include <asm/time.h> | ||
47 | #include <asm/tx4927/tx4927.h> | ||
48 | |||
49 | |||
50 | #undef DEBUG | ||
51 | |||
52 | void dump_cp0(char *key); | ||
53 | |||
54 | |||
55 | void __init plat_mem_setup(void) | ||
56 | { | ||
57 | #ifdef CONFIG_TOSHIBA_RBTX4927 | ||
58 | { | ||
59 | extern void toshiba_rbtx4927_setup(void); | ||
60 | toshiba_rbtx4927_setup(); | ||
61 | } | ||
62 | #endif | ||
63 | } | ||
64 | |||
65 | void __init plat_time_init(void) | ||
66 | { | ||
67 | #ifdef CONFIG_TOSHIBA_RBTX4927 | ||
68 | { | ||
69 | extern void toshiba_rbtx4927_time_init(void); | ||
70 | toshiba_rbtx4927_time_init(); | ||
71 | } | ||
72 | #endif | ||
73 | } | ||
74 | |||
75 | #ifdef DEBUG | ||
76 | void print_cp0(char *key, int num, char *name, u32 val) | ||
77 | { | ||
78 | printk("%s cp0:%02d:%s=0x%08x\n", key, num, name, val); | ||
79 | return; | ||
80 | } | ||
81 | |||
82 | void | ||
83 | dump_cp0(char *key) | ||
84 | { | ||
85 | if (key == NULL) | ||
86 | key = ""; | ||
87 | |||
88 | print_cp0(key, 0, "INDEX ", read_c0_index()); | ||
89 | print_cp0(key, 2, "ENTRYLO1", read_c0_entrylo0()); | ||
90 | print_cp0(key, 3, "ENTRYLO2", read_c0_entrylo1()); | ||
91 | print_cp0(key, 4, "CONTEXT ", read_c0_context()); | ||
92 | print_cp0(key, 5, "PAGEMASK", read_c0_pagemask()); | ||
93 | print_cp0(key, 6, "WIRED ", read_c0_wired()); | ||
94 | //print_cp0(key, 8, "BADVADDR", read_c0_badvaddr()); | ||
95 | print_cp0(key, 9, "COUNT ", read_c0_count()); | ||
96 | print_cp0(key, 10, "ENTRYHI ", read_c0_entryhi()); | ||
97 | print_cp0(key, 11, "COMPARE ", read_c0_compare()); | ||
98 | print_cp0(key, 12, "STATUS ", read_c0_status()); | ||
99 | print_cp0(key, 13, "CAUSE ", read_c0_cause() & 0xffff87ff); | ||
100 | print_cp0(key, 16, "CONFIG ", read_c0_config()); | ||
101 | return; | ||
102 | } | ||
103 | |||
104 | void print_pic(char *key, unsigned long reg, char *name) | ||
105 | { | ||
106 | printk(KERN_INFO "%s pic:0x%08lx:%s=0x%08x\n", key, reg, name, | ||
107 | __raw_readl((void __iomem *)reg)); | ||
108 | return; | ||
109 | } | ||
110 | |||
111 | |||
112 | void dump_pic(char *key) | ||
113 | { | ||
114 | if (key == NULL) | ||
115 | key = ""; | ||
116 | |||
117 | print_pic(key, 0xff1ff600, "IRDEN "); | ||
118 | print_pic(key, 0xff1ff604, "IRDM0 "); | ||
119 | print_pic(key, 0xff1ff608, "IRDM1 "); | ||
120 | |||
121 | print_pic(key, 0xff1ff610, "IRLVL0 "); | ||
122 | print_pic(key, 0xff1ff614, "IRLVL1 "); | ||
123 | print_pic(key, 0xff1ff618, "IRLVL2 "); | ||
124 | print_pic(key, 0xff1ff61c, "IRLVL3 "); | ||
125 | print_pic(key, 0xff1ff620, "IRLVL4 "); | ||
126 | print_pic(key, 0xff1ff624, "IRLVL5 "); | ||
127 | print_pic(key, 0xff1ff628, "IRLVL6 "); | ||
128 | print_pic(key, 0xff1ff62c, "IRLVL7 "); | ||
129 | |||
130 | print_pic(key, 0xff1ff640, "IRMSK "); | ||
131 | print_pic(key, 0xff1ff660, "IREDC "); | ||
132 | print_pic(key, 0xff1ff680, "IRPND "); | ||
133 | print_pic(key, 0xff1ff6a0, "IRCS "); | ||
134 | |||
135 | print_pic(key, 0xff1ff514, "IRFLAG1 "); /* don't read IRLAG0 -- it hangs system */ | ||
136 | |||
137 | print_pic(key, 0xff1ff518, "IRPOL "); | ||
138 | print_pic(key, 0xff1ff51c, "IRRCNT "); | ||
139 | print_pic(key, 0xff1ff520, "IRMASKINT"); | ||
140 | print_pic(key, 0xff1ff524, "IRMASKEXT"); | ||
141 | |||
142 | return; | ||
143 | } | ||
144 | |||
145 | |||
146 | void print_addr(char *hdr, char *key, unsigned long addr) | ||
147 | { | ||
148 | printk(KERN_INFO "%s %s:0x%08lx=0x%08x\n", hdr, key, addr, | ||
149 | __raw_readl((void __iomem *)addr)); | ||
150 | return; | ||
151 | } | ||
152 | |||
153 | |||
154 | void dump_180(char *key) | ||
155 | { | ||
156 | u32 i; | ||
157 | |||
158 | for (i = 0x80000180; i < 0x80000180 + 0x80; i += 4) { | ||
159 | print_addr("180", key, i); | ||
160 | } | ||
161 | return; | ||
162 | } | ||
163 | |||
164 | |||
165 | void dump_eh0(char *key) | ||
166 | { | ||
167 | int i; | ||
168 | extern unsigned long exception_handlers[]; | ||
169 | |||
170 | for (i = (int) exception_handlers; | ||
171 | i < (int) (exception_handlers + 20); i += 4) { | ||
172 | print_addr("eh0", key, i); | ||
173 | } | ||
174 | |||
175 | return; | ||
176 | } | ||
177 | |||
178 | void pk0(void) | ||
179 | { | ||
180 | volatile u32 val; | ||
181 | |||
182 | __asm__ __volatile__("ori %0, $26, 0":"=r"(val) | ||
183 | ); | ||
184 | printk("k0=[0x%08x]\n", val); | ||
185 | } | ||
186 | #endif | ||
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c index 0299595ce1c4..c29a5283237b 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c | |||
@@ -45,27 +45,18 @@ | |||
45 | #include <linux/init.h> | 45 | #include <linux/init.h> |
46 | #include <linux/kernel.h> | 46 | #include <linux/kernel.h> |
47 | #include <linux/types.h> | 47 | #include <linux/types.h> |
48 | #include <linux/mm.h> | ||
49 | #include <linux/swap.h> | ||
50 | #include <linux/ioport.h> | 48 | #include <linux/ioport.h> |
51 | #include <linux/sched.h> | ||
52 | #include <linux/interrupt.h> | 49 | #include <linux/interrupt.h> |
53 | #include <linux/pci.h> | 50 | #include <linux/pci.h> |
54 | #include <linux/timex.h> | ||
55 | #include <linux/pm.h> | 51 | #include <linux/pm.h> |
56 | #include <linux/platform_device.h> | 52 | #include <linux/platform_device.h> |
57 | 53 | ||
58 | #include <asm/bootinfo.h> | 54 | #include <asm/bootinfo.h> |
59 | #include <asm/page.h> | ||
60 | #include <asm/io.h> | 55 | #include <asm/io.h> |
61 | #include <asm/irq.h> | ||
62 | #include <asm/irq_regs.h> | ||
63 | #include <asm/processor.h> | 56 | #include <asm/processor.h> |
64 | #include <asm/reboot.h> | 57 | #include <asm/reboot.h> |
65 | #include <asm/time.h> | 58 | #include <asm/time.h> |
66 | #include <asm/txx9tmr.h> | 59 | #include <asm/txx9tmr.h> |
67 | #include <linux/bootmem.h> | ||
68 | #include <linux/blkdev.h> | ||
69 | #ifdef CONFIG_TOSHIBA_FPCIB0 | 60 | #ifdef CONFIG_TOSHIBA_FPCIB0 |
70 | #include <asm/tx4927/smsc_fdc37m81x.h> | 61 | #include <asm/tx4927/smsc_fdc37m81x.h> |
71 | #endif | 62 | #endif |
@@ -73,42 +64,26 @@ | |||
73 | #ifdef CONFIG_PCI | 64 | #ifdef CONFIG_PCI |
74 | #include <asm/tx4927/tx4927_pci.h> | 65 | #include <asm/tx4927/tx4927_pci.h> |
75 | #endif | 66 | #endif |
76 | #ifdef CONFIG_BLK_DEV_IDEPCI | ||
77 | #include <linux/hdreg.h> | ||
78 | #include <linux/ide.h> | ||
79 | #endif | ||
80 | #ifdef CONFIG_SERIAL_TXX9 | 67 | #ifdef CONFIG_SERIAL_TXX9 |
81 | #include <linux/tty.h> | ||
82 | #include <linux/serial.h> | ||
83 | #include <linux/serial_core.h> | 68 | #include <linux/serial_core.h> |
84 | #endif | 69 | #endif |
85 | 70 | ||
86 | #undef TOSHIBA_RBTX4927_SETUP_DEBUG | 71 | #undef TOSHIBA_RBTX4927_SETUP_DEBUG |
87 | 72 | ||
88 | #ifdef TOSHIBA_RBTX4927_SETUP_DEBUG | 73 | #ifdef TOSHIBA_RBTX4927_SETUP_DEBUG |
89 | #define TOSHIBA_RBTX4927_SETUP_NONE 0x00000000 | ||
90 | |||
91 | #define TOSHIBA_RBTX4927_SETUP_INFO ( 1 << 0 ) | ||
92 | #define TOSHIBA_RBTX4927_SETUP_WARN ( 1 << 1 ) | ||
93 | #define TOSHIBA_RBTX4927_SETUP_EROR ( 1 << 2 ) | ||
94 | |||
95 | #define TOSHIBA_RBTX4927_SETUP_EFWFU ( 1 << 3 ) | ||
96 | #define TOSHIBA_RBTX4927_SETUP_SETUP ( 1 << 4 ) | 74 | #define TOSHIBA_RBTX4927_SETUP_SETUP ( 1 << 4 ) |
97 | #define TOSHIBA_RBTX4927_SETUP_PCIBIOS ( 1 << 7 ) | 75 | #define TOSHIBA_RBTX4927_SETUP_PCIBIOS ( 1 << 7 ) |
98 | #define TOSHIBA_RBTX4927_SETUP_PCI1 ( 1 << 8 ) | 76 | #define TOSHIBA_RBTX4927_SETUP_PCI1 ( 1 << 8 ) |
99 | #define TOSHIBA_RBTX4927_SETUP_PCI2 ( 1 << 9 ) | 77 | #define TOSHIBA_RBTX4927_SETUP_PCI2 ( 1 << 9 ) |
100 | #define TOSHIBA_RBTX4927_SETUP_PCI66 ( 1 << 10 ) | ||
101 | 78 | ||
102 | #define TOSHIBA_RBTX4927_SETUP_ALL 0xffffffff | 79 | #define TOSHIBA_RBTX4927_SETUP_ALL 0xffffffff |
103 | #endif | 80 | #endif |
104 | 81 | ||
105 | #ifdef TOSHIBA_RBTX4927_SETUP_DEBUG | 82 | #ifdef TOSHIBA_RBTX4927_SETUP_DEBUG |
106 | static const u32 toshiba_rbtx4927_setup_debug_flag = | 83 | static const u32 toshiba_rbtx4927_setup_debug_flag = |
107 | (TOSHIBA_RBTX4927_SETUP_NONE | TOSHIBA_RBTX4927_SETUP_INFO | | 84 | (TOSHIBA_RBTX4927_SETUP_SETUP | |
108 | TOSHIBA_RBTX4927_SETUP_WARN | TOSHIBA_RBTX4927_SETUP_EROR | | ||
109 | TOSHIBA_RBTX4927_SETUP_EFWFU | TOSHIBA_RBTX4927_SETUP_SETUP | | ||
110 | | TOSHIBA_RBTX4927_SETUP_PCIBIOS | TOSHIBA_RBTX4927_SETUP_PCI1 | | 85 | | TOSHIBA_RBTX4927_SETUP_PCIBIOS | TOSHIBA_RBTX4927_SETUP_PCI1 | |
111 | TOSHIBA_RBTX4927_SETUP_PCI2 | TOSHIBA_RBTX4927_SETUP_PCI66); | 86 | TOSHIBA_RBTX4927_SETUP_PCI2); |
112 | #endif | 87 | #endif |
113 | 88 | ||
114 | #ifdef TOSHIBA_RBTX4927_SETUP_DEBUG | 89 | #ifdef TOSHIBA_RBTX4927_SETUP_DEBUG |
@@ -718,7 +693,7 @@ void toshiba_rbtx4927_power_off(void) | |||
718 | /* no return */ | 693 | /* no return */ |
719 | } | 694 | } |
720 | 695 | ||
721 | void __init toshiba_rbtx4927_setup(void) | 696 | void __init plat_mem_setup(void) |
722 | { | 697 | { |
723 | int i; | 698 | int i; |
724 | u32 cp0_config; | 699 | u32 cp0_config; |
@@ -741,13 +716,6 @@ void __init toshiba_rbtx4927_setup(void) | |||
741 | cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC); | 716 | cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC); |
742 | write_c0_config(cp0_config); | 717 | write_c0_config(cp0_config); |
743 | 718 | ||
744 | #ifdef TOSHIBA_RBTX4927_SETUP_DEBUG | ||
745 | { | ||
746 | extern void dump_cp0(char *); | ||
747 | dump_cp0("toshiba_rbtx4927_early_fw_fixup"); | ||
748 | } | ||
749 | #endif | ||
750 | |||
751 | set_io_port_base(KSEG1 + TBTX4927_ISA_IO_OFFSET); | 719 | set_io_port_base(KSEG1 + TBTX4927_ISA_IO_OFFSET); |
752 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP, | 720 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP, |
753 | ":mips_io_port_base=0x%08lx\n", | 721 | ":mips_io_port_base=0x%08lx\n", |
@@ -936,8 +904,7 @@ void __init toshiba_rbtx4927_setup(void) | |||
936 | "+\n"); | 904 | "+\n"); |
937 | } | 905 | } |
938 | 906 | ||
939 | void __init | 907 | void __init plat_time_init(void) |
940 | toshiba_rbtx4927_time_init(void) | ||
941 | { | 908 | { |
942 | mips_hpt_frequency = tx4927_cpu_clock / 2; | 909 | mips_hpt_frequency = tx4927_cpu_clock / 2; |
943 | if (tx4927_ccfgptr->ccfg & TX4927_CCFG_TINTDIS) | 910 | if (tx4927_ccfgptr->ccfg & TX4927_CCFG_TINTDIS) |