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authorFranck Bui-Huu <fbuihuu@gmail.com>2006-12-01 12:22:27 -0500
committerRalf Baechle <ralf@linux-mips.org>2006-12-06 15:16:08 -0500
commite77c232cfc6e1250b2916a7c69225d6634d05a49 (patch)
treea5a193c3d6d7f8c8a9eb35d970dd47fa867e5e24 /arch/mips/tx4927
parent1ccd1c1c35a6cb21da32479931d4fa6d47320095 (diff)
[MIPS] Compile __do_IRQ() when really needed
__do_IRQ() is needed only by irq handlers that can't use default handlers defined in kernel/irq/chip.c. For others platforms there's no need to compile this function since it won't be used. For those platforms this patch defines GENERIC_HARDIRQS_NO__DO_IRQ symbol which is used exactly for this purpose. Futhermore for platforms which do not use __do_IRQ(), end() method which is part of the 'irq_chip' structure is not used. This patch simply removes this method in this case. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/tx4927')
-rw-r--r--arch/mips/tx4927/common/tx4927_irq.c26
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c21
2 files changed, 0 insertions, 47 deletions
diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c
index 21873de49aa8..ed4a19adf361 100644
--- a/arch/mips/tx4927/common/tx4927_irq.c
+++ b/arch/mips/tx4927/common/tx4927_irq.c
@@ -66,12 +66,10 @@
66#define TX4927_IRQ_CP0_INIT ( 1 << 10 ) 66#define TX4927_IRQ_CP0_INIT ( 1 << 10 )
67#define TX4927_IRQ_CP0_ENABLE ( 1 << 13 ) 67#define TX4927_IRQ_CP0_ENABLE ( 1 << 13 )
68#define TX4927_IRQ_CP0_DISABLE ( 1 << 14 ) 68#define TX4927_IRQ_CP0_DISABLE ( 1 << 14 )
69#define TX4927_IRQ_CP0_ENDIRQ ( 1 << 16 )
70 69
71#define TX4927_IRQ_PIC_INIT ( 1 << 20 ) 70#define TX4927_IRQ_PIC_INIT ( 1 << 20 )
72#define TX4927_IRQ_PIC_ENABLE ( 1 << 23 ) 71#define TX4927_IRQ_PIC_ENABLE ( 1 << 23 )
73#define TX4927_IRQ_PIC_DISABLE ( 1 << 24 ) 72#define TX4927_IRQ_PIC_DISABLE ( 1 << 24 )
74#define TX4927_IRQ_PIC_ENDIRQ ( 1 << 26 )
75 73
76#define TX4927_IRQ_ALL 0xffffffff 74#define TX4927_IRQ_ALL 0xffffffff
77#endif 75#endif
@@ -82,12 +80,10 @@ static const u32 tx4927_irq_debug_flag = (TX4927_IRQ_NONE
82 | TX4927_IRQ_WARN | TX4927_IRQ_EROR 80 | TX4927_IRQ_WARN | TX4927_IRQ_EROR
83// | TX4927_IRQ_CP0_INIT 81// | TX4927_IRQ_CP0_INIT
84// | TX4927_IRQ_CP0_ENABLE 82// | TX4927_IRQ_CP0_ENABLE
85// | TX4927_IRQ_CP0_DISABLE
86// | TX4927_IRQ_CP0_ENDIRQ 83// | TX4927_IRQ_CP0_ENDIRQ
87// | TX4927_IRQ_PIC_INIT 84// | TX4927_IRQ_PIC_INIT
88// | TX4927_IRQ_PIC_ENABLE 85// | TX4927_IRQ_PIC_ENABLE
89// | TX4927_IRQ_PIC_DISABLE 86// | TX4927_IRQ_PIC_DISABLE
90// | TX4927_IRQ_PIC_ENDIRQ
91// | TX4927_IRQ_INIT 87// | TX4927_IRQ_INIT
92// | TX4927_IRQ_NEST1 88// | TX4927_IRQ_NEST1
93// | TX4927_IRQ_NEST2 89// | TX4927_IRQ_NEST2
@@ -114,11 +110,9 @@ static const u32 tx4927_irq_debug_flag = (TX4927_IRQ_NONE
114 110
115static void tx4927_irq_cp0_enable(unsigned int irq); 111static void tx4927_irq_cp0_enable(unsigned int irq);
116static void tx4927_irq_cp0_disable(unsigned int irq); 112static void tx4927_irq_cp0_disable(unsigned int irq);
117static void tx4927_irq_cp0_end(unsigned int irq);
118 113
119static void tx4927_irq_pic_enable(unsigned int irq); 114static void tx4927_irq_pic_enable(unsigned int irq);
120static void tx4927_irq_pic_disable(unsigned int irq); 115static void tx4927_irq_pic_disable(unsigned int irq);
121static void tx4927_irq_pic_end(unsigned int irq);
122 116
123/* 117/*
124 * Kernel structs for all pic's 118 * Kernel structs for all pic's
@@ -131,7 +125,6 @@ static struct irq_chip tx4927_irq_cp0_type = {
131 .mask = tx4927_irq_cp0_disable, 125 .mask = tx4927_irq_cp0_disable,
132 .mask_ack = tx4927_irq_cp0_disable, 126 .mask_ack = tx4927_irq_cp0_disable,
133 .unmask = tx4927_irq_cp0_enable, 127 .unmask = tx4927_irq_cp0_enable,
134 .end = tx4927_irq_cp0_end,
135}; 128};
136 129
137#define TX4927_PIC_NAME "TX4927-PIC" 130#define TX4927_PIC_NAME "TX4927-PIC"
@@ -141,7 +134,6 @@ static struct irq_chip tx4927_irq_pic_type = {
141 .mask = tx4927_irq_pic_disable, 134 .mask = tx4927_irq_pic_disable,
142 .mask_ack = tx4927_irq_pic_disable, 135 .mask_ack = tx4927_irq_pic_disable,
143 .unmask = tx4927_irq_pic_enable, 136 .unmask = tx4927_irq_pic_enable,
144 .end = tx4927_irq_pic_end,
145}; 137};
146 138
147#define TX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL } 139#define TX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL }
@@ -214,15 +206,6 @@ static void tx4927_irq_cp0_disable(unsigned int irq)
214 tx4927_irq_cp0_modify(CCP0_STATUS, tx4927_irq_cp0_mask(irq), 0); 206 tx4927_irq_cp0_modify(CCP0_STATUS, tx4927_irq_cp0_mask(irq), 0);
215} 207}
216 208
217static void tx4927_irq_cp0_end(unsigned int irq)
218{
219 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENDIRQ, "irq=%d \n", irq);
220
221 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
222 tx4927_irq_cp0_enable(irq);
223 }
224}
225
226/* 209/*
227 * Functions for pic 210 * Functions for pic
228 */ 211 */
@@ -376,15 +359,6 @@ static void tx4927_irq_pic_disable(unsigned int irq)
376 tx4927_irq_pic_mask(irq), 0); 359 tx4927_irq_pic_mask(irq), 0);
377} 360}
378 361
379static void tx4927_irq_pic_end(unsigned int irq)
380{
381 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENDIRQ, "irq=%d\n", irq);
382
383 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
384 tx4927_irq_pic_enable(irq);
385 }
386}
387
388/* 362/*
389 * Main init functions 363 * Main init functions
390 */ 364 */
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
index 34cdb2a240e9..5a5ea6c0b9f6 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
@@ -153,7 +153,6 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB
153#define TOSHIBA_RBTX4927_IRQ_IOC_INIT ( 1 << 10 ) 153#define TOSHIBA_RBTX4927_IRQ_IOC_INIT ( 1 << 10 )
154#define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE ( 1 << 13 ) 154#define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE ( 1 << 13 )
155#define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE ( 1 << 14 ) 155#define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE ( 1 << 14 )
156#define TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ ( 1 << 16 )
157 156
158#define TOSHIBA_RBTX4927_IRQ_ISA_INIT ( 1 << 20 ) 157#define TOSHIBA_RBTX4927_IRQ_ISA_INIT ( 1 << 20 )
159#define TOSHIBA_RBTX4927_IRQ_ISA_ENABLE ( 1 << 23 ) 158#define TOSHIBA_RBTX4927_IRQ_ISA_ENABLE ( 1 << 23 )
@@ -172,7 +171,6 @@ static const u32 toshiba_rbtx4927_irq_debug_flag =
172// | TOSHIBA_RBTX4927_IRQ_IOC_INIT 171// | TOSHIBA_RBTX4927_IRQ_IOC_INIT
173// | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE 172// | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE
174// | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE 173// | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE
175// | TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ
176// | TOSHIBA_RBTX4927_IRQ_ISA_INIT 174// | TOSHIBA_RBTX4927_IRQ_ISA_INIT
177// | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE 175// | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE
178// | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE 176// | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE
@@ -223,7 +221,6 @@ extern void mask_and_ack_8259A(unsigned int irq);
223 221
224static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq); 222static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
225static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq); 223static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
226static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq);
227 224
228#ifdef CONFIG_TOSHIBA_FPCIB0 225#ifdef CONFIG_TOSHIBA_FPCIB0
229static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq); 226static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq);
@@ -239,7 +236,6 @@ static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
239 .mask = toshiba_rbtx4927_irq_ioc_disable, 236 .mask = toshiba_rbtx4927_irq_ioc_disable,
240 .mask_ack = toshiba_rbtx4927_irq_ioc_disable, 237 .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
241 .unmask = toshiba_rbtx4927_irq_ioc_enable, 238 .unmask = toshiba_rbtx4927_irq_ioc_enable,
242 .end = toshiba_rbtx4927_irq_ioc_end,
243}; 239};
244#define TOSHIBA_RBTX4927_IOC_INTR_ENAB 0xbc002000 240#define TOSHIBA_RBTX4927_IOC_INTR_ENAB 0xbc002000
245#define TOSHIBA_RBTX4927_IOC_INTR_STAT 0xbc002006 241#define TOSHIBA_RBTX4927_IOC_INTR_STAT 0xbc002006
@@ -388,23 +384,6 @@ static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
388 TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v); 384 TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v);
389} 385}
390 386
391static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq)
392{
393 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ,
394 "irq=%d\n", irq);
395
396 if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
397 || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
398 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
399 "bad irq=%d\n", irq);
400 panic("\n");
401 }
402
403 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
404 toshiba_rbtx4927_irq_ioc_enable(irq);
405 }
406}
407
408 387
409/**********************************************************************************/ 388/**********************************************************************************/
410/* Functions for isa */ 389/* Functions for isa */