diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2007-08-02 10:36:02 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-08-26 21:16:53 -0400 |
commit | c87abd75b35e8f991ff8ff1510d6fb62612c61fa (patch) | |
tree | de68c4446c35337c47c17253d769bfeee92f80b3 /arch/mips/tx4927/toshiba_rbtx4927 | |
parent | 8420fd00e88ef4f6082866aa151bc753b006b3b6 (diff) |
[MIPS] Cleanup TX39/TX49 irq code
Cleanup jmr3927, tx4927 and tx4938 irq codes, using common IRQ_CPU,
I8259 and IRQ_TXX9 irq routines.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/tx4927/toshiba_rbtx4927')
-rw-r--r-- | arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c | 171 | ||||
-rw-r--r-- | arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c | 11 |
2 files changed, 11 insertions, 171 deletions
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c index e265fcd31b60..9607ad5e734a 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c | |||
@@ -133,6 +133,7 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB | |||
133 | #include <linux/bootmem.h> | 133 | #include <linux/bootmem.h> |
134 | #include <linux/blkdev.h> | 134 | #include <linux/blkdev.h> |
135 | #ifdef CONFIG_TOSHIBA_FPCIB0 | 135 | #ifdef CONFIG_TOSHIBA_FPCIB0 |
136 | #include <asm/i8259.h> | ||
136 | #include <asm/tx4927/smsc_fdc37m81x.h> | 137 | #include <asm/tx4927/smsc_fdc37m81x.h> |
137 | #endif | 138 | #endif |
138 | #include <asm/tx4927/toshiba_rbtx4927.h> | 139 | #include <asm/tx4927/toshiba_rbtx4927.h> |
@@ -151,11 +152,6 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB | |||
151 | #define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE ( 1 << 13 ) | 152 | #define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE ( 1 << 13 ) |
152 | #define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE ( 1 << 14 ) | 153 | #define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE ( 1 << 14 ) |
153 | 154 | ||
154 | #define TOSHIBA_RBTX4927_IRQ_ISA_INIT ( 1 << 20 ) | ||
155 | #define TOSHIBA_RBTX4927_IRQ_ISA_ENABLE ( 1 << 23 ) | ||
156 | #define TOSHIBA_RBTX4927_IRQ_ISA_DISABLE ( 1 << 24 ) | ||
157 | #define TOSHIBA_RBTX4927_IRQ_ISA_MASK ( 1 << 25 ) | ||
158 | |||
159 | #define TOSHIBA_RBTX4927_SETUP_ALL 0xffffffff | 155 | #define TOSHIBA_RBTX4927_SETUP_ALL 0xffffffff |
160 | #endif | 156 | #endif |
161 | 157 | ||
@@ -167,10 +163,6 @@ static const u32 toshiba_rbtx4927_irq_debug_flag = | |||
167 | // | TOSHIBA_RBTX4927_IRQ_IOC_INIT | 163 | // | TOSHIBA_RBTX4927_IRQ_IOC_INIT |
168 | // | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE | 164 | // | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE |
169 | // | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE | 165 | // | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE |
170 | // | TOSHIBA_RBTX4927_IRQ_ISA_INIT | ||
171 | // | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE | ||
172 | // | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE | ||
173 | // | TOSHIBA_RBTX4927_IRQ_ISA_MASK | ||
174 | ); | 166 | ); |
175 | #endif | 167 | #endif |
176 | 168 | ||
@@ -196,33 +188,14 @@ static const u32 toshiba_rbtx4927_irq_debug_flag = | |||
196 | #define TOSHIBA_RBTX4927_IRQ_IOC_BEG ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG) /* 56 */ | 188 | #define TOSHIBA_RBTX4927_IRQ_IOC_BEG ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG) /* 56 */ |
197 | #define TOSHIBA_RBTX4927_IRQ_IOC_END ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_END) /* 63 */ | 189 | #define TOSHIBA_RBTX4927_IRQ_IOC_END ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_END) /* 63 */ |
198 | 190 | ||
199 | |||
200 | #define TOSHIBA_RBTX4927_IRQ_ISA_BEG MI8259_IRQ_ISA_BEG | ||
201 | #define TOSHIBA_RBTX4927_IRQ_ISA_END MI8259_IRQ_ISA_END | ||
202 | #define TOSHIBA_RBTX4927_IRQ_ISA_MID ((TOSHIBA_RBTX4927_IRQ_ISA_BEG+TOSHIBA_RBTX4927_IRQ_ISA_END+1)/2) | ||
203 | |||
204 | |||
205 | #define TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC TX4927_IRQ_NEST_EXT_ON_PIC | 191 | #define TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC TX4927_IRQ_NEST_EXT_ON_PIC |
206 | #define TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC (TOSHIBA_RBTX4927_IRQ_IOC_BEG+2) | 192 | #define TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC (TOSHIBA_RBTX4927_IRQ_IOC_BEG+2) |
207 | #define TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_ISA (TOSHIBA_RBTX4927_IRQ_ISA_BEG+2) | ||
208 | 193 | ||
209 | extern int tx4927_using_backplane; | 194 | extern int tx4927_using_backplane; |
210 | 195 | ||
211 | #ifdef CONFIG_TOSHIBA_FPCIB0 | ||
212 | extern void enable_8259A_irq(unsigned int irq); | ||
213 | extern void disable_8259A_irq(unsigned int irq); | ||
214 | extern void mask_and_ack_8259A(unsigned int irq); | ||
215 | #endif | ||
216 | |||
217 | static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq); | 196 | static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq); |
218 | static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq); | 197 | static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq); |
219 | 198 | ||
220 | #ifdef CONFIG_TOSHIBA_FPCIB0 | ||
221 | static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq); | ||
222 | static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq); | ||
223 | static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq); | ||
224 | #endif | ||
225 | |||
226 | #define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC" | 199 | #define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC" |
227 | static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { | 200 | static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { |
228 | .name = TOSHIBA_RBTX4927_IOC_NAME, | 201 | .name = TOSHIBA_RBTX4927_IOC_NAME, |
@@ -235,18 +208,6 @@ static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { | |||
235 | #define TOSHIBA_RBTX4927_IOC_INTR_STAT 0xbc002006 | 208 | #define TOSHIBA_RBTX4927_IOC_INTR_STAT 0xbc002006 |
236 | 209 | ||
237 | 210 | ||
238 | #ifdef CONFIG_TOSHIBA_FPCIB0 | ||
239 | #define TOSHIBA_RBTX4927_ISA_NAME "RBTX4927-ISA" | ||
240 | static struct irq_chip toshiba_rbtx4927_irq_isa_type = { | ||
241 | .name = TOSHIBA_RBTX4927_ISA_NAME, | ||
242 | .ack = toshiba_rbtx4927_irq_isa_mask_and_ack, | ||
243 | .mask = toshiba_rbtx4927_irq_isa_disable, | ||
244 | .mask_ack = toshiba_rbtx4927_irq_isa_mask_and_ack, | ||
245 | .unmask = toshiba_rbtx4927_irq_isa_enable, | ||
246 | }; | ||
247 | #endif | ||
248 | |||
249 | |||
250 | u32 bit2num(u32 num) | 211 | u32 bit2num(u32 num) |
251 | { | 212 | { |
252 | u32 i; | 213 | u32 i; |
@@ -271,31 +232,10 @@ int toshiba_rbtx4927_irq_nested(int sw_irq) | |||
271 | } | 232 | } |
272 | } | 233 | } |
273 | #ifdef CONFIG_TOSHIBA_FPCIB0 | 234 | #ifdef CONFIG_TOSHIBA_FPCIB0 |
274 | { | 235 | if (tx4927_using_backplane) { |
275 | if (tx4927_using_backplane) { | 236 | int irq = i8259_irq(); |
276 | u32 level4; | 237 | if (irq >= 0) |
277 | u32 level5; | 238 | sw_irq = irq; |
278 | outb(0x0A, 0x20); | ||
279 | level4 = inb(0x20) & 0xff; | ||
280 | if (level4) { | ||
281 | sw_irq = | ||
282 | TOSHIBA_RBTX4927_IRQ_ISA_BEG + | ||
283 | bit2num(level4); | ||
284 | if (sw_irq != | ||
285 | TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_ISA) { | ||
286 | goto RETURN; | ||
287 | } | ||
288 | } | ||
289 | |||
290 | outb(0x0A, 0xA0); | ||
291 | level5 = inb(0xA0) & 0xff; | ||
292 | if (level5) { | ||
293 | sw_irq = | ||
294 | TOSHIBA_RBTX4927_IRQ_ISA_MID + | ||
295 | bit2num(level5); | ||
296 | goto RETURN; | ||
297 | } | ||
298 | } | ||
299 | } | 239 | } |
300 | #endif | 240 | #endif |
301 | 241 | ||
@@ -307,12 +247,6 @@ int toshiba_rbtx4927_irq_nested(int sw_irq) | |||
307 | #define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, IRQF_SHARED, CPU_MASK_NONE, s, NULL, NULL } | 247 | #define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, IRQF_SHARED, CPU_MASK_NONE, s, NULL, NULL } |
308 | static struct irqaction toshiba_rbtx4927_irq_ioc_action = | 248 | static struct irqaction toshiba_rbtx4927_irq_ioc_action = |
309 | TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_IOC_NAME); | 249 | TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_IOC_NAME); |
310 | #ifdef CONFIG_TOSHIBA_FPCIB0 | ||
311 | static struct irqaction toshiba_rbtx4927_irq_isa_master = | ||
312 | TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_ISA_NAME "/M"); | ||
313 | static struct irqaction toshiba_rbtx4927_irq_isa_slave = | ||
314 | TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_ISA_NAME "/S"); | ||
315 | #endif | ||
316 | 250 | ||
317 | 251 | ||
318 | /**********************************************************************************/ | 252 | /**********************************************************************************/ |
@@ -378,92 +312,6 @@ static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq) | |||
378 | } | 312 | } |
379 | 313 | ||
380 | 314 | ||
381 | /**********************************************************************************/ | ||
382 | /* Functions for isa */ | ||
383 | /**********************************************************************************/ | ||
384 | |||
385 | |||
386 | #ifdef CONFIG_TOSHIBA_FPCIB0 | ||
387 | static void __init toshiba_rbtx4927_irq_isa_init(void) | ||
388 | { | ||
389 | int i; | ||
390 | |||
391 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_INIT, | ||
392 | "beg=%d end=%d\n", | ||
393 | TOSHIBA_RBTX4927_IRQ_ISA_BEG, | ||
394 | TOSHIBA_RBTX4927_IRQ_ISA_END); | ||
395 | |||
396 | for (i = TOSHIBA_RBTX4927_IRQ_ISA_BEG; | ||
397 | i <= TOSHIBA_RBTX4927_IRQ_ISA_END; i++) | ||
398 | set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_isa_type, | ||
399 | handle_level_irq); | ||
400 | |||
401 | setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC, | ||
402 | &toshiba_rbtx4927_irq_isa_master); | ||
403 | setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_ISA, | ||
404 | &toshiba_rbtx4927_irq_isa_slave); | ||
405 | |||
406 | /* make sure we are looking at IRR (not ISR) */ | ||
407 | outb(0x0A, 0x20); | ||
408 | outb(0x0A, 0xA0); | ||
409 | } | ||
410 | #endif | ||
411 | |||
412 | |||
413 | #ifdef CONFIG_TOSHIBA_FPCIB0 | ||
414 | static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq) | ||
415 | { | ||
416 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_ENABLE, | ||
417 | "irq=%d\n", irq); | ||
418 | |||
419 | if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG | ||
420 | || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) { | ||
421 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR, | ||
422 | "bad irq=%d\n", irq); | ||
423 | panic("\n"); | ||
424 | } | ||
425 | |||
426 | enable_8259A_irq(irq); | ||
427 | } | ||
428 | #endif | ||
429 | |||
430 | |||
431 | #ifdef CONFIG_TOSHIBA_FPCIB0 | ||
432 | static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq) | ||
433 | { | ||
434 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_DISABLE, | ||
435 | "irq=%d\n", irq); | ||
436 | |||
437 | if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG | ||
438 | || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) { | ||
439 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR, | ||
440 | "bad irq=%d\n", irq); | ||
441 | panic("\n"); | ||
442 | } | ||
443 | |||
444 | disable_8259A_irq(irq); | ||
445 | } | ||
446 | #endif | ||
447 | |||
448 | |||
449 | #ifdef CONFIG_TOSHIBA_FPCIB0 | ||
450 | static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq) | ||
451 | { | ||
452 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_MASK, | ||
453 | "irq=%d\n", irq); | ||
454 | |||
455 | if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG | ||
456 | || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) { | ||
457 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR, | ||
458 | "bad irq=%d\n", irq); | ||
459 | panic("\n"); | ||
460 | } | ||
461 | |||
462 | mask_and_ack_8259A(irq); | ||
463 | } | ||
464 | #endif | ||
465 | |||
466 | |||
467 | void __init arch_init_irq(void) | 315 | void __init arch_init_irq(void) |
468 | { | 316 | { |
469 | extern void tx4927_irq_init(void); | 317 | extern void tx4927_irq_init(void); |
@@ -471,12 +319,11 @@ void __init arch_init_irq(void) | |||
471 | tx4927_irq_init(); | 319 | tx4927_irq_init(); |
472 | toshiba_rbtx4927_irq_ioc_init(); | 320 | toshiba_rbtx4927_irq_ioc_init(); |
473 | #ifdef CONFIG_TOSHIBA_FPCIB0 | 321 | #ifdef CONFIG_TOSHIBA_FPCIB0 |
474 | { | 322 | if (tx4927_using_backplane) |
475 | if (tx4927_using_backplane) { | 323 | init_i8259_irqs(); |
476 | toshiba_rbtx4927_irq_isa_init(); | ||
477 | } | ||
478 | } | ||
479 | #endif | 324 | #endif |
325 | /* Onboard 10M Ether: High Active */ | ||
326 | set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH); | ||
480 | 327 | ||
481 | wbflush(); | 328 | wbflush(); |
482 | } | 329 | } |
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c index ea5a70b252a0..3e84237abe63 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c | |||
@@ -151,7 +151,6 @@ unsigned long mips_memory_upper; | |||
151 | static int tx4927_ccfg_toeon = 1; | 151 | static int tx4927_ccfg_toeon = 1; |
152 | static int tx4927_pcic_trdyto = 0; /* default: disabled */ | 152 | static int tx4927_pcic_trdyto = 0; /* default: disabled */ |
153 | unsigned long tx4927_ce_base[8]; | 153 | unsigned long tx4927_ce_base[8]; |
154 | void tx4927_pci_setup(void); | ||
155 | void tx4927_reset_pci_pcic(void); | 154 | void tx4927_reset_pci_pcic(void); |
156 | int tx4927_pci66 = 0; /* 0:auto */ | 155 | int tx4927_pci66 = 0; /* 0:auto */ |
157 | #endif | 156 | #endif |
@@ -442,7 +441,7 @@ arch_initcall(tx4927_pcibios_init); | |||
442 | extern struct resource pci_io_resource; | 441 | extern struct resource pci_io_resource; |
443 | extern struct resource pci_mem_resource; | 442 | extern struct resource pci_mem_resource; |
444 | 443 | ||
445 | void tx4927_pci_setup(void) | 444 | void __init tx4927_pci_setup(void) |
446 | { | 445 | { |
447 | static int called = 0; | 446 | static int called = 0; |
448 | extern unsigned int tx4927_get_mem_size(void); | 447 | extern unsigned int tx4927_get_mem_size(void); |
@@ -748,12 +747,6 @@ void __init toshiba_rbtx4927_setup(void) | |||
748 | } | 747 | } |
749 | #endif | 748 | #endif |
750 | 749 | ||
751 | /* setup irq stuff */ | ||
752 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP, | ||
753 | ":Setting up tx4927 pic.\n"); | ||
754 | TX4927_WR(0xff1ff604, 0x00000400); /* irq trigger */ | ||
755 | TX4927_WR(0xff1ff608, 0x00000000); /* irq trigger */ | ||
756 | |||
757 | /* setup serial stuff */ | 750 | /* setup serial stuff */ |
758 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP, | 751 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP, |
759 | ":Setting up tx4927 sio.\n"); | 752 | ":Setting up tx4927 sio.\n"); |
@@ -915,7 +908,7 @@ void __init toshiba_rbtx4927_setup(void) | |||
915 | req.iotype = UPIO_MEM; | 908 | req.iotype = UPIO_MEM; |
916 | req.membase = (char *)(0xff1ff300 + i * 0x100); | 909 | req.membase = (char *)(0xff1ff300 + i * 0x100); |
917 | req.mapbase = 0xff1ff300 + i * 0x100; | 910 | req.mapbase = 0xff1ff300 + i * 0x100; |
918 | req.irq = 32 + i; | 911 | req.irq = TX4927_IRQ_PIC_BEG + 8 + i; |
919 | req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; | 912 | req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; |
920 | req.uartclk = 50000000; | 913 | req.uartclk = 50000000; |
921 | early_serial_txx9_setup(&req); | 914 | early_serial_txx9_setup(&req); |