aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/tx4927/common
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/mips/tx4927/common
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/mips/tx4927/common')
-rw-r--r--arch/mips/tx4927/common/Makefile12
-rw-r--r--arch/mips/tx4927/common/tx4927_dbgio.c47
-rw-r--r--arch/mips/tx4927/common/tx4927_irq.c584
-rw-r--r--arch/mips/tx4927/common/tx4927_irq_handler.S103
-rw-r--r--arch/mips/tx4927/common/tx4927_prom.c146
-rw-r--r--arch/mips/tx4927/common/tx4927_setup.c237
6 files changed, 1129 insertions, 0 deletions
diff --git a/arch/mips/tx4927/common/Makefile b/arch/mips/tx4927/common/Makefile
new file mode 100644
index 000000000000..8fa126b296e1
--- /dev/null
+++ b/arch/mips/tx4927/common/Makefile
@@ -0,0 +1,12 @@
1#
2# Makefile for common code for Toshiba TX4927 based systems
3#
4# Note! Dependencies are done automagically by 'make dep', which also
5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file).
7#
8
9obj-y += tx4927_prom.o tx4927_setup.o tx4927_irq.o tx4927_irq_handler.o
10
11obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o
12obj-$(CONFIG_KGDB) += tx4927_dbgio.o
diff --git a/arch/mips/tx4927/common/tx4927_dbgio.c b/arch/mips/tx4927/common/tx4927_dbgio.c
new file mode 100644
index 000000000000..09bdf2baa835
--- /dev/null
+++ b/arch/mips/tx4927/common/tx4927_dbgio.c
@@ -0,0 +1,47 @@
1/*
2 * linux/arch/mips/tx4927/common/tx4927_dbgio.c
3 *
4 * kgdb interface for gdb
5 *
6 * Author: MontaVista Software, Inc.
7 * source@mvista.com
8 *
9 * Copyright 2001-2002 MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
24 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
25 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 * You should have received a copy of the GNU General Public License along
28 * with this program; if not, write to the Free Software Foundation, Inc.,
29 * 675 Mass Ave, Cambridge, MA 02139, USA.
30 */
31
32#include <asm/mipsregs.h>
33#include <asm/system.h>
34#include <asm/tx4927/tx4927_mips.h>
35
36u8 getDebugChar(void)
37{
38 extern u8 txx9_sio_kdbg_rd(void);
39 return (txx9_sio_kdbg_rd());
40}
41
42
43int putDebugChar(u8 byte)
44{
45 extern int txx9_sio_kdbg_wr( u8 ch );
46 return (txx9_sio_kdbg_wr(byte));
47}
diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c
new file mode 100644
index 000000000000..5ab2e2b76018
--- /dev/null
+++ b/arch/mips/tx4927/common/tx4927_irq.c
@@ -0,0 +1,584 @@
1/*
2 * Common tx4927 irq handler
3 *
4 * Author: MontaVista Software, Inc.
5 * source@mvista.com
6 *
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
14 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
16 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
17 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
18 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
19 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
20 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26#include <linux/config.h>
27#include <linux/errno.h>
28#include <linux/init.h>
29#include <linux/kernel_stat.h>
30#include <linux/module.h>
31#include <linux/signal.h>
32#include <linux/sched.h>
33#include <linux/types.h>
34#include <linux/interrupt.h>
35#include <linux/ioport.h>
36#include <linux/timex.h>
37#include <linux/slab.h>
38#include <linux/random.h>
39#include <linux/irq.h>
40#include <linux/bitops.h>
41#include <asm/bootinfo.h>
42#include <asm/io.h>
43#include <asm/irq.h>
44#include <asm/mipsregs.h>
45#include <asm/system.h>
46#include <asm/tx4927/tx4927.h>
47
48/*
49 * DEBUG
50 */
51
52#undef TX4927_IRQ_DEBUG
53
54#ifdef TX4927_IRQ_DEBUG
55#define TX4927_IRQ_NONE 0x00000000
56
57#define TX4927_IRQ_INFO ( 1 << 0 )
58#define TX4927_IRQ_WARN ( 1 << 1 )
59#define TX4927_IRQ_EROR ( 1 << 2 )
60
61#define TX4927_IRQ_INIT ( 1 << 5 )
62#define TX4927_IRQ_NEST1 ( 1 << 6 )
63#define TX4927_IRQ_NEST2 ( 1 << 7 )
64#define TX4927_IRQ_NEST3 ( 1 << 8 )
65#define TX4927_IRQ_NEST4 ( 1 << 9 )
66
67#define TX4927_IRQ_CP0_INIT ( 1 << 10 )
68#define TX4927_IRQ_CP0_STARTUP ( 1 << 11 )
69#define TX4927_IRQ_CP0_SHUTDOWN ( 1 << 12 )
70#define TX4927_IRQ_CP0_ENABLE ( 1 << 13 )
71#define TX4927_IRQ_CP0_DISABLE ( 1 << 14 )
72#define TX4927_IRQ_CP0_MASK ( 1 << 15 )
73#define TX4927_IRQ_CP0_ENDIRQ ( 1 << 16 )
74
75#define TX4927_IRQ_PIC_INIT ( 1 << 20 )
76#define TX4927_IRQ_PIC_STARTUP ( 1 << 21 )
77#define TX4927_IRQ_PIC_SHUTDOWN ( 1 << 22 )
78#define TX4927_IRQ_PIC_ENABLE ( 1 << 23 )
79#define TX4927_IRQ_PIC_DISABLE ( 1 << 24 )
80#define TX4927_IRQ_PIC_MASK ( 1 << 25 )
81#define TX4927_IRQ_PIC_ENDIRQ ( 1 << 26 )
82
83#define TX4927_IRQ_ALL 0xffffffff
84#endif
85
86#ifdef TX4927_IRQ_DEBUG
87static const u32 tx4927_irq_debug_flag = (TX4927_IRQ_NONE
88 | TX4927_IRQ_INFO
89 | TX4927_IRQ_WARN | TX4927_IRQ_EROR
90// | TX4927_IRQ_CP0_INIT
91// | TX4927_IRQ_CP0_STARTUP
92// | TX4927_IRQ_CP0_SHUTDOWN
93// | TX4927_IRQ_CP0_ENABLE
94// | TX4927_IRQ_CP0_DISABLE
95// | TX4927_IRQ_CP0_MASK
96// | TX4927_IRQ_CP0_ENDIRQ
97// | TX4927_IRQ_PIC_INIT
98// | TX4927_IRQ_PIC_STARTUP
99// | TX4927_IRQ_PIC_SHUTDOWN
100// | TX4927_IRQ_PIC_ENABLE
101// | TX4927_IRQ_PIC_DISABLE
102// | TX4927_IRQ_PIC_MASK
103// | TX4927_IRQ_PIC_ENDIRQ
104// | TX4927_IRQ_INIT
105// | TX4927_IRQ_NEST1
106// | TX4927_IRQ_NEST2
107// | TX4927_IRQ_NEST3
108// | TX4927_IRQ_NEST4
109 );
110#endif
111
112#ifdef TX4927_IRQ_DEBUG
113#define TX4927_IRQ_DPRINTK(flag,str...) \
114 if ( (tx4927_irq_debug_flag) & (flag) ) \
115 { \
116 char tmp[100]; \
117 sprintf( tmp, str ); \
118 printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \
119 }
120#else
121#define TX4927_IRQ_DPRINTK(flag,str...)
122#endif
123
124/*
125 * Forwad definitions for all pic's
126 */
127
128static unsigned int tx4927_irq_cp0_startup(unsigned int irq);
129static void tx4927_irq_cp0_shutdown(unsigned int irq);
130static void tx4927_irq_cp0_enable(unsigned int irq);
131static void tx4927_irq_cp0_disable(unsigned int irq);
132static void tx4927_irq_cp0_mask_and_ack(unsigned int irq);
133static void tx4927_irq_cp0_end(unsigned int irq);
134
135static unsigned int tx4927_irq_pic_startup(unsigned int irq);
136static void tx4927_irq_pic_shutdown(unsigned int irq);
137static void tx4927_irq_pic_enable(unsigned int irq);
138static void tx4927_irq_pic_disable(unsigned int irq);
139static void tx4927_irq_pic_mask_and_ack(unsigned int irq);
140static void tx4927_irq_pic_end(unsigned int irq);
141
142/*
143 * Kernel structs for all pic's
144 */
145
146static DEFINE_SPINLOCK(tx4927_cp0_lock);
147static DEFINE_SPINLOCK(tx4927_pic_lock);
148
149#define TX4927_CP0_NAME "TX4927-CP0"
150static struct hw_interrupt_type tx4927_irq_cp0_type = {
151 .typename = TX4927_CP0_NAME,
152 .startup = tx4927_irq_cp0_startup,
153 .shutdown = tx4927_irq_cp0_shutdown,
154 .enable = tx4927_irq_cp0_enable,
155 .disable = tx4927_irq_cp0_disable,
156 .ack = tx4927_irq_cp0_mask_and_ack,
157 .end = tx4927_irq_cp0_end,
158 .set_affinity = NULL
159};
160
161#define TX4927_PIC_NAME "TX4927-PIC"
162static struct hw_interrupt_type tx4927_irq_pic_type = {
163 .typename = TX4927_PIC_NAME,
164 .startup = tx4927_irq_pic_startup,
165 .shutdown = tx4927_irq_pic_shutdown,
166 .enable = tx4927_irq_pic_enable,
167 .disable = tx4927_irq_pic_disable,
168 .ack = tx4927_irq_pic_mask_and_ack,
169 .end = tx4927_irq_pic_end,
170 .set_affinity = NULL
171};
172
173#define TX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL }
174static struct irqaction tx4927_irq_pic_action =
175TX4927_PIC_ACTION(TX4927_PIC_NAME);
176
177#define CCP0_STATUS 12
178#define CCP0_CAUSE 13
179
180/*
181 * Functions for cp0
182 */
183
184#define tx4927_irq_cp0_mask(irq) ( 1 << ( irq-TX4927_IRQ_CP0_BEG+8 ) )
185
186static void
187tx4927_irq_cp0_modify(unsigned cp0_reg, unsigned clr_bits, unsigned set_bits)
188{
189 unsigned long val = 0;
190
191 switch (cp0_reg) {
192 case CCP0_STATUS:
193 val = read_c0_status();
194 break;
195
196 case CCP0_CAUSE:
197 val = read_c0_cause();
198 break;
199
200 }
201
202 val &= (~clr_bits);
203 val |= (set_bits);
204
205 switch (cp0_reg) {
206 case CCP0_STATUS:{
207 write_c0_status(val);
208 break;
209 }
210 case CCP0_CAUSE:{
211 write_c0_cause(val);
212 break;
213 }
214 }
215
216 return;
217}
218
219static void __init tx4927_irq_cp0_init(void)
220{
221 int i;
222
223 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_INIT, "beg=%d end=%d\n",
224 TX4927_IRQ_CP0_BEG, TX4927_IRQ_CP0_END);
225
226 for (i = TX4927_IRQ_CP0_BEG; i <= TX4927_IRQ_CP0_END; i++) {
227 irq_desc[i].status = IRQ_DISABLED;
228 irq_desc[i].action = 0;
229 irq_desc[i].depth = 1;
230 irq_desc[i].handler = &tx4927_irq_cp0_type;
231 }
232
233 return;
234}
235
236static unsigned int tx4927_irq_cp0_startup(unsigned int irq)
237{
238 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_STARTUP, "irq=%d \n", irq);
239
240 tx4927_irq_cp0_enable(irq);
241
242 return (0);
243}
244
245static void tx4927_irq_cp0_shutdown(unsigned int irq)
246{
247 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_SHUTDOWN, "irq=%d \n", irq);
248
249 tx4927_irq_cp0_disable(irq);
250
251 return;
252}
253
254static void tx4927_irq_cp0_enable(unsigned int irq)
255{
256 unsigned long flags;
257
258 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENABLE, "irq=%d \n", irq);
259
260 spin_lock_irqsave(&tx4927_cp0_lock, flags);
261
262 tx4927_irq_cp0_modify(CCP0_STATUS, 0, tx4927_irq_cp0_mask(irq));
263
264 spin_unlock_irqrestore(&tx4927_cp0_lock, flags);
265
266 return;
267}
268
269static void tx4927_irq_cp0_disable(unsigned int irq)
270{
271 unsigned long flags;
272
273 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_DISABLE, "irq=%d \n", irq);
274
275 spin_lock_irqsave(&tx4927_cp0_lock, flags);
276
277 tx4927_irq_cp0_modify(CCP0_STATUS, tx4927_irq_cp0_mask(irq), 0);
278
279 spin_unlock_irqrestore(&tx4927_cp0_lock, flags);
280
281 return;
282}
283
284static void tx4927_irq_cp0_mask_and_ack(unsigned int irq)
285{
286 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_MASK, "irq=%d \n", irq);
287
288 tx4927_irq_cp0_disable(irq);
289
290 return;
291}
292
293static void tx4927_irq_cp0_end(unsigned int irq)
294{
295 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENDIRQ, "irq=%d \n", irq);
296
297 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
298 tx4927_irq_cp0_enable(irq);
299 }
300
301 return;
302}
303
304/*
305 * Functions for pic
306 */
307u32 tx4927_irq_pic_addr(int irq)
308{
309 /* MVMCP -- need to formulize this */
310 irq -= TX4927_IRQ_PIC_BEG;
311 switch (irq) {
312 case 17:
313 case 16:
314 case 1:
315 case 0:
316 return (0xff1ff610);
317
318 case 19:
319 case 18:
320 case 3:
321 case 2:
322 return (0xff1ff614);
323
324 case 21:
325 case 20:
326 case 5:
327 case 4:
328 return (0xff1ff618);
329
330 case 23:
331 case 22:
332 case 7:
333 case 6:
334 return (0xff1ff61c);
335
336 case 25:
337 case 24:
338 case 9:
339 case 8:
340 return (0xff1ff620);
341
342 case 27:
343 case 26:
344 case 11:
345 case 10:
346 return (0xff1ff624);
347
348 case 29:
349 case 28:
350 case 13:
351 case 12:
352 return (0xff1ff628);
353
354 case 31:
355 case 30:
356 case 15:
357 case 14:
358 return (0xff1ff62c);
359
360 }
361 return (0);
362}
363
364u32 tx4927_irq_pic_mask(int irq)
365{
366 /* MVMCP -- need to formulize this */
367 irq -= TX4927_IRQ_PIC_BEG;
368 switch (irq) {
369 case 31:
370 case 29:
371 case 27:
372 case 25:
373 case 23:
374 case 21:
375 case 19:
376 case 17:{
377 return (0x07000000);
378 }
379 case 30:
380 case 28:
381 case 26:
382 case 24:
383 case 22:
384 case 20:
385 case 18:
386 case 16:{
387 return (0x00070000);
388 }
389 case 15:
390 case 13:
391 case 11:
392 case 9:
393 case 7:
394 case 5:
395 case 3:
396 case 1:{
397 return (0x00000700);
398 }
399 case 14:
400 case 12:
401 case 10:
402 case 8:
403 case 6:
404 case 4:
405 case 2:
406 case 0:{
407 return (0x00000007);
408 }
409 }
410 return (0x00000000);
411}
412
413static void tx4927_irq_pic_modify(unsigned pic_reg, unsigned clr_bits,
414 unsigned set_bits)
415{
416 unsigned long val = 0;
417
418 val = TX4927_RD(pic_reg);
419 val &= (~clr_bits);
420 val |= (set_bits);
421 TX4927_WR(pic_reg, val);
422
423 return;
424}
425
426static void __init tx4927_irq_pic_init(void)
427{
428 unsigned long flags;
429 int i;
430
431 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_INIT, "beg=%d end=%d\n",
432 TX4927_IRQ_PIC_BEG, TX4927_IRQ_PIC_END);
433
434 for (i = TX4927_IRQ_PIC_BEG; i <= TX4927_IRQ_PIC_END; i++) {
435 irq_desc[i].status = IRQ_DISABLED;
436 irq_desc[i].action = 0;
437 irq_desc[i].depth = 2;
438 irq_desc[i].handler = &tx4927_irq_pic_type;
439 }
440
441 setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action);
442
443 spin_lock_irqsave(&tx4927_pic_lock, flags);
444
445 TX4927_WR(0xff1ff640, 0x6); /* irq level mask -- only accept hightest */
446 TX4927_WR(0xff1ff600, TX4927_RD(0xff1ff600) | 0x1); /* irq enable */
447
448 spin_unlock_irqrestore(&tx4927_pic_lock, flags);
449
450 return;
451}
452
453static unsigned int tx4927_irq_pic_startup(unsigned int irq)
454{
455 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_STARTUP, "irq=%d\n", irq);
456
457 tx4927_irq_pic_enable(irq);
458
459 return (0);
460}
461
462static void tx4927_irq_pic_shutdown(unsigned int irq)
463{
464 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_SHUTDOWN, "irq=%d\n", irq);
465
466 tx4927_irq_pic_disable(irq);
467
468 return;
469}
470
471static void tx4927_irq_pic_enable(unsigned int irq)
472{
473 unsigned long flags;
474
475 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENABLE, "irq=%d\n", irq);
476
477 spin_lock_irqsave(&tx4927_pic_lock, flags);
478
479 tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), 0,
480 tx4927_irq_pic_mask(irq));
481
482 spin_unlock_irqrestore(&tx4927_pic_lock, flags);
483
484 return;
485}
486
487static void tx4927_irq_pic_disable(unsigned int irq)
488{
489 unsigned long flags;
490
491 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_DISABLE, "irq=%d\n", irq);
492
493 spin_lock_irqsave(&tx4927_pic_lock, flags);
494
495 tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq),
496 tx4927_irq_pic_mask(irq), 0);
497
498 spin_unlock_irqrestore(&tx4927_pic_lock, flags);
499
500 return;
501}
502
503static void tx4927_irq_pic_mask_and_ack(unsigned int irq)
504{
505 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_MASK, "irq=%d\n", irq);
506
507 tx4927_irq_pic_disable(irq);
508
509 return;
510}
511
512static void tx4927_irq_pic_end(unsigned int irq)
513{
514 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENDIRQ, "irq=%d\n", irq);
515
516 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
517 tx4927_irq_pic_enable(irq);
518 }
519
520 return;
521}
522
523/*
524 * Main init functions
525 */
526void __init tx4927_irq_init(void)
527{
528 extern asmlinkage void tx4927_irq_handler(void);
529
530 TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "-\n");
531
532 TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "=Calling tx4927_irq_cp0_init()\n");
533 tx4927_irq_cp0_init();
534
535 TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "=Calling tx4927_irq_pic_init()\n");
536 tx4927_irq_pic_init();
537
538 TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT,
539 "=Calling set_except_vector(tx4927_irq_handler)\n");
540 set_except_vector(0, tx4927_irq_handler);
541
542 TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "+\n");
543
544 return;
545}
546
547int tx4927_irq_nested(void)
548{
549 int sw_irq = 0;
550 u32 level2;
551
552 TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST1, "-\n");
553
554 level2 = TX4927_RD(0xff1ff6a0);
555 TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST2, "=level2a=0x%x\n", level2);
556
557 if ((level2 & 0x10000) == 0) {
558 level2 &= 0x1f;
559 TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST3, "=level2b=0x%x\n", level2);
560
561 sw_irq = TX4927_IRQ_PIC_BEG + level2;
562 TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST3, "=sw_irq=%d\n", sw_irq);
563
564 if (sw_irq == 27) {
565 TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST4, "=irq-%d\n",
566 sw_irq);
567
568#ifdef CONFIG_TOSHIBA_RBTX4927
569 {
570 sw_irq = toshiba_rbtx4927_irq_nested(sw_irq);
571 }
572#endif
573
574 TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST4, "=irq+%d\n",
575 sw_irq);
576 }
577 }
578
579 TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST2, "=sw_irq=%d\n", sw_irq);
580
581 TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST1, "+\n");
582
583 return (sw_irq);
584}
diff --git a/arch/mips/tx4927/common/tx4927_irq_handler.S b/arch/mips/tx4927/common/tx4927_irq_handler.S
new file mode 100644
index 000000000000..ca123e28d1ef
--- /dev/null
+++ b/arch/mips/tx4927/common/tx4927_irq_handler.S
@@ -0,0 +1,103 @@
1/*
2 * linux/arch/mips/tx4927/common/tx4927_irq_handler.S
3 *
4 * Primary interrupt handler for tx4927 based systems
5 *
6 * Author: MontaVista Software, Inc.
7 * Author: jsun@mvista.com or jsun@junsun.net
8 * source@mvista.com
9 *
10 * Copyright 2001-2002 MontaVista Software Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
23 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
25 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
26 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * You should have received a copy of the GNU General Public License along
29 * with this program; if not, write to the Free Software Foundation, Inc.,
30 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 */
32#include <asm/asm.h>
33#include <asm/mipsregs.h>
34#include <asm/addrspace.h>
35#include <asm/regdef.h>
36#include <asm/stackframe.h>
37#include <asm/tx4927/tx4927.h>
38
39 .align 5
40 NESTED(tx4927_irq_handler, PT_SIZE, sp)
41 SAVE_ALL
42 CLI
43 .set at
44
45 mfc0 t0, CP0_CAUSE
46 mfc0 t1, CP0_STATUS
47 and t0, t1
48
49 andi t1, t0, STATUSF_IP7 /* cpu timer */
50 bnez t1, ll_ip7
51
52 /* IP6..IP3 multiplexed -- do not use */
53
54 andi t1, t0, STATUSF_IP2 /* tx4927 pic */
55 bnez t1, ll_ip2
56
57 andi t1, t0, STATUSF_IP0 /* user line 0 */
58 bnez t1, ll_ip0
59
60 andi t1, t0, STATUSF_IP1 /* user line 1 */
61 bnez t1, ll_ip1
62
63 .set reorder
64
65 /* wrong alarm or masked ... */
66 j spurious_interrupt
67 nop
68 END(tx4927_irq_handler)
69
70 .align 5
71
72
73ll_ip7:
74 li a0, TX4927_IRQ_CPU_TIMER
75 move a1, sp
76 jal do_IRQ
77 j ret_from_irq
78
79ll_ip2:
80 jal tx4927_irq_nested
81 nop
82 beqz v0, goto_spurious_interrupt
83 nop
84 move a0, v0
85 move a1, sp
86 jal do_IRQ
87 j ret_from_irq
88
89goto_spurious_interrupt:
90 j spurious_interrupt
91 nop
92
93ll_ip1:
94 li a0, TX4927_IRQ_USER1
95 move a1, sp
96 jal do_IRQ
97 j ret_from_irq
98
99ll_ip0:
100 li a0, TX4927_IRQ_USER0
101 move a1, sp
102 jal do_IRQ
103 j ret_from_irq
diff --git a/arch/mips/tx4927/common/tx4927_prom.c b/arch/mips/tx4927/common/tx4927_prom.c
new file mode 100644
index 000000000000..7d4cbf512d8a
--- /dev/null
+++ b/arch/mips/tx4927/common/tx4927_prom.c
@@ -0,0 +1,146 @@
1/*
2 * linux/arch/mips/tx4927/common/tx4927_prom.c
3 *
4 * common tx4927 memory interface
5 *
6 * Author: MontaVista Software, Inc.
7 * source@mvista.com
8 *
9 * Copyright 2001-2002 MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
24 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
25 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 * You should have received a copy of the GNU General Public License along
28 * with this program; if not, write to the Free Software Foundation, Inc.,
29 * 675 Mass Ave, Cambridge, MA 02139, USA.
30 */
31
32#include <linux/init.h>
33#include <linux/mm.h>
34#include <linux/sched.h>
35#include <linux/bootmem.h>
36
37#include <asm/addrspace.h>
38#include <asm/bootinfo.h>
39#include <asm/tx4927/tx4927.h>
40
41static unsigned int __init tx4927_process_sdccr(u64 * addr)
42{
43 u64 val;
44 unsigned int sdccr_ce;
45 unsigned int sdccr_bs;
46 unsigned int sdccr_rs;
47 unsigned int sdccr_cs;
48 unsigned int sdccr_mw;
49 unsigned int bs = 0;
50 unsigned int rs = 0;
51 unsigned int cs = 0;
52 unsigned int mw = 0;
53 unsigned int msize = 0;
54
55 val = (*((vu64 *) (addr)));
56
57 /* MVMCP -- need #defs for these bits masks */
58 sdccr_ce = ((val & (1 << 10)) >> 10);
59 sdccr_bs = ((val & (1 << 8)) >> 8);
60 sdccr_rs = ((val & (3 << 5)) >> 5);
61 sdccr_cs = ((val & (3 << 2)) >> 2);
62 sdccr_mw = ((val & (1 << 0)) >> 0);
63
64 if (sdccr_ce) {
65 switch (sdccr_bs) {
66 case 0:{
67 bs = 2;
68 break;
69 }
70 case 1:{
71 bs = 4;
72 break;
73 }
74 }
75 switch (sdccr_rs) {
76 case 0:{
77 rs = 2048;
78 break;
79 }
80 case 1:{
81 rs = 4096;
82 break;
83 }
84 case 2:{
85 rs = 8192;
86 break;
87 }
88 case 3:{
89 rs = 0;
90 break;
91 }
92 }
93 switch (sdccr_cs) {
94 case 0:{
95 cs = 256;
96 break;
97 }
98 case 1:{
99 cs = 512;
100 break;
101 }
102 case 2:{
103 cs = 1024;
104 break;
105 }
106 case 3:{
107 cs = 2048;
108 break;
109 }
110 }
111 switch (sdccr_mw) {
112 case 0:{
113 mw = 8;
114 break;
115 } /* 8 bytes = 64 bits */
116 case 1:{
117 mw = 4;
118 break;
119 } /* 4 bytes = 32 bits */
120 }
121 }
122
123 /* bytes per chip MB per chip num chips */
124 msize = (((rs * cs * mw) / (1024 * 1024)) * bs);
125
126 return (msize);
127}
128
129
130unsigned int __init tx4927_get_mem_size(void)
131{
132 unsigned int c0;
133 unsigned int c1;
134 unsigned int c2;
135 unsigned int c3;
136 unsigned int total;
137
138 /* MVMCP -- need #defs for these registers */
139 c0 = tx4927_process_sdccr((u64 *) 0xff1f8000);
140 c1 = tx4927_process_sdccr((u64 *) 0xff1f8008);
141 c2 = tx4927_process_sdccr((u64 *) 0xff1f8010);
142 c3 = tx4927_process_sdccr((u64 *) 0xff1f8018);
143 total = c0 + c1 + c2 + c3;
144
145 return (total);
146}
diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c
new file mode 100644
index 000000000000..16bcbdc6d1cc
--- /dev/null
+++ b/arch/mips/tx4927/common/tx4927_setup.c
@@ -0,0 +1,237 @@
1/*
2 * Author: MontaVista Software, Inc.
3 * source@mvista.com
4 *
5 * Copyright 2001-2002 MontaVista Software Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
15 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
17 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
18 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
19 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
20 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
21 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27#include <linux/config.h>
28#include <linux/errno.h>
29#include <linux/init.h>
30#include <linux/kernel_stat.h>
31#include <linux/module.h>
32#include <linux/signal.h>
33#include <linux/sched.h>
34#include <linux/types.h>
35#include <linux/interrupt.h>
36#include <linux/ioport.h>
37#include <linux/timex.h>
38#include <linux/slab.h>
39#include <linux/random.h>
40#include <linux/irq.h>
41#include <linux/bitops.h>
42#include <asm/bootinfo.h>
43#include <asm/io.h>
44#include <asm/irq.h>
45#include <asm/mipsregs.h>
46#include <asm/system.h>
47#include <asm/time.h>
48#include <asm/tx4927/tx4927.h>
49
50
51#undef DEBUG
52
53void __init tx4927_time_init(void);
54void __init tx4927_timer_setup(struct irqaction *irq);
55void dump_cp0(char *key);
56
57
58void (*__wbflush) (void);
59
60static void tx4927_write_buffer_flush(void)
61{
62 __asm__ __volatile__
63 ("sync\n\t" "nop\n\t" "loop: bc0f loop\n\t" "nop\n\t");
64}
65
66
67static void __init tx4927_setup(void)
68{
69 board_time_init = tx4927_time_init;
70 board_timer_setup = tx4927_timer_setup;
71 __wbflush = tx4927_write_buffer_flush;
72
73#ifdef CONFIG_TOSHIBA_RBTX4927
74 {
75 extern void toshiba_rbtx4927_setup(void);
76 toshiba_rbtx4927_setup();
77 }
78#endif
79
80 return;
81}
82
83early_initcall(tx4927_setup);
84
85void __init tx4927_time_init(void)
86{
87
88#ifdef CONFIG_TOSHIBA_RBTX4927
89 {
90 extern void toshiba_rbtx4927_time_init(void);
91 toshiba_rbtx4927_time_init();
92 }
93#endif
94
95 return;
96}
97
98
99void __init tx4927_timer_setup(struct irqaction *irq)
100{
101 u32 count;
102 u32 c1;
103 u32 c2;
104
105 setup_irq(TX4927_IRQ_CPU_TIMER, irq);
106
107 /* to generate the first timer interrupt */
108 c1 = read_c0_count();
109 count = c1 + (mips_hpt_frequency / HZ);
110 write_c0_compare(count);
111 c2 = read_c0_count();
112
113#ifdef CONFIG_TOSHIBA_RBTX4927
114 {
115 extern void toshiba_rbtx4927_timer_setup(struct irqaction
116 *irq);
117 toshiba_rbtx4927_timer_setup(irq);
118 }
119#endif
120
121 return;
122}
123
124
125#ifdef DEBUG
126void print_cp0(char *key, int num, char *name, u32 val)
127{
128 printk("%s cp0:%02d:%s=0x%08x\n", key, num, name, val);
129 return;
130}
131
132indent: Standard input:25: Error:Unexpected end of file
133
134void
135dump_cp0(char *key)
136{
137 if (key == NULL)
138 key = "";
139
140 print_cp0(key, 0, "INDEX ", read_c0_index());
141 print_cp0(key, 2, "ENTRYLO1", read_c0_entrylo0());
142 print_cp0(key, 3, "ENTRYLO2", read_c0_entrylo1());
143 print_cp0(key, 4, "CONTEXT ", read_c0_context());
144 print_cp0(key, 5, "PAGEMASK", read_c0_pagemask());
145 print_cp0(key, 6, "WIRED ", read_c0_wired());
146 //print_cp0(key, 8, "BADVADDR", read_c0_badvaddr());
147 print_cp0(key, 9, "COUNT ", read_c0_count());
148 print_cp0(key, 10, "ENTRYHI ", read_c0_entryhi());
149 print_cp0(key, 11, "COMPARE ", read_c0_compare());
150 print_cp0(key, 12, "STATUS ", read_c0_status());
151 print_cp0(key, 13, "CAUSE ", read_c0_cause() & 0xffff87ff);
152 print_cp0(key, 16, "CONFIG ", read_c0_config());
153 return;
154}
155
156void print_pic(char *key, u32 reg, char *name)
157{
158 printk("%s pic:0x%08x:%s=0x%08x\n", key, reg, name,
159 TX4927_RD(reg));
160 return;
161}
162
163
164void dump_pic(char *key)
165{
166 if (key == NULL)
167 key = "";
168
169 print_pic(key, 0xff1ff600, "IRDEN ");
170 print_pic(key, 0xff1ff604, "IRDM0 ");
171 print_pic(key, 0xff1ff608, "IRDM1 ");
172
173 print_pic(key, 0xff1ff610, "IRLVL0 ");
174 print_pic(key, 0xff1ff614, "IRLVL1 ");
175 print_pic(key, 0xff1ff618, "IRLVL2 ");
176 print_pic(key, 0xff1ff61c, "IRLVL3 ");
177 print_pic(key, 0xff1ff620, "IRLVL4 ");
178 print_pic(key, 0xff1ff624, "IRLVL5 ");
179 print_pic(key, 0xff1ff628, "IRLVL6 ");
180 print_pic(key, 0xff1ff62c, "IRLVL7 ");
181
182 print_pic(key, 0xff1ff640, "IRMSK ");
183 print_pic(key, 0xff1ff660, "IREDC ");
184 print_pic(key, 0xff1ff680, "IRPND ");
185 print_pic(key, 0xff1ff6a0, "IRCS ");
186
187 print_pic(key, 0xff1ff514, "IRFLAG1 "); /* don't read IRLAG0 -- it hangs system */
188
189 print_pic(key, 0xff1ff518, "IRPOL ");
190 print_pic(key, 0xff1ff51c, "IRRCNT ");
191 print_pic(key, 0xff1ff520, "IRMASKINT");
192 print_pic(key, 0xff1ff524, "IRMASKEXT");
193
194 return;
195}
196
197
198void print_addr(char *hdr, char *key, u32 addr)
199{
200 printk("%s %s:0x%08x=0x%08x\n", hdr, key, addr, TX4927_RD(addr));
201 return;
202}
203
204
205void dump_180(char *key)
206{
207 u32 i;
208
209 for (i = 0x80000180; i < 0x80000180 + 0x80; i += 4) {
210 print_addr("180", key, i);
211 }
212 return;
213}
214
215
216void dump_eh0(char *key)
217{
218 int i;
219 extern unsigned long exception_handlers[];
220
221 for (i = (int) exception_handlers;
222 i < (int) (exception_handlers + 20); i += 4) {
223 print_addr("eh0", key, i);
224 }
225
226 return;
227}
228
229void pk0(void)
230{
231 volatile u32 val;
232
233 __asm__ __volatile__("ori %0, $26, 0":"=r"(val)
234 );
235 printk("k0=[0x%08x]\n", val);
236}
237#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 01:30:42 -0500