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authorLinus Torvalds <torvalds@linux-foundation.org>2013-03-02 10:44:16 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-03-02 10:44:16 -0500
commitaebb2afd5420c860b7fbc3882a323ef1247fbf16 (patch)
tree05ee0efcebca5ec421de44de7a6d6271088c64a8 /arch/mips/sni
parent8eae508b7c6ff502a71d0293b69e97c5505d5840 (diff)
parentedb15d83a875a1f4b1576188844db5c330c3267d (diff)
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle: o Add basic support for the Mediatek/Ralink Wireless SoC family. o The Qualcomm Atheros platform is extended by support for the new QCA955X SoC series as well as a bunch of patches that get the code ready for OF support. o Lantiq and BCM47XX platform have a few improvements and bug fixes. o MIPS has sent a few patches that get the kernel ready for the upcoming microMIPS support. o The rest of the series is made up of small bug fixes and cleanups that relate to various parts of the MIPS code. The biggy in there is a whitespace cleanup. After I was sent another set of whitespace cleanup patches I decided it was the time to clean the whitespace "issues" for once and and that touches many files below arch/mips/. Fix up silly conflicts, mostly due to whitespace cleanups. * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (105 commits) MIPS: Quit exporting kernel internel break codes to uapi/asm/break.h MIPS: remove broken conditional inside vpe loader code MIPS: SMTC: fix implicit declaration of set_vi_handler MIPS: early_printk: drop __init annotations MIPS: Probe for and report hardware virtualization support. MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board MIPS: ath79: add USB controller registration code for the QCA955X SoCs MIPS: ath79: add PCI controller registration code for the QCA955X SoCs MIPS: ath79: add WMAC registration code for the QCA955X SoCs MIPS: ath79: register UART for the QCA955X SoCs MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear} MIPS: ath79: add GPIO setup code for the QCA955X SoCs MIPS: ath79: add IRQ handling code for the QCA955X SoCs MIPS: ath79: add clock setup code for the QCA955X SoCs MIPS: ath79: add SoC detection code for the QCA955X SoCs MIPS: ath79: add early printk support for the QCA955X SoCs MIPS: ath79: fix WMAC IRQ resource assignment mips: reserve elfcorehdr mips: Make sure kernel memory is in iomem MIPS: ath79: use dynamically allocated USB platform devices ...
Diffstat (limited to 'arch/mips/sni')
-rw-r--r--arch/mips/sni/a20r.c44
-rw-r--r--arch/mips/sni/eisa.c2
-rw-r--r--arch/mips/sni/irq.c20
-rw-r--r--arch/mips/sni/pcimt.c36
-rw-r--r--arch/mips/sni/pcit.c40
-rw-r--r--arch/mips/sni/rm200.c38
-rw-r--r--arch/mips/sni/setup.c24
-rw-r--r--arch/mips/sni/time.c30
8 files changed, 117 insertions, 117 deletions
diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
index e05ad4da44d9..dd0ab982d77e 100644
--- a/arch/mips/sni/a20r.c
+++ b/arch/mips/sni/a20r.c
@@ -41,17 +41,17 @@ static struct platform_device a20r_serial8250_device = {
41}; 41};
42 42
43static struct resource a20r_ds1216_rsrc[] = { 43static struct resource a20r_ds1216_rsrc[] = {
44 { 44 {
45 .start = 0x1c081ffc, 45 .start = 0x1c081ffc,
46 .end = 0x1c081fff, 46 .end = 0x1c081fff,
47 .flags = IORESOURCE_MEM 47 .flags = IORESOURCE_MEM
48 } 48 }
49}; 49};
50 50
51static struct platform_device a20r_ds1216_device = { 51static struct platform_device a20r_ds1216_device = {
52 .name = "rtc-ds1216", 52 .name = "rtc-ds1216",
53 .num_resources = ARRAY_SIZE(a20r_ds1216_rsrc), 53 .num_resources = ARRAY_SIZE(a20r_ds1216_rsrc),
54 .resource = a20r_ds1216_rsrc 54 .resource = a20r_ds1216_rsrc
55}; 55};
56 56
57static struct resource snirm_82596_rsrc[] = { 57static struct resource snirm_82596_rsrc[] = {
@@ -76,14 +76,14 @@ static struct resource snirm_82596_rsrc[] = {
76 .flags = IORESOURCE_IRQ 76 .flags = IORESOURCE_IRQ
77 }, 77 },
78 { 78 {
79 .flags = 0x01 /* 16bit mpu port access */ 79 .flags = 0x01 /* 16bit mpu port access */
80 } 80 }
81}; 81};
82 82
83static struct platform_device snirm_82596_pdev = { 83static struct platform_device snirm_82596_pdev = {
84 .name = "snirm_82596", 84 .name = "snirm_82596",
85 .num_resources = ARRAY_SIZE(snirm_82596_rsrc), 85 .num_resources = ARRAY_SIZE(snirm_82596_rsrc),
86 .resource = snirm_82596_rsrc 86 .resource = snirm_82596_rsrc
87}; 87};
88 88
89static struct resource snirm_53c710_rsrc[] = { 89static struct resource snirm_53c710_rsrc[] = {
@@ -100,9 +100,9 @@ static struct resource snirm_53c710_rsrc[] = {
100}; 100};
101 101
102static struct platform_device snirm_53c710_pdev = { 102static struct platform_device snirm_53c710_pdev = {
103 .name = "snirm_53c710", 103 .name = "snirm_53c710",
104 .num_resources = ARRAY_SIZE(snirm_53c710_rsrc), 104 .num_resources = ARRAY_SIZE(snirm_53c710_rsrc),
105 .resource = snirm_53c710_rsrc 105 .resource = snirm_53c710_rsrc
106}; 106};
107 107
108static struct resource sc26xx_rsrc[] = { 108static struct resource sc26xx_rsrc[] = {
@@ -171,7 +171,7 @@ static u32 a20r_ack_hwint(void)
171 " addiu %1, -1 \n" 171 " addiu %1, -1 \n"
172 " sw $1, 0(%0) \n" 172 " sw $1, 0(%0) \n"
173 " sync \n" 173 " sync \n"
174 ".set pop \n" 174 ".set pop \n"
175 : 175 :
176 : "Jr" (PCIMT_UCONF), "Jr" (0xbc000000)); 176 : "Jr" (PCIMT_UCONF), "Jr" (0xbc000000));
177 write_c0_status(status); 177 write_c0_status(status);
@@ -236,13 +236,13 @@ static int __init snirm_a20r_setup_devinit(void)
236 switch (sni_brd_type) { 236 switch (sni_brd_type) {
237 case SNI_BRD_TOWER_OASIC: 237 case SNI_BRD_TOWER_OASIC:
238 case SNI_BRD_MINITOWER: 238 case SNI_BRD_MINITOWER:
239 platform_device_register(&snirm_82596_pdev); 239 platform_device_register(&snirm_82596_pdev);
240 platform_device_register(&snirm_53c710_pdev); 240 platform_device_register(&snirm_53c710_pdev);
241 platform_device_register(&sc26xx_pdev); 241 platform_device_register(&sc26xx_pdev);
242 platform_device_register(&a20r_serial8250_device); 242 platform_device_register(&a20r_serial8250_device);
243 platform_device_register(&a20r_ds1216_device); 243 platform_device_register(&a20r_ds1216_device);
244 sni_eisa_root_init(); 244 sni_eisa_root_init();
245 break; 245 break;
246 } 246 }
247 return 0; 247 return 0;
248} 248}
diff --git a/arch/mips/sni/eisa.c b/arch/mips/sni/eisa.c
index 6827feb4de96..179b5d556ad2 100644
--- a/arch/mips/sni/eisa.c
+++ b/arch/mips/sni/eisa.c
@@ -22,7 +22,7 @@ static struct platform_device eisa_root_dev = {
22}; 22};
23 23
24static struct eisa_root_device eisa_bus_root = { 24static struct eisa_root_device eisa_bus_root = {
25 .dev = &eisa_root_dev.dev, 25 .dev = &eisa_root_dev.dev,
26 .bus_base_addr = 0, 26 .bus_base_addr = 0,
27 .res = &ioport_resource, 27 .res = &ioport_resource,
28 .slots = EISA_MAX_SLOTS, 28 .slots = EISA_MAX_SLOTS,
diff --git a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c
index 5a4ec75382e2..ac61b90bcc66 100644
--- a/arch/mips/sni/irq.c
+++ b/arch/mips/sni/irq.c
@@ -58,25 +58,25 @@ void __init arch_init_irq(void)
58 case SNI_BRD_10NEW: 58 case SNI_BRD_10NEW:
59 case SNI_BRD_TOWER_OASIC: 59 case SNI_BRD_TOWER_OASIC:
60 case SNI_BRD_MINITOWER: 60 case SNI_BRD_MINITOWER:
61 sni_a20r_irq_init(); 61 sni_a20r_irq_init();
62 break; 62 break;
63 63
64 case SNI_BRD_PCI_TOWER: 64 case SNI_BRD_PCI_TOWER:
65 sni_pcit_irq_init(); 65 sni_pcit_irq_init();
66 break; 66 break;
67 67
68 case SNI_BRD_PCI_TOWER_CPLUS: 68 case SNI_BRD_PCI_TOWER_CPLUS:
69 sni_pcit_cplus_irq_init(); 69 sni_pcit_cplus_irq_init();
70 break; 70 break;
71 71
72 case SNI_BRD_RM200: 72 case SNI_BRD_RM200:
73 sni_rm200_irq_init(); 73 sni_rm200_irq_init();
74 break; 74 break;
75 75
76 case SNI_BRD_PCI_MTOWER: 76 case SNI_BRD_PCI_MTOWER:
77 case SNI_BRD_PCI_DESKTOP: 77 case SNI_BRD_PCI_DESKTOP:
78 case SNI_BRD_PCI_MTOWER_CPLUS: 78 case SNI_BRD_PCI_MTOWER_CPLUS:
79 sni_pcimt_irq_init(); 79 sni_pcimt_irq_init();
80 break; 80 break;
81 } 81 }
82} 82}
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index cdb1417fba59..cec4b8ca1438 100644
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -60,7 +60,7 @@ static inline void sni_pcimt_detect(void)
60 p += sprintf(p, "%s PCI", (csmsr & 0x80) ? "RM200" : "RM300"); 60 p += sprintf(p, "%s PCI", (csmsr & 0x80) ? "RM200" : "RM300");
61 if ((csmsr & 0x80) == 0) 61 if ((csmsr & 0x80) == 0)
62 p += sprintf(p, ", board revision %s", 62 p += sprintf(p, ", board revision %s",
63 (csmsr & 0x20) ? "D" : "C"); 63 (csmsr & 0x20) ? "D" : "C");
64 asic = csmsr & 0x80; 64 asic = csmsr & 0x80;
65 asic = (csmsr & 0x08) ? asic : !asic; 65 asic = (csmsr & 0x08) ? asic : !asic;
66 p += sprintf(p, ", ASIC PCI Rev %s", asic ? "1.0" : "1.1"); 66 p += sprintf(p, ", ASIC PCI Rev %s", asic ? "1.0" : "1.1");
@@ -91,22 +91,22 @@ static struct platform_device pcimt_serial8250_device = {
91}; 91};
92 92
93static struct resource pcimt_cmos_rsrc[] = { 93static struct resource pcimt_cmos_rsrc[] = {
94 { 94 {
95 .start = 0x70, 95 .start = 0x70,
96 .end = 0x71, 96 .end = 0x71,
97 .flags = IORESOURCE_IO 97 .flags = IORESOURCE_IO
98 }, 98 },
99 { 99 {
100 .start = 8, 100 .start = 8,
101 .end = 8, 101 .end = 8,
102 .flags = IORESOURCE_IRQ 102 .flags = IORESOURCE_IRQ
103 } 103 }
104}; 104};
105 105
106static struct platform_device pcimt_cmos_device = { 106static struct platform_device pcimt_cmos_device = {
107 .name = "rtc_cmos", 107 .name = "rtc_cmos",
108 .num_resources = ARRAY_SIZE(pcimt_cmos_rsrc), 108 .num_resources = ARRAY_SIZE(pcimt_cmos_rsrc),
109 .resource = pcimt_cmos_rsrc 109 .resource = pcimt_cmos_rsrc
110}; 110};
111 111
112 112
@@ -191,7 +191,7 @@ static struct pci_controller sni_controller = {
191 .mem_offset = 0x00000000UL, 191 .mem_offset = 0x00000000UL,
192 .io_resource = &sni_io_resource, 192 .io_resource = &sni_io_resource,
193 .io_offset = 0x00000000UL, 193 .io_offset = 0x00000000UL,
194 .io_map_base = SNI_PORT_BASE 194 .io_map_base = SNI_PORT_BASE
195}; 195};
196 196
197static void enable_pcimt_irq(struct irq_data *d) 197static void enable_pcimt_irq(struct irq_data *d)
@@ -319,9 +319,9 @@ static int __init snirm_pcimt_setup_devinit(void)
319 case SNI_BRD_PCI_MTOWER: 319 case SNI_BRD_PCI_MTOWER:
320 case SNI_BRD_PCI_DESKTOP: 320 case SNI_BRD_PCI_DESKTOP:
321 case SNI_BRD_PCI_MTOWER_CPLUS: 321 case SNI_BRD_PCI_MTOWER_CPLUS:
322 platform_device_register(&pcimt_serial8250_device); 322 platform_device_register(&pcimt_serial8250_device);
323 platform_device_register(&pcimt_cmos_device); 323 platform_device_register(&pcimt_cmos_device);
324 break; 324 break;
325 } 325 }
326 326
327 return 0; 327 return 0;
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c
index b5246373d16b..7cddd03d1fea 100644
--- a/arch/mips/sni/pcit.c
+++ b/arch/mips/sni/pcit.c
@@ -59,22 +59,22 @@ static struct platform_device pcit_cplus_serial8250_device = {
59}; 59};
60 60
61static struct resource pcit_cmos_rsrc[] = { 61static struct resource pcit_cmos_rsrc[] = {
62 { 62 {
63 .start = 0x70, 63 .start = 0x70,
64 .end = 0x71, 64 .end = 0x71,
65 .flags = IORESOURCE_IO 65 .flags = IORESOURCE_IO
66 }, 66 },
67 { 67 {
68 .start = 8, 68 .start = 8,
69 .end = 8, 69 .end = 8,
70 .flags = IORESOURCE_IRQ 70 .flags = IORESOURCE_IRQ
71 } 71 }
72}; 72};
73 73
74static struct platform_device pcit_cmos_device = { 74static struct platform_device pcit_cmos_device = {
75 .name = "rtc_cmos", 75 .name = "rtc_cmos",
76 .num_resources = ARRAY_SIZE(pcit_cmos_rsrc), 76 .num_resources = ARRAY_SIZE(pcit_cmos_rsrc),
77 .resource = pcit_cmos_rsrc 77 .resource = pcit_cmos_rsrc
78}; 78};
79 79
80static struct platform_device pcit_pcspeaker_pdev = { 80static struct platform_device pcit_pcspeaker_pdev = {
@@ -153,7 +153,7 @@ static struct pci_controller sni_pcit_controller = {
153 .mem_offset = 0x00000000UL, 153 .mem_offset = 0x00000000UL,
154 .io_resource = &sni_io_resource, 154 .io_resource = &sni_io_resource,
155 .io_offset = 0x00000000UL, 155 .io_offset = 0x00000000UL,
156 .io_map_base = SNI_PORT_BASE 156 .io_map_base = SNI_PORT_BASE
157}; 157};
158 158
159static void enable_pcit_irq(struct irq_data *d) 159static void enable_pcit_irq(struct irq_data *d)
@@ -272,16 +272,16 @@ static int __init snirm_pcit_setup_devinit(void)
272{ 272{
273 switch (sni_brd_type) { 273 switch (sni_brd_type) {
274 case SNI_BRD_PCI_TOWER: 274 case SNI_BRD_PCI_TOWER:
275 platform_device_register(&pcit_serial8250_device); 275 platform_device_register(&pcit_serial8250_device);
276 platform_device_register(&pcit_cmos_device); 276 platform_device_register(&pcit_cmos_device);
277 platform_device_register(&pcit_pcspeaker_pdev); 277 platform_device_register(&pcit_pcspeaker_pdev);
278 break; 278 break;
279 279
280 case SNI_BRD_PCI_TOWER_CPLUS: 280 case SNI_BRD_PCI_TOWER_CPLUS:
281 platform_device_register(&pcit_cplus_serial8250_device); 281 platform_device_register(&pcit_cplus_serial8250_device);
282 platform_device_register(&pcit_cmos_device); 282 platform_device_register(&pcit_cmos_device);
283 platform_device_register(&pcit_pcspeaker_pdev); 283 platform_device_register(&pcit_pcspeaker_pdev);
284 break; 284 break;
285 } 285 }
286 return 0; 286 return 0;
287} 287}
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c
index 3ab5b5d25b0a..a046b302623e 100644
--- a/arch/mips/sni/rm200.c
+++ b/arch/mips/sni/rm200.c
@@ -48,17 +48,17 @@ static struct platform_device rm200_serial8250_device = {
48}; 48};
49 49
50static struct resource rm200_ds1216_rsrc[] = { 50static struct resource rm200_ds1216_rsrc[] = {
51 { 51 {
52 .start = 0x1cd41ffc, 52 .start = 0x1cd41ffc,
53 .end = 0x1cd41fff, 53 .end = 0x1cd41fff,
54 .flags = IORESOURCE_MEM 54 .flags = IORESOURCE_MEM
55 } 55 }
56}; 56};
57 57
58static struct platform_device rm200_ds1216_device = { 58static struct platform_device rm200_ds1216_device = {
59 .name = "rtc-ds1216", 59 .name = "rtc-ds1216",
60 .num_resources = ARRAY_SIZE(rm200_ds1216_rsrc), 60 .num_resources = ARRAY_SIZE(rm200_ds1216_rsrc),
61 .resource = rm200_ds1216_rsrc 61 .resource = rm200_ds1216_rsrc
62}; 62};
63 63
64static struct resource snirm_82596_rm200_rsrc[] = { 64static struct resource snirm_82596_rm200_rsrc[] = {
@@ -88,9 +88,9 @@ static struct resource snirm_82596_rm200_rsrc[] = {
88}; 88};
89 89
90static struct platform_device snirm_82596_rm200_pdev = { 90static struct platform_device snirm_82596_rm200_pdev = {
91 .name = "snirm_82596", 91 .name = "snirm_82596",
92 .num_resources = ARRAY_SIZE(snirm_82596_rm200_rsrc), 92 .num_resources = ARRAY_SIZE(snirm_82596_rm200_rsrc),
93 .resource = snirm_82596_rm200_rsrc 93 .resource = snirm_82596_rm200_rsrc
94}; 94};
95 95
96static struct resource snirm_53c710_rm200_rsrc[] = { 96static struct resource snirm_53c710_rm200_rsrc[] = {
@@ -107,9 +107,9 @@ static struct resource snirm_53c710_rm200_rsrc[] = {
107}; 107};
108 108
109static struct platform_device snirm_53c710_rm200_pdev = { 109static struct platform_device snirm_53c710_rm200_pdev = {
110 .name = "snirm_53c710", 110 .name = "snirm_53c710",
111 .num_resources = ARRAY_SIZE(snirm_53c710_rm200_rsrc), 111 .num_resources = ARRAY_SIZE(snirm_53c710_rm200_rsrc),
112 .resource = snirm_53c710_rm200_rsrc 112 .resource = snirm_53c710_rm200_rsrc
113}; 113};
114 114
115static int __init snirm_setup_devinit(void) 115static int __init snirm_setup_devinit(void)
@@ -134,9 +134,9 @@ device_initcall(snirm_setup_devinit);
134 */ 134 */
135 135
136static DEFINE_RAW_SPINLOCK(sni_rm200_i8259A_lock); 136static DEFINE_RAW_SPINLOCK(sni_rm200_i8259A_lock);
137#define PIC_CMD 0x00 137#define PIC_CMD 0x00
138#define PIC_IMR 0x01 138#define PIC_IMR 0x01
139#define PIC_ISR PIC_CMD 139#define PIC_ISR PIC_CMD
140#define PIC_POLL PIC_ISR 140#define PIC_POLL PIC_ISR
141#define PIC_OCW3 PIC_ISR 141#define PIC_OCW3 PIC_ISR
142 142
@@ -421,8 +421,8 @@ void __init sni_rm200_i8259_irqs(void)
421} 421}
422 422
423 423
424#define SNI_RM200_INT_STAT_REG CKSEG1ADDR(0xbc000000) 424#define SNI_RM200_INT_STAT_REG CKSEG1ADDR(0xbc000000)
425#define SNI_RM200_INT_ENA_REG CKSEG1ADDR(0xbc080000) 425#define SNI_RM200_INT_ENA_REG CKSEG1ADDR(0xbc080000)
426 426
427#define SNI_RM200_INT_START 24 427#define SNI_RM200_INT_START 24
428#define SNI_RM200_INT_END 28 428#define SNI_RM200_INT_END 28
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index 2e9c283b8e68..5b09b3544edd 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -204,23 +204,23 @@ void __init plat_mem_setup(void)
204 case SNI_BRD_10NEW: 204 case SNI_BRD_10NEW:
205 case SNI_BRD_TOWER_OASIC: 205 case SNI_BRD_TOWER_OASIC:
206 case SNI_BRD_MINITOWER: 206 case SNI_BRD_MINITOWER:
207 sni_a20r_init(); 207 sni_a20r_init();
208 break; 208 break;
209 209
210 case SNI_BRD_PCI_TOWER: 210 case SNI_BRD_PCI_TOWER:
211 case SNI_BRD_PCI_TOWER_CPLUS: 211 case SNI_BRD_PCI_TOWER_CPLUS:
212 sni_pcit_init(); 212 sni_pcit_init();
213 break; 213 break;
214 214
215 case SNI_BRD_RM200: 215 case SNI_BRD_RM200:
216 sni_rm200_init(); 216 sni_rm200_init();
217 break; 217 break;
218 218
219 case SNI_BRD_PCI_MTOWER: 219 case SNI_BRD_PCI_MTOWER:
220 case SNI_BRD_PCI_DESKTOP: 220 case SNI_BRD_PCI_DESKTOP:
221 case SNI_BRD_PCI_MTOWER_CPLUS: 221 case SNI_BRD_PCI_MTOWER_CPLUS:
222 sni_pcimt_init(); 222 sni_pcimt_init();
223 break; 223 break;
224 } 224 }
225 225
226 _machine_restart = sni_machine_restart; 226 _machine_restart = sni_machine_restart;
@@ -247,16 +247,16 @@ static void quirk_cirrus_ram_size(struct pci_dev *dev)
247 */ 247 */
248 pci_read_config_word(dev, PCI_COMMAND, &cmd); 248 pci_read_config_word(dev, PCI_COMMAND, &cmd);
249 if ((cmd & (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) 249 if ((cmd & (PCI_COMMAND_IO|PCI_COMMAND_MEMORY))
250 == (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) { 250 == (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) {
251 vga_wseq(NULL, CL_SEQR6, 0x12); /* unlock all extension registers */ 251 vga_wseq(NULL, CL_SEQR6, 0x12); /* unlock all extension registers */
252 vga_wseq(NULL, CL_SEQRF, 0x18); 252 vga_wseq(NULL, CL_SEQRF, 0x18);
253 } 253 }
254} 254}
255 255
256DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5434_8, 256DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5434_8,
257 quirk_cirrus_ram_size); 257 quirk_cirrus_ram_size);
258DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5436, 258DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5436,
259 quirk_cirrus_ram_size); 259 quirk_cirrus_ram_size);
260DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5446, 260DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5446,
261 quirk_cirrus_ram_size); 261 quirk_cirrus_ram_size);
262#endif 262#endif
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c
index 494c9e7847aa..cf8ec568b9df 100644
--- a/arch/mips/sni/time.c
+++ b/arch/mips/sni/time.c
@@ -10,12 +10,12 @@
10#include <asm/time.h> 10#include <asm/time.h>
11#include <asm-generic/rtc.h> 11#include <asm-generic/rtc.h>
12 12
13#define SNI_CLOCK_TICK_RATE 3686400 13#define SNI_CLOCK_TICK_RATE 3686400
14#define SNI_COUNTER2_DIV 64 14#define SNI_COUNTER2_DIV 64
15#define SNI_COUNTER0_DIV ((SNI_CLOCK_TICK_RATE / SNI_COUNTER2_DIV) / HZ) 15#define SNI_COUNTER0_DIV ((SNI_CLOCK_TICK_RATE / SNI_COUNTER2_DIV) / HZ)
16 16
17static void a20r_set_mode(enum clock_event_mode mode, 17static void a20r_set_mode(enum clock_event_mode mode,
18 struct clock_event_device *evt) 18 struct clock_event_device *evt)
19{ 19{
20 switch (mode) { 20 switch (mode) {
21 case CLOCK_EVT_MODE_PERIODIC: 21 case CLOCK_EVT_MODE_PERIODIC:
@@ -33,14 +33,14 @@ static void a20r_set_mode(enum clock_event_mode mode,
33 *(volatile u8 *)(A20R_PT_CLOCK_BASE + 8) = SNI_COUNTER2_DIV >> 8; 33 *(volatile u8 *)(A20R_PT_CLOCK_BASE + 8) = SNI_COUNTER2_DIV >> 8;
34 wmb(); 34 wmb();
35 35
36 break; 36 break;
37 case CLOCK_EVT_MODE_ONESHOT: 37 case CLOCK_EVT_MODE_ONESHOT:
38 case CLOCK_EVT_MODE_UNUSED: 38 case CLOCK_EVT_MODE_UNUSED:
39 case CLOCK_EVT_MODE_SHUTDOWN: 39 case CLOCK_EVT_MODE_SHUTDOWN:
40 break; 40 break;
41 case CLOCK_EVT_MODE_RESUME: 41 case CLOCK_EVT_MODE_RESUME:
42 break; 42 break;
43 } 43 }
44} 44}
45 45
46static struct clock_event_device a20r_clockevent_device = { 46static struct clock_event_device a20r_clockevent_device = {
@@ -82,15 +82,15 @@ static void __init sni_a20r_timer_setup(void)
82 struct irqaction *action = &a20r_irqaction; 82 struct irqaction *action = &a20r_irqaction;
83 unsigned int cpu = smp_processor_id(); 83 unsigned int cpu = smp_processor_id();
84 84
85 cd->cpumask = cpumask_of(cpu); 85 cd->cpumask = cpumask_of(cpu);
86 clockevents_register_device(cd); 86 clockevents_register_device(cd);
87 action->dev_id = cd; 87 action->dev_id = cd;
88 setup_irq(SNI_A20R_IRQ_TIMER, &a20r_irqaction); 88 setup_irq(SNI_A20R_IRQ_TIMER, &a20r_irqaction);
89} 89}
90 90
91#define SNI_8254_TICK_RATE 1193182UL 91#define SNI_8254_TICK_RATE 1193182UL
92 92
93#define SNI_8254_TCSAMP_COUNTER ((SNI_8254_TICK_RATE / HZ) + 255) 93#define SNI_8254_TCSAMP_COUNTER ((SNI_8254_TICK_RATE / HZ) + 255)
94 94
95static __init unsigned long dosample(void) 95static __init unsigned long dosample(void)
96{ 96{