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authorLinus Torvalds <torvalds@linux-foundation.org>2013-03-02 10:44:16 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-03-02 10:44:16 -0500
commitaebb2afd5420c860b7fbc3882a323ef1247fbf16 (patch)
tree05ee0efcebca5ec421de44de7a6d6271088c64a8 /arch/mips/sni/pcimt.c
parent8eae508b7c6ff502a71d0293b69e97c5505d5840 (diff)
parentedb15d83a875a1f4b1576188844db5c330c3267d (diff)
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle: o Add basic support for the Mediatek/Ralink Wireless SoC family. o The Qualcomm Atheros platform is extended by support for the new QCA955X SoC series as well as a bunch of patches that get the code ready for OF support. o Lantiq and BCM47XX platform have a few improvements and bug fixes. o MIPS has sent a few patches that get the kernel ready for the upcoming microMIPS support. o The rest of the series is made up of small bug fixes and cleanups that relate to various parts of the MIPS code. The biggy in there is a whitespace cleanup. After I was sent another set of whitespace cleanup patches I decided it was the time to clean the whitespace "issues" for once and and that touches many files below arch/mips/. Fix up silly conflicts, mostly due to whitespace cleanups. * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (105 commits) MIPS: Quit exporting kernel internel break codes to uapi/asm/break.h MIPS: remove broken conditional inside vpe loader code MIPS: SMTC: fix implicit declaration of set_vi_handler MIPS: early_printk: drop __init annotations MIPS: Probe for and report hardware virtualization support. MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board MIPS: ath79: add USB controller registration code for the QCA955X SoCs MIPS: ath79: add PCI controller registration code for the QCA955X SoCs MIPS: ath79: add WMAC registration code for the QCA955X SoCs MIPS: ath79: register UART for the QCA955X SoCs MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear} MIPS: ath79: add GPIO setup code for the QCA955X SoCs MIPS: ath79: add IRQ handling code for the QCA955X SoCs MIPS: ath79: add clock setup code for the QCA955X SoCs MIPS: ath79: add SoC detection code for the QCA955X SoCs MIPS: ath79: add early printk support for the QCA955X SoCs MIPS: ath79: fix WMAC IRQ resource assignment mips: reserve elfcorehdr mips: Make sure kernel memory is in iomem MIPS: ath79: use dynamically allocated USB platform devices ...
Diffstat (limited to 'arch/mips/sni/pcimt.c')
-rw-r--r--arch/mips/sni/pcimt.c36
1 files changed, 18 insertions, 18 deletions
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index cdb1417fba59..cec4b8ca1438 100644
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -60,7 +60,7 @@ static inline void sni_pcimt_detect(void)
60 p += sprintf(p, "%s PCI", (csmsr & 0x80) ? "RM200" : "RM300"); 60 p += sprintf(p, "%s PCI", (csmsr & 0x80) ? "RM200" : "RM300");
61 if ((csmsr & 0x80) == 0) 61 if ((csmsr & 0x80) == 0)
62 p += sprintf(p, ", board revision %s", 62 p += sprintf(p, ", board revision %s",
63 (csmsr & 0x20) ? "D" : "C"); 63 (csmsr & 0x20) ? "D" : "C");
64 asic = csmsr & 0x80; 64 asic = csmsr & 0x80;
65 asic = (csmsr & 0x08) ? asic : !asic; 65 asic = (csmsr & 0x08) ? asic : !asic;
66 p += sprintf(p, ", ASIC PCI Rev %s", asic ? "1.0" : "1.1"); 66 p += sprintf(p, ", ASIC PCI Rev %s", asic ? "1.0" : "1.1");
@@ -91,22 +91,22 @@ static struct platform_device pcimt_serial8250_device = {
91}; 91};
92 92
93static struct resource pcimt_cmos_rsrc[] = { 93static struct resource pcimt_cmos_rsrc[] = {
94 { 94 {
95 .start = 0x70, 95 .start = 0x70,
96 .end = 0x71, 96 .end = 0x71,
97 .flags = IORESOURCE_IO 97 .flags = IORESOURCE_IO
98 }, 98 },
99 { 99 {
100 .start = 8, 100 .start = 8,
101 .end = 8, 101 .end = 8,
102 .flags = IORESOURCE_IRQ 102 .flags = IORESOURCE_IRQ
103 } 103 }
104}; 104};
105 105
106static struct platform_device pcimt_cmos_device = { 106static struct platform_device pcimt_cmos_device = {
107 .name = "rtc_cmos", 107 .name = "rtc_cmos",
108 .num_resources = ARRAY_SIZE(pcimt_cmos_rsrc), 108 .num_resources = ARRAY_SIZE(pcimt_cmos_rsrc),
109 .resource = pcimt_cmos_rsrc 109 .resource = pcimt_cmos_rsrc
110}; 110};
111 111
112 112
@@ -191,7 +191,7 @@ static struct pci_controller sni_controller = {
191 .mem_offset = 0x00000000UL, 191 .mem_offset = 0x00000000UL,
192 .io_resource = &sni_io_resource, 192 .io_resource = &sni_io_resource,
193 .io_offset = 0x00000000UL, 193 .io_offset = 0x00000000UL,
194 .io_map_base = SNI_PORT_BASE 194 .io_map_base = SNI_PORT_BASE
195}; 195};
196 196
197static void enable_pcimt_irq(struct irq_data *d) 197static void enable_pcimt_irq(struct irq_data *d)
@@ -319,9 +319,9 @@ static int __init snirm_pcimt_setup_devinit(void)
319 case SNI_BRD_PCI_MTOWER: 319 case SNI_BRD_PCI_MTOWER:
320 case SNI_BRD_PCI_DESKTOP: 320 case SNI_BRD_PCI_DESKTOP:
321 case SNI_BRD_PCI_MTOWER_CPLUS: 321 case SNI_BRD_PCI_MTOWER_CPLUS:
322 platform_device_register(&pcimt_serial8250_device); 322 platform_device_register(&pcimt_serial8250_device);
323 platform_device_register(&pcimt_cmos_device); 323 platform_device_register(&pcimt_cmos_device);
324 break; 324 break;
325 } 325 }
326 326
327 return 0; 327 return 0;