diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 06:53:32 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 06:53:32 -0500 |
commit | ed14bbb24e62830c2b4c59f4cea3696651d502f0 (patch) | |
tree | 2ad207db8f8a6ee82e4ee469ff2b7dc3453a5527 /arch/mips/sibyte | |
parent | 5772f6deb6214a94248e5429869e99e8b7b9cf25 (diff) |
MIPS: SB1480: Convert IRQ controller lock to raw spinlock.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sibyte')
-rw-r--r-- | arch/mips/sibyte/bcm1480/irq.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index fbea5e65c7ac..06e25d949768 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c | |||
@@ -73,14 +73,14 @@ static struct irq_chip bcm1480_irq_type = { | |||
73 | /* Store the CPU id (not the logical number) */ | 73 | /* Store the CPU id (not the logical number) */ |
74 | int bcm1480_irq_owner[BCM1480_NR_IRQS]; | 74 | int bcm1480_irq_owner[BCM1480_NR_IRQS]; |
75 | 75 | ||
76 | static DEFINE_SPINLOCK(bcm1480_imr_lock); | 76 | static DEFINE_RAW_SPINLOCK(bcm1480_imr_lock); |
77 | 77 | ||
78 | void bcm1480_mask_irq(int cpu, int irq) | 78 | void bcm1480_mask_irq(int cpu, int irq) |
79 | { | 79 | { |
80 | unsigned long flags, hl_spacing; | 80 | unsigned long flags, hl_spacing; |
81 | u64 cur_ints; | 81 | u64 cur_ints; |
82 | 82 | ||
83 | spin_lock_irqsave(&bcm1480_imr_lock, flags); | 83 | raw_spin_lock_irqsave(&bcm1480_imr_lock, flags); |
84 | hl_spacing = 0; | 84 | hl_spacing = 0; |
85 | if ((irq >= BCM1480_NR_IRQS_HALF) && (irq <= BCM1480_NR_IRQS)) { | 85 | if ((irq >= BCM1480_NR_IRQS_HALF) && (irq <= BCM1480_NR_IRQS)) { |
86 | hl_spacing = BCM1480_IMR_HL_SPACING; | 86 | hl_spacing = BCM1480_IMR_HL_SPACING; |
@@ -89,7 +89,7 @@ void bcm1480_mask_irq(int cpu, int irq) | |||
89 | cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); | 89 | cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); |
90 | cur_ints |= (((u64) 1) << irq); | 90 | cur_ints |= (((u64) 1) << irq); |
91 | ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); | 91 | ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); |
92 | spin_unlock_irqrestore(&bcm1480_imr_lock, flags); | 92 | raw_spin_unlock_irqrestore(&bcm1480_imr_lock, flags); |
93 | } | 93 | } |
94 | 94 | ||
95 | void bcm1480_unmask_irq(int cpu, int irq) | 95 | void bcm1480_unmask_irq(int cpu, int irq) |
@@ -97,7 +97,7 @@ void bcm1480_unmask_irq(int cpu, int irq) | |||
97 | unsigned long flags, hl_spacing; | 97 | unsigned long flags, hl_spacing; |
98 | u64 cur_ints; | 98 | u64 cur_ints; |
99 | 99 | ||
100 | spin_lock_irqsave(&bcm1480_imr_lock, flags); | 100 | raw_spin_lock_irqsave(&bcm1480_imr_lock, flags); |
101 | hl_spacing = 0; | 101 | hl_spacing = 0; |
102 | if ((irq >= BCM1480_NR_IRQS_HALF) && (irq <= BCM1480_NR_IRQS)) { | 102 | if ((irq >= BCM1480_NR_IRQS_HALF) && (irq <= BCM1480_NR_IRQS)) { |
103 | hl_spacing = BCM1480_IMR_HL_SPACING; | 103 | hl_spacing = BCM1480_IMR_HL_SPACING; |
@@ -106,7 +106,7 @@ void bcm1480_unmask_irq(int cpu, int irq) | |||
106 | cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); | 106 | cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); |
107 | cur_ints &= ~(((u64) 1) << irq); | 107 | cur_ints &= ~(((u64) 1) << irq); |
108 | ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); | 108 | ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); |
109 | spin_unlock_irqrestore(&bcm1480_imr_lock, flags); | 109 | raw_spin_unlock_irqrestore(&bcm1480_imr_lock, flags); |
110 | } | 110 | } |
111 | 111 | ||
112 | #ifdef CONFIG_SMP | 112 | #ifdef CONFIG_SMP |
@@ -123,7 +123,7 @@ static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
123 | cpu = cpu_logical_map(i); | 123 | cpu = cpu_logical_map(i); |
124 | 124 | ||
125 | /* Protect against other affinity changers and IMR manipulation */ | 125 | /* Protect against other affinity changers and IMR manipulation */ |
126 | spin_lock_irqsave(&bcm1480_imr_lock, flags); | 126 | raw_spin_lock_irqsave(&bcm1480_imr_lock, flags); |
127 | 127 | ||
128 | /* Swizzle each CPU's IMR (but leave the IP selection alone) */ | 128 | /* Swizzle each CPU's IMR (but leave the IP selection alone) */ |
129 | old_cpu = bcm1480_irq_owner[irq]; | 129 | old_cpu = bcm1480_irq_owner[irq]; |
@@ -148,7 +148,7 @@ static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
148 | ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING))); | 148 | ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING))); |
149 | } | 149 | } |
150 | } | 150 | } |
151 | spin_unlock_irqrestore(&bcm1480_imr_lock, flags); | 151 | raw_spin_unlock_irqrestore(&bcm1480_imr_lock, flags); |
152 | 152 | ||
153 | return 0; | 153 | return 0; |
154 | } | 154 | } |