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authorJohn W. Linville <linville@tuxdriver.com>2006-02-27 20:12:23 -0500
committerJohn W. Linville <linville@tuxdriver.com>2006-02-27 20:12:23 -0500
commit9f5a405b6843933c1cae5826046a5dd6357f142a (patch)
treebcdbb0175d37b780551b71c40abcde964a8905eb /arch/mips/sibyte
parentb7cffb028abbffff3ba0b87268ecb775ed354049 (diff)
parent051d3cbd96909b2fe6b5038e7bbe77f41356db05 (diff)
Merge branch 'from-linus'
Diffstat (limited to 'arch/mips/sibyte')
-rw-r--r--arch/mips/sibyte/Kconfig4
-rw-r--r--arch/mips/sibyte/bcm1480/irq.c5
-rw-r--r--arch/mips/sibyte/cfe/smp.c10
3 files changed, 11 insertions, 8 deletions
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index de46f62ac462..816aee7fcd25 100644
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -102,11 +102,11 @@ config SIMULATION
102 Build a kernel suitable for running under the GDB simulator. 102 Build a kernel suitable for running under the GDB simulator.
103 Primarily adjusts the kernel's notion of time. 103 Primarily adjusts the kernel's notion of time.
104 104
105config CONFIG_SB1_CEX_ALWAYS_FATAL 105config SB1_CEX_ALWAYS_FATAL
106 bool "All cache exceptions considered fatal (no recovery attempted)" 106 bool "All cache exceptions considered fatal (no recovery attempted)"
107 depends on SIBYTE_SB1xxx_SOC 107 depends on SIBYTE_SB1xxx_SOC
108 108
109config CONFIG_SB1_CERR_STALL 109config SB1_CERR_STALL
110 bool "Stall (rather than panic) on fatal cache error" 110 bool "Stall (rather than panic) on fatal cache error"
111 depends on SIBYTE_SB1xxx_SOC 111 depends on SIBYTE_SB1xxx_SOC
112 112
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index b2a1ba5d23df..9cf7d713b13c 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -139,7 +139,7 @@ void bcm1480_unmask_irq(int cpu, int irq)
139#ifdef CONFIG_SMP 139#ifdef CONFIG_SMP
140static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask) 140static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask)
141{ 141{
142 int i = 0, old_cpu, cpu, int_on; 142 int i = 0, old_cpu, cpu, int_on, k;
143 u64 cur_ints; 143 u64 cur_ints;
144 irq_desc_t *desc = irq_desc + irq; 144 irq_desc_t *desc = irq_desc + irq;
145 unsigned long flags; 145 unsigned long flags;
@@ -165,7 +165,6 @@ static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask)
165 irq_dirty -= BCM1480_NR_IRQS_HALF; 165 irq_dirty -= BCM1480_NR_IRQS_HALF;
166 } 166 }
167 167
168 int k;
169 for (k=0; k<2; k++) { /* Loop through high and low interrupt mask register */ 168 for (k=0; k<2; k++) { /* Loop through high and low interrupt mask register */
170 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(old_cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING))); 169 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(old_cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING)));
171 int_on = !(cur_ints & (((u64) 1) << irq_dirty)); 170 int_on = !(cur_ints & (((u64) 1) << irq_dirty));
@@ -216,6 +215,7 @@ static void ack_bcm1480_irq(unsigned int irq)
216{ 215{
217 u64 pending; 216 u64 pending;
218 unsigned int irq_dirty; 217 unsigned int irq_dirty;
218 int k;
219 219
220 /* 220 /*
221 * If the interrupt was an HT interrupt, now is the time to 221 * If the interrupt was an HT interrupt, now is the time to
@@ -227,7 +227,6 @@ static void ack_bcm1480_irq(unsigned int irq)
227 if ((irq_dirty >= BCM1480_NR_IRQS_HALF) && (irq_dirty <= BCM1480_NR_IRQS)) { 227 if ((irq_dirty >= BCM1480_NR_IRQS_HALF) && (irq_dirty <= BCM1480_NR_IRQS)) {
228 irq_dirty -= BCM1480_NR_IRQS_HALF; 228 irq_dirty -= BCM1480_NR_IRQS_HALF;
229 } 229 }
230 int k;
231 for (k=0; k<2; k++) { /* Loop through high and low LDT interrupts */ 230 for (k=0; k<2; k++) { /* Loop through high and low LDT interrupts */
232 pending = __raw_readq(IOADDR(A_BCM1480_IMR_REGISTER(bcm1480_irq_owner[irq], 231 pending = __raw_readq(IOADDR(A_BCM1480_IMR_REGISTER(bcm1480_irq_owner[irq],
233 R_BCM1480_IMR_LDT_INTERRUPT_H + (k*BCM1480_IMR_HL_SPACING)))); 232 R_BCM1480_IMR_LDT_INTERRUPT_H + (k*BCM1480_IMR_HL_SPACING))));
diff --git a/arch/mips/sibyte/cfe/smp.c b/arch/mips/sibyte/cfe/smp.c
index 4477af3d8074..eab20e2db323 100644
--- a/arch/mips/sibyte/cfe/smp.c
+++ b/arch/mips/sibyte/cfe/smp.c
@@ -31,7 +31,7 @@
31 * 31 *
32 * Common setup before any secondaries are started 32 * Common setup before any secondaries are started
33 */ 33 */
34void __init prom_prepare_cpus(unsigned int max_cpus) 34void __init plat_smp_setup(void)
35{ 35{
36 int i, num; 36 int i, num;
37 37
@@ -40,14 +40,18 @@ void __init prom_prepare_cpus(unsigned int max_cpus)
40 __cpu_number_map[0] = 0; 40 __cpu_number_map[0] = 0;
41 __cpu_logical_map[0] = 0; 41 __cpu_logical_map[0] = 0;
42 42
43 for (i=1, num=0; i<NR_CPUS; i++) { 43 for (i = 1, num = 0; i < NR_CPUS; i++) {
44 if (cfe_cpu_stop(i) == 0) { 44 if (cfe_cpu_stop(i) == 0) {
45 cpu_set(i, phys_cpu_present_map); 45 cpu_set(i, phys_cpu_present_map);
46 __cpu_number_map[i] = ++num; 46 __cpu_number_map[i] = ++num;
47 __cpu_logical_map[num] = i; 47 __cpu_logical_map[num] = i;
48 } 48 }
49 } 49 }
50 printk("Detected %i available secondary CPU(s)\n", num); 50 printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num);
51}
52
53void __init plat_prepare_cpus(unsigned int max_cpus)
54{
51} 55}
52 56
53/* 57/*