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authorRalf Baechle <ralf@linux-mips.org>2007-03-01 06:56:43 -0500
committerRalf Baechle <ralf@linux-mips.org>2007-03-04 14:02:37 -0500
commit36a885306fdf7bb557c773309c993bfb2d0d693c (patch)
tree643b246c90653c9451ff7fecff74a79c3de8042c /arch/mips/sibyte
parentca471c86043f4a8b01cba02ba2d3431fddcaf606 (diff)
[MIPS] Fix and cleanup the mess that a dozen prom_printf variants are.
early_printk is a so much saner thing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sibyte')
-rw-r--r--arch/mips/sibyte/Kconfig2
-rw-r--r--arch/mips/sibyte/bcm1480/irq.c2
-rw-r--r--arch/mips/sibyte/bcm1480/setup.c10
-rw-r--r--arch/mips/sibyte/cfe/setup.c8
-rw-r--r--arch/mips/sibyte/sb1250/setup.c24
5 files changed, 24 insertions, 22 deletions
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index ec7a2cffacf0..67dac6204b6d 100644
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -116,6 +116,7 @@ config SB1_CERR_STALL
116config SIBYTE_CFE 116config SIBYTE_CFE
117 bool "Booting from CFE" 117 bool "Booting from CFE"
118 depends on SIBYTE_SB1xxx_SOC 118 depends on SIBYTE_SB1xxx_SOC
119 select SYS_HAS_EARLY_PRINTK
119 help 120 help
120 Make use of the CFE API for enumerating available memory, 121 Make use of the CFE API for enumerating available memory,
121 controlling secondary CPUs, and possibly console output. 122 controlling secondary CPUs, and possibly console output.
@@ -131,6 +132,7 @@ config SIBYTE_CFE_CONSOLE
131config SIBYTE_STANDALONE 132config SIBYTE_STANDALONE
132 bool 133 bool
133 depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE 134 depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
135 select SYS_HAS_EARLY_PRINTK
134 default y 136 default y
135 137
136config SIBYTE_STANDALONE_RAM_SIZE 138config SIBYTE_STANDALONE_RAM_SIZE
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index 1dc5d05d8962..20af0f1bb7bf 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -420,7 +420,7 @@ void __init arch_init_irq(void)
420#ifdef CONFIG_GDB_CONSOLE 420#ifdef CONFIG_GDB_CONSOLE
421 register_gdb_console(); 421 register_gdb_console();
422#endif 422#endif
423 prom_printf("Waiting for GDB on UART port %d\n", kgdb_port); 423 printk("Waiting for GDB on UART port %d\n", kgdb_port);
424 set_debug_traps(); 424 set_debug_traps();
425 breakpoint(); 425 breakpoint();
426 } 426 }
diff --git a/arch/mips/sibyte/bcm1480/setup.c b/arch/mips/sibyte/bcm1480/setup.c
index 8236d0c48542..bdaac34ae708 100644
--- a/arch/mips/sibyte/bcm1480/setup.c
+++ b/arch/mips/sibyte/bcm1480/setup.c
@@ -69,7 +69,7 @@ static inline int sys_rev_decode(void)
69 break; 69 break;
70 70
71 default: 71 default:
72 prom_printf("Unknown part type %x\n", part_type); 72 printk("Unknown part type %x\n", part_type);
73 ret = 1; 73 ret = 1;
74 break; 74 break;
75 } 75 }
@@ -102,7 +102,7 @@ static inline int setup_bcm1x80_bcm1x55(void)
102 pass_str = "B0 (pass2)"; 102 pass_str = "B0 (pass2)";
103 break; 103 break;
104 default: 104 default:
105 prom_printf("Unknown %s rev %x\n", soc_str, soc_pass); 105 printk("Unknown %s rev %x\n", soc_str, soc_pass);
106 periph_rev = 1; 106 periph_rev = 1;
107 pass_str = "Unknown Revision"; 107 pass_str = "Unknown Revision";
108 break; 108 break;
@@ -122,14 +122,14 @@ void bcm1480_setup(void)
122 soc_pass = G_SYS_REVISION(sys_rev); 122 soc_pass = G_SYS_REVISION(sys_rev);
123 123
124 if (sys_rev_decode()) { 124 if (sys_rev_decode()) {
125 prom_printf("Restart after failure to identify SiByte chip\n"); 125 printk("Restart after failure to identify SiByte chip\n");
126 machine_restart(NULL); 126 machine_restart(NULL);
127 } 127 }
128 128
129 plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); 129 plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
130 zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25); 130 zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
131 131
132 prom_printf("Broadcom SiByte %s %s @ %d MHz (SB-1A rev %d)\n", 132 printk("Broadcom SiByte %s %s @ %d MHz (SB-1A rev %d)\n",
133 soc_str, pass_str, zbbus_mhz * 2, sb1_pass); 133 soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
134 prom_printf("Board type: %s\n", get_system_type()); 134 printk("Board type: %s\n", get_system_type());
135} 135}
diff --git a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c
index 9e6099e69622..ae4a92c3e529 100644
--- a/arch/mips/sibyte/cfe/setup.c
+++ b/arch/mips/sibyte/cfe/setup.c
@@ -221,10 +221,10 @@ static int __init initrd_setup(char *str)
221 goto fail; 221 goto fail;
222 } 222 }
223 initrd_end = initrd_start + initrd_size; 223 initrd_end = initrd_start + initrd_size;
224 prom_printf("Found initrd of %lx@%lx\n", initrd_size, initrd_start); 224 printk("Found initrd of %lx@%lx\n", initrd_size, initrd_start);
225 return 1; 225 return 1;
226 fail: 226 fail:
227 prom_printf("Bad initrd argument. Disabling initrd\n"); 227 printk("Bad initrd argument. Disabling initrd\n");
228 initrd_start = 0; 228 initrd_start = 0;
229 initrd_end = 0; 229 initrd_end = 0;
230 return 1; 230 return 1;
@@ -281,7 +281,7 @@ void __init prom_init(void)
281 } 281 }
282 if (cfe_eptseal != CFE_EPTSEAL) { 282 if (cfe_eptseal != CFE_EPTSEAL) {
283 /* too early for panic to do any good */ 283 /* too early for panic to do any good */
284 prom_printf("CFE's entrypoint seal doesn't match. Spinning."); 284 printk("CFE's entrypoint seal doesn't match. Spinning.");
285 while (1) ; 285 while (1) ;
286 } 286 }
287 cfe_init(cfe_handle, cfe_ept); 287 cfe_init(cfe_handle, cfe_ept);
@@ -303,7 +303,7 @@ void __init prom_init(void)
303 } else { 303 } else {
304 /* The loader should have set the command line */ 304 /* The loader should have set the command line */
305 /* too early for panic to do any good */ 305 /* too early for panic to do any good */
306 prom_printf("LINUX_CMDLINE not defined in cfe."); 306 printk("LINUX_CMDLINE not defined in cfe.");
307 while (1) ; 307 while (1) ;
308 } 308 }
309 } 309 }
diff --git a/arch/mips/sibyte/sb1250/setup.c b/arch/mips/sibyte/sb1250/setup.c
index d0ee1d5b8223..1cb042eab720 100644
--- a/arch/mips/sibyte/sb1250/setup.c
+++ b/arch/mips/sibyte/sb1250/setup.c
@@ -67,7 +67,7 @@ static int __init sys_rev_decode(void)
67 ret = setup_bcm112x(); 67 ret = setup_bcm112x();
68 break; 68 break;
69 default: 69 default:
70 prom_printf("Unknown SOC type %x\n", soc_type); 70 printk("Unknown SOC type %x\n", soc_type);
71 ret = 1; 71 ret = 1;
72 break; 72 break;
73 } 73 }
@@ -112,7 +112,7 @@ static int __init setup_bcm1250(void)
112 pass_str = "A0-A6"; 112 pass_str = "A0-A6";
113 war_pass = K_SYS_REVISION_BCM1250_PASS2; 113 war_pass = K_SYS_REVISION_BCM1250_PASS2;
114 } else { 114 } else {
115 prom_printf("Unknown BCM1250 rev %x\n", soc_pass); 115 printk("Unknown BCM1250 rev %x\n", soc_pass);
116 ret = 1; 116 ret = 1;
117 } 117 }
118 break; 118 break;
@@ -140,7 +140,7 @@ static int __init setup_bcm112x(void)
140 pass_str = "A2"; 140 pass_str = "A2";
141 break; 141 break;
142 default: 142 default:
143 prom_printf("Unknown %s rev %x\n", soc_str, soc_pass); 143 printk("Unknown %s rev %x\n", soc_str, soc_pass);
144 ret = 1; 144 ret = 1;
145 } 145 }
146 return ret; 146 return ret;
@@ -158,21 +158,21 @@ void __init sb1250_setup(void)
158 soc_pass = G_SYS_REVISION(sys_rev); 158 soc_pass = G_SYS_REVISION(sys_rev);
159 159
160 if (sys_rev_decode()) { 160 if (sys_rev_decode()) {
161 prom_printf("Restart after failure to identify SiByte chip\n"); 161 printk("Restart after failure to identify SiByte chip\n");
162 machine_restart(NULL); 162 machine_restart(NULL);
163 } 163 }
164 164
165 plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); 165 plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
166 zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25); 166 zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
167 167
168 prom_printf("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n", 168 printk("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
169 soc_str, pass_str, zbbus_mhz * 2, sb1_pass); 169 soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
170 prom_printf("Board type: %s\n", get_system_type()); 170 printk("Board type: %s\n", get_system_type());
171 171
172 switch (war_pass) { 172 switch (war_pass) {
173 case K_SYS_REVISION_BCM1250_PASS1: 173 case K_SYS_REVISION_BCM1250_PASS1:
174#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS 174#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
175 prom_printf("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, " 175 printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, "
176 "and the kernel doesn't have the proper " 176 "and the kernel doesn't have the proper "
177 "workarounds compiled in. @@@@\n"); 177 "workarounds compiled in. @@@@\n");
178 bad_config = 1; 178 bad_config = 1;
@@ -182,27 +182,27 @@ void __init sb1250_setup(void)
182 /* Pass 2 - easiest as default for now - so many numbers */ 182 /* Pass 2 - easiest as default for now - so many numbers */
183#if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) || \ 183#if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) || \
184 !defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) 184 !defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS)
185 prom_printf("@@@@ This is a BCM1250 A3-A10 board, and the " 185 printk("@@@@ This is a BCM1250 A3-A10 board, and the "
186 "kernel doesn't have the proper workarounds " 186 "kernel doesn't have the proper workarounds "
187 "compiled in. @@@@\n"); 187 "compiled in. @@@@\n");
188 bad_config = 1; 188 bad_config = 1;
189#endif 189#endif
190#ifdef CONFIG_CPU_HAS_PREFETCH 190#ifdef CONFIG_CPU_HAS_PREFETCH
191 prom_printf("@@@@ Prefetches may be enabled in this kernel, " 191 printk("@@@@ Prefetches may be enabled in this kernel, "
192 "but are buggy on this board. @@@@\n"); 192 "but are buggy on this board. @@@@\n");
193 bad_config = 1; 193 bad_config = 1;
194#endif 194#endif
195 break; 195 break;
196 case K_SYS_REVISION_BCM1250_PASS2_2: 196 case K_SYS_REVISION_BCM1250_PASS2_2:
197#ifndef CONFIG_SB1_PASS_2_WORKAROUNDS 197#ifndef CONFIG_SB1_PASS_2_WORKAROUNDS
198 prom_printf("@@@@ This is a BCM1250 B1/B2. board, and the " 198 printk("@@@@ This is a BCM1250 B1/B2. board, and the "
199 "kernel doesn't have the proper workarounds " 199 "kernel doesn't have the proper workarounds "
200 "compiled in. @@@@\n"); 200 "compiled in. @@@@\n");
201 bad_config = 1; 201 bad_config = 1;
202#endif 202#endif
203#if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) || \ 203#if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) || \
204 !defined(CONFIG_CPU_HAS_PREFETCH) 204 !defined(CONFIG_CPU_HAS_PREFETCH)
205 prom_printf("@@@@ This is a BCM1250 B1/B2, but the kernel is " 205 printk("@@@@ This is a BCM1250 B1/B2, but the kernel is "
206 "conservatively configured for an 'A' stepping. " 206 "conservatively configured for an 'A' stepping. "
207 "@@@@\n"); 207 "@@@@\n");
208#endif 208#endif
@@ -211,7 +211,7 @@ void __init sb1250_setup(void)
211 break; 211 break;
212 } 212 }
213 if (bad_config) { 213 if (bad_config) {
214 prom_printf("Invalid configuration for this chip.\n"); 214 printk("Invalid configuration for this chip.\n");
215 machine_restart(NULL); 215 machine_restart(NULL);
216 } 216 }
217} 217}