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authorRalf Baechle <ralf@linux-mips.org>2007-10-28 19:02:46 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-29 15:35:35 -0400
commit11ca25aa312d912c192ccfd5781669d794126118 (patch)
tree256dc4788bb96e4e557894fdff1673484076a1de /arch/mips/sibyte
parent229f773ef4ee852ad7bfbe8e1238a2c35b2baa6f (diff)
[MIPS] Sibyte: Delete {sb1250,bcm1480}_steal_irq().
They break the timer interrupt initialization and only seem to be a kludge for initialization happening in the wrong order. Further testing done by Thiemo confirms the suspicion that the other invocations also seem to have useless. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sibyte')
-rw-r--r--arch/mips/sibyte/bcm1480/irq.c24
-rw-r--r--arch/mips/sibyte/bcm1480/time.c3
-rw-r--r--arch/mips/sibyte/sb1250/irq.c24
-rw-r--r--arch/mips/sibyte/sb1250/time.c3
4 files changed, 0 insertions, 54 deletions
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index 10299bafeab7..61790c4bfb60 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -280,27 +280,6 @@ static struct irqaction bcm1480_dummy_action = {
280 .dev_id = 0 280 .dev_id = 0
281}; 281};
282 282
283int bcm1480_steal_irq(int irq)
284{
285 struct irq_desc *desc = irq_desc + irq;
286 unsigned long flags;
287 int retval = 0;
288
289 if (irq >= BCM1480_NR_IRQS)
290 return -EINVAL;
291
292 spin_lock_irqsave(&desc->lock, flags);
293 /* Don't allow sharing at all for these */
294 if (desc->action != NULL)
295 retval = -EBUSY;
296 else {
297 desc->action = &bcm1480_dummy_action;
298 desc->depth = 0;
299 }
300 spin_unlock_irqrestore(&desc->lock, flags);
301 return 0;
302}
303
304/* 283/*
305 * init_IRQ is called early in the boot sequence from init/main.c. It 284 * init_IRQ is called early in the boot sequence from init/main.c. It
306 * is responsible for setting up the interrupt mapper and installing the 285 * is responsible for setting up the interrupt mapper and installing the
@@ -386,8 +365,6 @@ void __init arch_init_irq(void)
386 __raw_writeq(tmp, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MASK_L))); 365 __raw_writeq(tmp, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MASK_L)));
387 } 366 }
388 367
389 bcm1480_steal_irq(K_BCM1480_INT_MBOX_0_0);
390
391 /* 368 /*
392 * Note that the timer interrupts are also mapped, but this is 369 * Note that the timer interrupts are also mapped, but this is
393 * done in bcm1480_time_init(). Also, the profiling driver 370 * done in bcm1480_time_init(). Also, the profiling driver
@@ -411,7 +388,6 @@ void __init arch_init_irq(void)
411 /* QQQ FIXME */ 388 /* QQQ FIXME */
412 __raw_writeq(M_DUART_IMR_BRK, IO_SPACE_BASE + A_DUART_IMRREG(kgdb_port)); 389 __raw_writeq(M_DUART_IMR_BRK, IO_SPACE_BASE + A_DUART_IMRREG(kgdb_port));
413 390
414 bcm1480_steal_irq(kgdb_irq);
415 __raw_writeq(IMR_IP6_VAL, 391 __raw_writeq(IMR_IP6_VAL,
416 IO_SPACE_BASE + A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) + 392 IO_SPACE_BASE + A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) +
417 (kgdb_irq<<3)); 393 (kgdb_irq<<3));
diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c
index 610f0253954d..699b5d242dd8 100644
--- a/arch/mips/sibyte/bcm1480/time.c
+++ b/arch/mips/sibyte/bcm1480/time.c
@@ -37,8 +37,6 @@
37#define IMR_IP3_VAL K_BCM1480_INT_MAP_I1 37#define IMR_IP3_VAL K_BCM1480_INT_MAP_I1
38#define IMR_IP4_VAL K_BCM1480_INT_MAP_I2 38#define IMR_IP4_VAL K_BCM1480_INT_MAP_I2
39 39
40extern int bcm1480_steal_irq(int irq);
41
42/* 40/*
43 * The general purpose timer ticks at 1MHz independent if 41 * The general purpose timer ticks at 1MHz independent if
44 * the rest of the system 42 * the rest of the system
@@ -142,7 +140,6 @@ void __cpuinit sb1480_clockevent_init(void)
142 R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) + (irq << 3))); 140 R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) + (irq << 3)));
143 141
144 bcm1480_unmask_irq(cpu, irq); 142 bcm1480_unmask_irq(cpu, irq);
145 bcm1480_steal_irq(irq);
146 143
147 action->handler = sibyte_counter_handler; 144 action->handler = sibyte_counter_handler;
148 action->flags = IRQF_DISABLED | IRQF_PERCPU; 145 action->flags = IRQF_DISABLED | IRQF_PERCPU;
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index 53780a179d1d..52d18fc91f32 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -250,27 +250,6 @@ static struct irqaction sb1250_dummy_action = {
250 .dev_id = 0 250 .dev_id = 0
251}; 251};
252 252
253int sb1250_steal_irq(int irq)
254{
255 struct irq_desc *desc = irq_desc + irq;
256 unsigned long flags;
257 int retval = 0;
258
259 if (irq >= SB1250_NR_IRQS)
260 return -EINVAL;
261
262 spin_lock_irqsave(&desc->lock, flags);
263 /* Don't allow sharing at all for these */
264 if (desc->action != NULL)
265 retval = -EBUSY;
266 else {
267 desc->action = &sb1250_dummy_action;
268 desc->depth = 0;
269 }
270 spin_unlock_irqrestore(&desc->lock, flags);
271 return 0;
272}
273
274/* 253/*
275 * arch_init_irq is called early in the boot sequence from init/main.c via 254 * arch_init_irq is called early in the boot sequence from init/main.c via
276 * init_IRQ. It is responsible for setting up the interrupt mapper and 255 * init_IRQ. It is responsible for setting up the interrupt mapper and
@@ -342,8 +321,6 @@ void __init arch_init_irq(void)
342 __raw_writeq(tmp, IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MASK))); 321 __raw_writeq(tmp, IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MASK)));
343 __raw_writeq(tmp, IOADDR(A_IMR_REGISTER(1, R_IMR_INTERRUPT_MASK))); 322 __raw_writeq(tmp, IOADDR(A_IMR_REGISTER(1, R_IMR_INTERRUPT_MASK)));
344 323
345 sb1250_steal_irq(K_INT_MBOX_0);
346
347 /* 324 /*
348 * Note that the timer interrupts are also mapped, but this is 325 * Note that the timer interrupts are also mapped, but this is
349 * done in sb1250_time_init(). Also, the profiling driver 326 * done in sb1250_time_init(). Also, the profiling driver
@@ -367,7 +344,6 @@ void __init arch_init_irq(void)
367 __raw_writeq(M_DUART_IMR_BRK, 344 __raw_writeq(M_DUART_IMR_BRK,
368 IOADDR(A_DUART_IMRREG(kgdb_port))); 345 IOADDR(A_DUART_IMRREG(kgdb_port)));
369 346
370 sb1250_steal_irq(kgdb_irq);
371 __raw_writeq(IMR_IP6_VAL, 347 __raw_writeq(IMR_IP6_VAL,
372 IOADDR(A_IMR_REGISTER(0, 348 IOADDR(A_IMR_REGISTER(0,
373 R_IMR_INTERRUPT_MAP_BASE) + 349 R_IMR_INTERRUPT_MAP_BASE) +
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
index a41e908bc218..f7f455a58874 100644
--- a/arch/mips/sibyte/sb1250/time.c
+++ b/arch/mips/sibyte/sb1250/time.c
@@ -50,8 +50,6 @@
50#define SB1250_HPT_VALUE M_SCD_TIMER_CNT /* max value */ 50#define SB1250_HPT_VALUE M_SCD_TIMER_CNT /* max value */
51 51
52 52
53extern int sb1250_steal_irq(int irq);
54
55/* 53/*
56 * The general purpose timer ticks at 1 Mhz independent if 54 * The general purpose timer ticks at 1 Mhz independent if
57 * the rest of the system 55 * the rest of the system
@@ -159,7 +157,6 @@ void __cpuinit sb1250_clockevent_init(void)
159 cd->cpumask = cpumask_of_cpu(0); 157 cd->cpumask = cpumask_of_cpu(0);
160 158
161 sb1250_unmask_irq(cpu, irq); 159 sb1250_unmask_irq(cpu, irq);
162 sb1250_steal_irq(irq);
163 160
164 action->handler = sibyte_counter_handler; 161 action->handler = sibyte_counter_handler;
165 action->flags = IRQF_DISABLED | IRQF_PERCPU; 162 action->flags = IRQF_DISABLED | IRQF_PERCPU;