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authorRalf Baechle <ralf@linux-mips.org>2007-10-11 18:46:09 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-11 18:46:09 -0400
commit91a2fcc88634663e9e13dcdfad0e4a860e64aeee (patch)
treea86b936f1057207d46e5a07ed826052ff640869a /arch/mips/sibyte
parent90b02340dcc6ce00bf22c48f4865915f5989e5e4 (diff)
[MIPS] Consolidate all variants of MIPS cp0 timer interrupt handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sibyte')
-rw-r--r--arch/mips/sibyte/bcm1480/time.c13
-rw-r--r--arch/mips/sibyte/sb1250/time.c13
2 files changed, 2 insertions, 24 deletions
diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c
index 6f3f71bf4244..8519091d848b 100644
--- a/arch/mips/sibyte/bcm1480/time.c
+++ b/arch/mips/sibyte/bcm1480/time.c
@@ -103,18 +103,7 @@ void bcm1480_timer_interrupt(void)
103 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS, 103 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
104 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 104 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
105 105
106 if (cpu == 0) { 106 ll_timer_interrupt(irq);
107 /*
108 * CPU 0 handles the global timer interrupt job
109 */
110 ll_timer_interrupt(irq);
111 }
112 else {
113 /*
114 * other CPUs should just do profiling and process accounting
115 */
116 ll_local_timer_interrupt(irq);
117 }
118} 107}
119 108
120static cycle_t bcm1480_hpt_read(void) 109static cycle_t bcm1480_hpt_read(void)
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
index 2efffe15ff23..5bb83cd4c113 100644
--- a/arch/mips/sibyte/sb1250/time.c
+++ b/arch/mips/sibyte/sb1250/time.c
@@ -125,18 +125,7 @@ void sb1250_timer_interrupt(void)
125 ____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, 125 ____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
126 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 126 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
127 127
128 if (cpu == 0) { 128 ll_timer_interrupt(irq);
129 /*
130 * CPU 0 handles the global timer interrupt job
131 */
132 ll_timer_interrupt(irq);
133 }
134 else {
135 /*
136 * other CPUs should just do profiling and process accounting
137 */
138 ll_local_timer_interrupt(irq);
139 }
140} 129}
141 130
142/* 131/*