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authorRalf Baechle <ralf@linux-mips.org>2005-09-03 18:56:17 -0400
committerLinus Torvalds <torvalds@evo.osdl.org>2005-09-05 03:06:07 -0400
commit42a3b4f25af8f8d77feddf27f839fa0628dbff1a (patch)
tree332370ff3889fabb66a45fb5dcf605b142de77c8 /arch/mips/sibyte
parent875d43e72b5bf22161a81de7554f88eccf8a51ae (diff)
[PATCH] mips: nuke trailing whitespace
Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/mips/sibyte')
-rw-r--r--arch/mips/sibyte/cfe/cfe_error.h10
-rw-r--r--arch/mips/sibyte/cfe/console.c2
-rw-r--r--arch/mips/sibyte/cfe/setup.c2
-rw-r--r--arch/mips/sibyte/cfe/smp.c2
-rw-r--r--arch/mips/sibyte/sb1250/bus_watcher.c6
-rw-r--r--arch/mips/sibyte/sb1250/irq.c4
-rw-r--r--arch/mips/sibyte/swarm/rtc_m41t81.c10
-rw-r--r--arch/mips/sibyte/swarm/setup.c2
8 files changed, 19 insertions, 19 deletions
diff --git a/arch/mips/sibyte/cfe/cfe_error.h b/arch/mips/sibyte/cfe/cfe_error.h
index 77eb4935bfb4..975f00002cbe 100644
--- a/arch/mips/sibyte/cfe/cfe_error.h
+++ b/arch/mips/sibyte/cfe/cfe_error.h
@@ -17,15 +17,15 @@
17 */ 17 */
18 18
19/* ********************************************************************* 19/* *********************************************************************
20 * 20 *
21 * Broadcom Common Firmware Environment (CFE) 21 * Broadcom Common Firmware Environment (CFE)
22 * 22 *
23 * Error codes File: cfe_error.h 23 * Error codes File: cfe_error.h
24 * 24 *
25 * CFE's global error code list is here. 25 * CFE's global error code list is here.
26 * 26 *
27 * Author: Mitch Lichtenberg 27 * Author: Mitch Lichtenberg
28 * 28 *
29 ********************************************************************* */ 29 ********************************************************************* */
30 30
31 31
diff --git a/arch/mips/sibyte/cfe/console.c b/arch/mips/sibyte/cfe/console.c
index 53a5c1eb5611..7721100d0275 100644
--- a/arch/mips/sibyte/cfe/console.c
+++ b/arch/mips/sibyte/cfe/console.c
@@ -38,7 +38,7 @@ static void cfe_console_write(struct console *cons, const char *str,
38 last += written; 38 last += written;
39 } while (last < count); 39 } while (last < count);
40 } 40 }
41 41
42} 42}
43 43
44static int cfe_console_setup(struct console *cons, char *str) 44static int cfe_console_setup(struct console *cons, char *str)
diff --git a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c
index d86943f9d812..7a2c7a8510d4 100644
--- a/arch/mips/sibyte/cfe/setup.c
+++ b/arch/mips/sibyte/cfe/setup.c
@@ -285,7 +285,7 @@ void __init prom_init(void)
285 while (1) ; 285 while (1) ;
286 } 286 }
287 cfe_init(cfe_handle, cfe_ept); 287 cfe_init(cfe_handle, cfe_ept);
288 /* 288 /*
289 * Get the handle for (at least) prom_putchar, possibly for 289 * Get the handle for (at least) prom_putchar, possibly for
290 * boot console 290 * boot console
291 */ 291 */
diff --git a/arch/mips/sibyte/cfe/smp.c b/arch/mips/sibyte/cfe/smp.c
index 73392190d2b1..e44ce1a9eea9 100644
--- a/arch/mips/sibyte/cfe/smp.c
+++ b/arch/mips/sibyte/cfe/smp.c
@@ -57,7 +57,7 @@ void __init prom_prepare_cpus(unsigned int max_cpus)
57void prom_boot_secondary(int cpu, struct task_struct *idle) 57void prom_boot_secondary(int cpu, struct task_struct *idle)
58{ 58{
59 int retval; 59 int retval;
60 60
61 retval = cfe_cpu_start(cpu_logical_map(cpu), &smp_bootstrap, 61 retval = cfe_cpu_start(cpu_logical_map(cpu), &smp_bootstrap,
62 __KSTK_TOS(idle), 62 __KSTK_TOS(idle),
63 (unsigned long)idle->thread_info, 0); 63 (unsigned long)idle->thread_info, 0);
diff --git a/arch/mips/sibyte/sb1250/bus_watcher.c b/arch/mips/sibyte/sb1250/bus_watcher.c
index 182a16f42e2d..1a97e3127aeb 100644
--- a/arch/mips/sibyte/sb1250/bus_watcher.c
+++ b/arch/mips/sibyte/sb1250/bus_watcher.c
@@ -10,13 +10,13 @@
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 * 13 *
14 * You should have received a copy of the GNU General Public License 14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */ 17 */
18 18
19/* 19/*
20 * The Bus Watcher monitors internal bus transactions and maintains 20 * The Bus Watcher monitors internal bus transactions and maintains
21 * counts of transactions with error status, logging details and 21 * counts of transactions with error status, logging details and
22 * causing one of several interrupts. This driver provides a handler 22 * causing one of several interrupts. This driver provides a handler
@@ -155,7 +155,7 @@ static int bw_read_proc(char *page, char **start, off_t off,
155static void create_proc_decoder(struct bw_stats_struct *stats) 155static void create_proc_decoder(struct bw_stats_struct *stats)
156{ 156{
157 struct proc_dir_entry *ent; 157 struct proc_dir_entry *ent;
158 158
159 ent = create_proc_read_entry("bus_watcher", S_IWUSR | S_IRUGO, NULL, 159 ent = create_proc_read_entry("bus_watcher", S_IWUSR | S_IRUGO, NULL,
160 bw_read_proc, stats); 160 bw_read_proc, stats);
161 if (!ent) { 161 if (!ent) {
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index 2728abbc94d2..2725b263cced 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -377,7 +377,7 @@ void __init arch_init_irq(void)
377 377
378 /* 378 /*
379 * Note that the timer interrupts are also mapped, but this is 379 * Note that the timer interrupts are also mapped, but this is
380 * done in sb1250_time_init(). Also, the profiling driver 380 * done in sb1250_time_init(). Also, the profiling driver
381 * does its own management of IP7. 381 * does its own management of IP7.
382 */ 382 */
383 383
@@ -392,7 +392,7 @@ void __init arch_init_irq(void)
392 if (kgdb_flag) { 392 if (kgdb_flag) {
393 kgdb_irq = K_INT_UART_0 + kgdb_port; 393 kgdb_irq = K_INT_UART_0 + kgdb_port;
394 394
395#ifdef CONFIG_SIBYTE_SB1250_DUART 395#ifdef CONFIG_SIBYTE_SB1250_DUART
396 sb1250_duart_present[kgdb_port] = 0; 396 sb1250_duart_present[kgdb_port] = 0;
397#endif 397#endif
398 /* Setup uart 1 settings, mapper */ 398 /* Setup uart 1 settings, mapper */
diff --git a/arch/mips/sibyte/swarm/rtc_m41t81.c b/arch/mips/sibyte/swarm/rtc_m41t81.c
index 0e633ee8d83c..a686bb716ec6 100644
--- a/arch/mips/sibyte/swarm/rtc_m41t81.c
+++ b/arch/mips/sibyte/swarm/rtc_m41t81.c
@@ -128,7 +128,7 @@ static int m41t81_write(uint8_t addr, int b)
128 /* Clear error bit by writing a 1 */ 128 /* Clear error bit by writing a 1 */
129 bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); 129 bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
130 return -1; 130 return -1;
131 } 131 }
132 132
133 /* read the same byte again to make sure it is written */ 133 /* read the same byte again to make sure it is written */
134 bus_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE, 134 bus_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
@@ -136,7 +136,7 @@ static int m41t81_write(uint8_t addr, int b)
136 136
137 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 137 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
138 ; 138 ;
139 139
140 return 0; 140 return 0;
141} 141}
142 142
@@ -148,13 +148,13 @@ int m41t81_set_time(unsigned long t)
148 148
149 /* 149 /*
150 * Note the write order matters as it ensures the correctness. 150 * Note the write order matters as it ensures the correctness.
151 * When we write sec, 10th sec is clear. It is reasonable to 151 * When we write sec, 10th sec is clear. It is reasonable to
152 * believe we should finish writing min within a second. 152 * believe we should finish writing min within a second.
153 */ 153 */
154 154
155 tm.tm_sec = BIN2BCD(tm.tm_sec); 155 tm.tm_sec = BIN2BCD(tm.tm_sec);
156 m41t81_write(M41T81REG_SC, tm.tm_sec); 156 m41t81_write(M41T81REG_SC, tm.tm_sec);
157 157
158 tm.tm_min = BIN2BCD(tm.tm_min); 158 tm.tm_min = BIN2BCD(tm.tm_min);
159 m41t81_write(M41T81REG_MN, tm.tm_min); 159 m41t81_write(M41T81REG_MN, tm.tm_min);
160 160
@@ -187,7 +187,7 @@ unsigned long m41t81_get_time(void)
187{ 187{
188 unsigned int year, mon, day, hour, min, sec; 188 unsigned int year, mon, day, hour, min, sec;
189 189
190 /* 190 /*
191 * min is valid if two reads of sec are the same. 191 * min is valid if two reads of sec are the same.
192 */ 192 */
193 for (;;) { 193 for (;;) {
diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c
index 4742e4fc89f7..4daeaa413def 100644
--- a/arch/mips/sibyte/swarm/setup.c
+++ b/arch/mips/sibyte/swarm/setup.c
@@ -98,7 +98,7 @@ static int __init swarm_setup(void)
98 rtc_get_time = xicor_get_time; 98 rtc_get_time = xicor_get_time;
99 rtc_set_time = xicor_set_time; 99 rtc_set_time = xicor_set_time;
100 } 100 }
101 101
102 if (m41t81_probe()) { 102 if (m41t81_probe()) {
103 printk("swarm setup: M41T81 RTC detected.\n"); 103 printk("swarm setup: M41T81 RTC detected.\n");
104 rtc_get_time = m41t81_get_time; 104 rtc_get_time = m41t81_get_time;