[MIPS] Consolidate all variants of MIPS cp0 timer interrupt handlers.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 1 insertions, 12 deletions

diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
index 2efffe15ff23..5bb83cd4c113 100644
--- a/arch/mips/sibyte/sb1250/time.c
+++ b/arch/mips/sibyte/sb1250/time.c
@@ -125,18 +125,7 @@ void sb1250_timer_interrupt(void)
         ____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
                        IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
 
-        if (cpu == 0) {
-                /*
-                 * CPU 0 handles the global timer interrupt job
-                 */
-                ll_timer_interrupt(irq);
-        }
-        else {
-                /*
-                 * other CPUs should just do profiling and process accounting
-                 */
-                ll_local_timer_interrupt(irq);
-        }
+        ll_timer_interrupt(irq);
 }
 
 /*