diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2005-02-03 09:28:23 -0500 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 14:30:23 -0400 |
commit | 38b18f72587422450bd01695b471b3ae2ff4b169 (patch) | |
tree | 83485240e1bfcd80c7a8c368844e541a826fc7ba /arch/mips/sibyte/Kconfig | |
parent | db89a48c1f2fa9197404ca511d9df808196ca25d (diff) |
Move Sibyte Kconfig stuff into it's own Kconfig.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sibyte/Kconfig')
-rw-r--r-- | arch/mips/sibyte/Kconfig | 143 |
1 files changed, 143 insertions, 0 deletions
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig new file mode 100644 index 000000000000..3618d61f004a --- /dev/null +++ b/arch/mips/sibyte/Kconfig | |||
@@ -0,0 +1,143 @@ | |||
1 | config SIBYTE_SB1250 | ||
2 | bool | ||
3 | select HW_HAS_PCI | ||
4 | select SIBYTE_HAS_LDT | ||
5 | select SIBYTE_SB1xxx_SOC | ||
6 | |||
7 | config SIBYTE_BCM1120 | ||
8 | bool | ||
9 | select SIBYTE_BCM112X | ||
10 | select SIBYTE_SB1xxx_SOC | ||
11 | |||
12 | config SIBYTE_BCM1125 | ||
13 | bool | ||
14 | select HW_HAS_PCI | ||
15 | select SIBYTE_BCM112X | ||
16 | select SIBYTE_SB1xxx_SOC | ||
17 | |||
18 | config SIBYTE_BCM1125H | ||
19 | bool | ||
20 | select HW_HAS_PCI | ||
21 | select SIBYTE_BCM112X | ||
22 | select SIBYTE_HAS_LDT | ||
23 | select SIBYTE_SB1xxx_SOC | ||
24 | |||
25 | config SIBYTE_BCM112X | ||
26 | bool | ||
27 | select SIBYTE_SB1xxx_SOC | ||
28 | |||
29 | config SIBYTE_SB1xxx_SOC | ||
30 | bool | ||
31 | depends on EXPERIMENTAL | ||
32 | select DMA_COHERENT | ||
33 | select SIBYTE_CFE | ||
34 | select SWAP_IO_SPACE | ||
35 | select SYS_SUPPORTS_32BIT_KERNEL | ||
36 | select SYS_SUPPORTS_64BIT_KERNEL | ||
37 | |||
38 | choice | ||
39 | prompt "SiByte SOC Stepping" | ||
40 | depends on SIBYTE_SB1xxx_SOC | ||
41 | |||
42 | config CPU_SB1_PASS_1 | ||
43 | bool "1250 Pass1" | ||
44 | depends on SIBYTE_SB1250 | ||
45 | select CPU_HAS_PREFETCH | ||
46 | |||
47 | config CPU_SB1_PASS_2_1250 | ||
48 | bool "1250 An" | ||
49 | depends on SIBYTE_SB1250 | ||
50 | select CPU_SB1_PASS_2 | ||
51 | help | ||
52 | Also called BCM1250 Pass 2 | ||
53 | |||
54 | config CPU_SB1_PASS_2_2 | ||
55 | bool "1250 Bn" | ||
56 | depends on SIBYTE_SB1250 | ||
57 | select CPU_HAS_PREFETCH | ||
58 | help | ||
59 | Also called BCM1250 Pass 2.2 | ||
60 | |||
61 | config CPU_SB1_PASS_4 | ||
62 | bool "1250 Cn" | ||
63 | depends on SIBYTE_SB1250 | ||
64 | select CPU_HAS_PREFETCH | ||
65 | help | ||
66 | Also called BCM1250 Pass 3 | ||
67 | |||
68 | config CPU_SB1_PASS_2_112x | ||
69 | bool "112x Hybrid" | ||
70 | depends on SIBYTE_BCM112X | ||
71 | select CPU_SB1_PASS_2 | ||
72 | |||
73 | config CPU_SB1_PASS_3 | ||
74 | bool "112x An" | ||
75 | depends on SIBYTE_BCM112X | ||
76 | select CPU_HAS_PREFETCH | ||
77 | |||
78 | endchoice | ||
79 | |||
80 | config CPU_SB1_PASS_2 | ||
81 | bool | ||
82 | |||
83 | config SIBYTE_HAS_LDT | ||
84 | bool | ||
85 | depends on PCI && (SIBYTE_SB1250 || SIBYTE_BCM1125H) | ||
86 | default y | ||
87 | |||
88 | config SIMULATION | ||
89 | bool "Running under simulation" | ||
90 | depends on SIBYTE_SB1xxx_SOC | ||
91 | help | ||
92 | Build a kernel suitable for running under the GDB simulator. | ||
93 | Primarily adjusts the kernel's notion of time. | ||
94 | |||
95 | config SIBYTE_CFE | ||
96 | bool "Booting from CFE" | ||
97 | depends on SIBYTE_SB1xxx_SOC | ||
98 | help | ||
99 | Make use of the CFE API for enumerating available memory, | ||
100 | controlling secondary CPUs, and possibly console output. | ||
101 | |||
102 | config SIBYTE_CFE_CONSOLE | ||
103 | bool "Use firmware console" | ||
104 | depends on SIBYTE_CFE | ||
105 | help | ||
106 | Use the CFE API's console write routines during boot. Other console | ||
107 | options (VT console, sb1250 duart console, etc.) should not be | ||
108 | configured. | ||
109 | |||
110 | config SIBYTE_STANDALONE | ||
111 | bool | ||
112 | depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE | ||
113 | default y | ||
114 | |||
115 | config SIBYTE_STANDALONE_RAM_SIZE | ||
116 | int "Memory size (in megabytes)" | ||
117 | depends on SIBYTE_STANDALONE | ||
118 | default "32" | ||
119 | |||
120 | config SIBYTE_BUS_WATCHER | ||
121 | bool "Support for Bus Watcher statistics" | ||
122 | depends on SIBYTE_SB1xxx_SOC | ||
123 | help | ||
124 | Handle and keep statistics on the bus error interrupts (COR_ECC, | ||
125 | BAD_ECC, IO_BUS). | ||
126 | |||
127 | config SIBYTE_BW_TRACE | ||
128 | bool "Capture bus trace before bus error" | ||
129 | depends on SIBYTE_BUS_WATCHER | ||
130 | help | ||
131 | Run a continuous bus trace, dumping the raw data as soon as | ||
132 | a ZBbus error is detected. Cannot work if ZBbus profiling | ||
133 | is turned on, and also will interfere with JTAG-based trace | ||
134 | buffer activity. Raw buffer data is dumped to console, and | ||
135 | must be processed off-line. | ||
136 | |||
137 | config SIBYTE_SB1250_PROF | ||
138 | bool "Support for SB1/SOC profiling - SB1/SCD perf counters" | ||
139 | depends on SIBYTE_SB1xxx_SOC | ||
140 | |||
141 | config SIBYTE_TBPROF | ||
142 | bool "Support for ZBbus profiling" | ||
143 | depends on SIBYTE_SB1xxx_SOC | ||