diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2007-08-28 05:03:01 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 18:46:02 -0400 |
commit | 4e45171c4e31578157189ca22cfb7b2bcc5f69f2 (patch) | |
tree | 2b5d3dea2f711e0a138496ff8659b8da80d7bd6d /arch/mips/sgi-ip32 | |
parent | 1c0c13eb935c95fd2ca0b0aca6dd4860487fb242 (diff) |
[MIPS] cleanup struct irqaction initializers
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
CC: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sgi-ip32')
-rw-r--r-- | arch/mips/sgi-ip32/ip32-irq.c | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index fb9da9acf53f..5bad1b744d0f 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c | |||
@@ -117,10 +117,18 @@ static void inline flush_mace_bus(void) | |||
117 | extern irqreturn_t crime_memerr_intr(int irq, void *dev_id); | 117 | extern irqreturn_t crime_memerr_intr(int irq, void *dev_id); |
118 | extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id); | 118 | extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id); |
119 | 119 | ||
120 | struct irqaction memerr_irq = { crime_memerr_intr, IRQF_DISABLED, | 120 | struct irqaction memerr_irq = { |
121 | CPU_MASK_NONE, "CRIME memory error", NULL, NULL }; | 121 | .handler = crime_memerr_intr, |
122 | struct irqaction cpuerr_irq = { crime_cpuerr_intr, IRQF_DISABLED, | 122 | .flags = IRQF_DISABLED, |
123 | CPU_MASK_NONE, "CRIME CPU error", NULL, NULL }; | 123 | .mask = CPU_MASK_NONE, |
124 | .name = "CRIME memory error", | ||
125 | }; | ||
126 | struct irqaction cpuerr_irq = { | ||
127 | .handler = crime_cpuerr_intr, | ||
128 | .flags = IRQF_DISABLED, | ||
129 | .mask = CPU_MASK_NONE, | ||
130 | .name = "CRIME CPU error", | ||
131 | }; | ||
124 | 132 | ||
125 | /* | 133 | /* |
126 | * For interrupts wired from a single device to the CPU. Only the clock | 134 | * For interrupts wired from a single device to the CPU. Only the clock |