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authorLucas De Marchi <lucas.demarchi@profusion.mobi>2011-03-30 21:57:33 -0400
committerLucas De Marchi <lucas.demarchi@profusion.mobi>2011-03-31 10:26:23 -0400
commit25985edcedea6396277003854657b5f3cb31a628 (patch)
treef026e810210a2ee7290caeb737c23cb6472b7c38 /arch/mips/sgi-ip27
parent6aba74f2791287ec407e0f92487a725a25908067 (diff)
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Diffstat (limited to 'arch/mips/sgi-ip27')
-rw-r--r--arch/mips/sgi-ip27/Kconfig2
-rw-r--r--arch/mips/sgi-ip27/TODO2
-rw-r--r--arch/mips/sgi-ip27/ip27-init.c2
-rw-r--r--arch/mips/sgi-ip27/ip27-irq.c2
4 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/sgi-ip27/Kconfig b/arch/mips/sgi-ip27/Kconfig
index 5e960ae9735a..bc5e9769bb73 100644
--- a/arch/mips/sgi-ip27/Kconfig
+++ b/arch/mips/sgi-ip27/Kconfig
@@ -1,7 +1,7 @@
1#config SGI_SN0_XXL 1#config SGI_SN0_XXL
2# bool "IP27 XXL" 2# bool "IP27 XXL"
3# depends on SGI_IP27 3# depends on SGI_IP27
4# This options adds support for userspace processes upto 16TB size. 4# This options adds support for userspace processes up to 16TB size.
5# Normally the limit is just .5TB. 5# Normally the limit is just .5TB.
6 6
7choice 7choice
diff --git a/arch/mips/sgi-ip27/TODO b/arch/mips/sgi-ip27/TODO
index 19f1512c8f2e..160857ff1483 100644
--- a/arch/mips/sgi-ip27/TODO
+++ b/arch/mips/sgi-ip27/TODO
@@ -13,7 +13,7 @@ being invoked on all nodes in ip27-memory.c.
139. start_thread must turn off UX64 ... and define tlb_refill_debug. 139. start_thread must turn off UX64 ... and define tlb_refill_debug.
1410. Need a bad pmd table, bad pte table. __bad_pmd_table/__bad_pagetable 1410. Need a bad pmd table, bad pte table. __bad_pmd_table/__bad_pagetable
15does not agree with pgd_bad/pmd_bad. 15does not agree with pgd_bad/pmd_bad.
1611. All intrs (ip27_do_irq handlers) are targetted at cpu A on the node. 1611. All intrs (ip27_do_irq handlers) are targeted at cpu A on the node.
17This might need to change later. Only the timer intr is set up to be 17This might need to change later. Only the timer intr is set up to be
18received on both Cpu A and B. (ip27_do_irq()/bridge_startup()) 18received on both Cpu A and B. (ip27_do_irq()/bridge_startup())
1913. Cache flushing (specially the SMP version) has to be investigated. 1913. Cache flushing (specially the SMP version) has to be investigated.
diff --git a/arch/mips/sgi-ip27/ip27-init.c b/arch/mips/sgi-ip27/ip27-init.c
index 51d3a4f2d7e1..923c080f77bd 100644
--- a/arch/mips/sgi-ip27/ip27-init.c
+++ b/arch/mips/sgi-ip27/ip27-init.c
@@ -93,7 +93,7 @@ static void __cpuinit per_hub_init(cnodeid_t cnode)
93 93
94 /* 94 /*
95 * Some interrupts are reserved by hardware or by software convention. 95 * Some interrupts are reserved by hardware or by software convention.
96 * Mark these as reserved right away so they won't be used accidently 96 * Mark these as reserved right away so they won't be used accidentally
97 * later. 97 * later.
98 */ 98 */
99 for (i = 0; i <= BASE_PCI_IRQ; i++) { 99 for (i = 0; i <= BASE_PCI_IRQ; i++) {
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index 11488719dd97..0a04603d577c 100644
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -41,7 +41,7 @@
41 * Linux has a controller-independent x86 interrupt architecture. 41 * Linux has a controller-independent x86 interrupt architecture.
42 * every controller has a 'controller-template', that is used 42 * every controller has a 'controller-template', that is used
43 * by the main code to do the right thing. Each driver-visible 43 * by the main code to do the right thing. Each driver-visible
44 * interrupt source is transparently wired to the apropriate 44 * interrupt source is transparently wired to the appropriate
45 * controller. Thus drivers need not be aware of the 45 * controller. Thus drivers need not be aware of the
46 * interrupt-controller. 46 * interrupt-controller.
47 * 47 *