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authorRalf Baechle <ralf@linux-mips.org>2007-10-18 08:34:12 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-18 13:11:47 -0400
commite887b24592c5ddf46d37e592b2ee6bd2188257e1 (patch)
tree802956f841441d87dc472240c9eee87f6a574f46 /arch/mips/sgi-ip27/ip27-irq.c
parent832348ff0bf1538e026ff862f91ab6db06e73499 (diff)
[MIPS] IP27: Convert to clock_event_device.
This separates the tick timer stuff from the generic MIPS time.c. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sgi-ip27/ip27-irq.c')
-rw-r--r--arch/mips/sgi-ip27/ip27-irq.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index 856649cf9f1e..1bb692a3b319 100644
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -374,14 +374,13 @@ int __devinit request_bridge_irq(struct bridge_controller *bc)
374 return irq; 374 return irq;
375} 375}
376 376
377extern void ip27_rt_timer_interrupt(void);
378
379asmlinkage void plat_irq_dispatch(void) 377asmlinkage void plat_irq_dispatch(void)
380{ 378{
381 unsigned long pending = read_c0_cause() & read_c0_status(); 379 unsigned long pending = read_c0_cause() & read_c0_status();
380 extern unsigned int rt_timer_irq;
382 381
383 if (pending & CAUSEF_IP4) 382 if (pending & CAUSEF_IP4)
384 ip27_rt_timer_interrupt(); 383 do_IRQ(rt_timer_irq);
385 else if (pending & CAUSEF_IP2) /* PI_INT_PEND_0 or CC_PEND_{A|B} */ 384 else if (pending & CAUSEF_IP2) /* PI_INT_PEND_0 or CC_PEND_{A|B} */
386 ip27_do_irq_mask0(); 385 ip27_do_irq_mask0();
387 else if (pending & CAUSEF_IP3) /* PI_INT_PEND_1 */ 386 else if (pending & CAUSEF_IP3) /* PI_INT_PEND_1 */