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authorRalf Baechle <ralf@linux-mips.org>2013-01-22 06:59:30 -0500
committerRalf Baechle <ralf@linux-mips.org>2013-02-01 04:00:22 -0500
commit7034228792cc561e79ff8600f02884bd4c80e287 (patch)
tree89b77af37d087d9de236fc5d21f60bf552d0a2c6 /arch/mips/sgi-ip22/ip22-nvram.c
parent405ab01c70e18058d9c01a1256769a61fc65413e (diff)
MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sgi-ip22/ip22-nvram.c')
-rw-r--r--arch/mips/sgi-ip22/ip22-nvram.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/mips/sgi-ip22/ip22-nvram.c b/arch/mips/sgi-ip22/ip22-nvram.c
index 0177566475d4..e077036a676a 100644
--- a/arch/mips/sgi-ip22/ip22-nvram.c
+++ b/arch/mips/sgi-ip22/ip22-nvram.c
@@ -14,11 +14,11 @@
14#define EEPROM_WRITE 0xa000 /* serial memory write */ 14#define EEPROM_WRITE 0xa000 /* serial memory write */
15#define EEPROM_WRALL 0x8800 /* write all registers */ 15#define EEPROM_WRALL 0x8800 /* write all registers */
16#define EEPROM_WDS 0x8000 /* disable all programming */ 16#define EEPROM_WDS 0x8000 /* disable all programming */
17#define EEPROM_PRREAD 0xc000 /* read protect register */ 17#define EEPROM_PRREAD 0xc000 /* read protect register */
18#define EEPROM_PREN 0x9800 /* enable protect register mode */ 18#define EEPROM_PREN 0x9800 /* enable protect register mode */
19#define EEPROM_PRCLEAR 0xffff /* clear protect register */ 19#define EEPROM_PRCLEAR 0xffff /* clear protect register */
20#define EEPROM_PRWRITE 0xa000 /* write protect register */ 20#define EEPROM_PRWRITE 0xa000 /* write protect register */
21#define EEPROM_PRDS 0x8000 /* disable protect register, forever */ 21#define EEPROM_PRDS 0x8000 /* disable protect register, forever */
22 22
23#define EEPROM_EPROT 0x01 /* Protect register enable */ 23#define EEPROM_EPROT 0x01 /* Protect register enable */
24#define EEPROM_CSEL 0x02 /* Chip select */ 24#define EEPROM_CSEL 0x02 /* Chip select */
@@ -27,7 +27,7 @@
27#define EEPROM_DATI 0x10 /* Data in */ 27#define EEPROM_DATI 0x10 /* Data in */
28 28
29/* We need to use these functions early... */ 29/* We need to use these functions early... */
30#define delay() ({ \ 30#define delay() ({ \
31 int x; \ 31 int x; \
32 for (x=0; x<100000; x++) __asm__ __volatile__(""); }) 32 for (x=0; x<100000; x++) __asm__ __volatile__(""); })
33 33
@@ -35,7 +35,7 @@
35 __raw_writel(__raw_readl(ptr) & ~EEPROM_DATO, ptr); \ 35 __raw_writel(__raw_readl(ptr) & ~EEPROM_DATO, ptr); \
36 __raw_writel(__raw_readl(ptr) & ~EEPROM_ECLK, ptr); \ 36 __raw_writel(__raw_readl(ptr) & ~EEPROM_ECLK, ptr); \
37 __raw_writel(__raw_readl(ptr) & ~EEPROM_EPROT, ptr); \ 37 __raw_writel(__raw_readl(ptr) & ~EEPROM_EPROT, ptr); \
38 delay(); \ 38 delay(); \
39 __raw_writel(__raw_readl(ptr) | EEPROM_CSEL, ptr); \ 39 __raw_writel(__raw_readl(ptr) | EEPROM_CSEL, ptr); \
40 __raw_writel(__raw_readl(ptr) | EEPROM_ECLK, ptr); }) 40 __raw_writel(__raw_readl(ptr) | EEPROM_ECLK, ptr); })
41 41
@@ -46,7 +46,7 @@
46 __raw_writel(__raw_readl(ptr) | EEPROM_EPROT, ptr); \ 46 __raw_writel(__raw_readl(ptr) | EEPROM_EPROT, ptr); \
47 __raw_writel(__raw_readl(ptr) | EEPROM_ECLK, ptr); }) 47 __raw_writel(__raw_readl(ptr) | EEPROM_ECLK, ptr); })
48 48
49#define BITS_IN_COMMAND 11 49#define BITS_IN_COMMAND 11
50/* 50/*
51 * clock in the nvram command and the register number. For the 51 * clock in the nvram command and the register number. For the
52 * national semiconductor nv ram chip the op code is 3 bits and 52 * national semiconductor nv ram chip the op code is 3 bits and